Re: [edk2] [PATCH v2 06/12] MdeModulePkg/NvmExpressPei: Add logic to produce SSC PPI
> -Original Message-
> From: Ni, Ray
> Sent: Thursday, January 31, 2019 11:35 AM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Wang, Jian J; Dong, Eric
> Subject: RE: [PATCH v2 06/12] MdeModulePkg/NvmExpressPei: Add logic to
> produce SSC PPI
>
>
>
> > -Original Message-
> > From: Wu, Hao A
> > Sent: Thursday, January 31, 2019 10:49 AM
> > To: edk2-devel@lists.01.org
> > Cc: Wu, Hao A ; Wang, Jian J ;
> > Ni, Ray ; Dong, Eric
> > Subject: [PATCH v2 06/12] MdeModulePkg/NvmExpressPei: Add logic to
> > produce SSC PPI
> >
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1409
> >
> > For the NvmExpressPei driver, this commit will add codes to produce the
> > Storage Security Command PPI if the underlying NVM Express controller
> > supports the Security Send and Security Receive commands.
> >
> > Cc: Jian J Wang
> > Cc: Ray Ni
> > Cc: Eric Dong
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu
> > ---
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf | 10 +-
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h| 81
> > +++-
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h | 20 +-
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h
> > | 247
> > MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c | 317
> > +++
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c| 143
> > +--
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c | 32 +-
> > MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c
> > | 423
> > 8 files changed, 1184 insertions(+), 89 deletions(-)
> >
> > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> > b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> > index 9591572fec..0666e5892b 100644
> > --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> > +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> > @@ -2,7 +2,7 @@
> > # The NvmExpressPei driver is used to manage non-volatile memory
> > subsystem
> > # which follows NVM Express specification at PEI phase.
> > #
> > -# Copyright (c) 2018, Intel Corporation. All rights reserved.
> > +# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.
> > #
> > # This program and the accompanying materials
> > # are licensed and made available under the terms and conditions of the
> > BSD License
> > @@ -30,6 +30,7 @@
> > #
> >
> > [Sources]
> > + DevicePath.c
> >DmaMem.c
> >NvmExpressPei.c
> >NvmExpressPei.h
> > @@ -39,6 +40,8 @@
> >NvmExpressPeiHci.h
> >NvmExpressPeiPassThru.c
> >NvmExpressPeiPassThru.h
> > + NvmExpressPeiStorageSecurity.c
> > + NvmExpressPeiStorageSecurity.h
> >
> > [Packages]
> >MdePkg/MdePkg.dec
> > @@ -54,11 +57,12 @@
> >PeimEntryPoint
> >
> > [Ppis]
> > - gEfiPeiVirtualBlockIoPpiGuid ## PRODUCES
> > - gEfiPeiVirtualBlockIo2PpiGuid ## PRODUCES
> >gEdkiiPeiNvmExpressHostControllerPpiGuid ## CONSUMES
> >gEdkiiIoMmuPpiGuid ## CONSUMES
> >gEfiEndOfPeiSignalPpiGuid ## CONSUMES
> > + gEfiPeiVirtualBlockIoPpiGuid ## SOMETIMES_PRODUCES
> > + gEfiPeiVirtualBlockIo2PpiGuid ## SOMETIMES_PRODUCES
> > + gEdkiiPeiStorageSecurityCommandPpiGuid ##
> > SOMETIMES_PRODUCES
> >
> > [Depex]
> >gEfiPeiMemoryDiscoveredPpiGuid AND
> > diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> > b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> > index 0135eca6f0..7047c4f3ff 100644
> > --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> > +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> > @@ -25,6 +25,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> >
> > @@ -44,6 +45,7 @@ typedef struct
> > _PEI_NVME_CONTROLLER_PRIVATE_DATA
> > PEI_NVME_CONTROLLER_PRIVATE_DA
> > #include "NvmExpressPeiHci.h"
> > #include "NvmExpressPeiPassThru.h"
> > #include "NvmExpressPeiBlockIo.h"
> > +#include "NvmExpressPeiStorageSecurity.h"
> >
> > //
> > // NVME PEI driver implementation related definitions
> > @@ -90,10 +92,15 @@ struct _PEI_NVME_NAMESPACE_INFO {
> > struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
> >UINT32Signature;
> >UINTN MmioBase;
> > + UINTN DevicePathLength;
> > + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> > +
> >EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
> >EFI_PEI_RECOVERY_BLOCK_IO2_PPIBlkIo2Ppi;
> > + EDKII_PEI_STORAGE_SECURITY_CMD_PPIStorageSecurityPpi;
> >EFI_PEI_PPI_DESCRIPTORBlkIoPpiList;
> >EFI_PEI_PPI_DESCRIPTORBlkIo2PpiList;
> > +
Re: [edk2] [PATCH v2 06/12] MdeModulePkg/NvmExpressPei: Add logic to produce SSC PPI
> -Original Message-
> From: Wu, Hao A
> Sent: Thursday, January 31, 2019 10:49 AM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A ; Wang, Jian J ;
> Ni, Ray ; Dong, Eric
> Subject: [PATCH v2 06/12] MdeModulePkg/NvmExpressPei: Add logic to
> produce SSC PPI
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1409
>
> For the NvmExpressPei driver, this commit will add codes to produce the
> Storage Security Command PPI if the underlying NVM Express controller
> supports the Security Send and Security Receive commands.
>
> Cc: Jian J Wang
> Cc: Ray Ni
> Cc: Eric Dong
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu
> ---
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf | 10 +-
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h| 81
> +++-
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h | 20 +-
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h
> | 247
> MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c | 317
> +++
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c| 143
> +--
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c | 32 +-
> MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c
> | 423
> 8 files changed, 1184 insertions(+), 89 deletions(-)
>
> diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> index 9591572fec..0666e5892b 100644
> --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
> @@ -2,7 +2,7 @@
> # The NvmExpressPei driver is used to manage non-volatile memory
> subsystem
> # which follows NVM Express specification at PEI phase.
> #
> -# Copyright (c) 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the
> BSD License
> @@ -30,6 +30,7 @@
> #
>
> [Sources]
> + DevicePath.c
>DmaMem.c
>NvmExpressPei.c
>NvmExpressPei.h
> @@ -39,6 +40,8 @@
>NvmExpressPeiHci.h
>NvmExpressPeiPassThru.c
>NvmExpressPeiPassThru.h
> + NvmExpressPeiStorageSecurity.c
> + NvmExpressPeiStorageSecurity.h
>
> [Packages]
>MdePkg/MdePkg.dec
> @@ -54,11 +57,12 @@
>PeimEntryPoint
>
> [Ppis]
> - gEfiPeiVirtualBlockIoPpiGuid ## PRODUCES
> - gEfiPeiVirtualBlockIo2PpiGuid ## PRODUCES
>gEdkiiPeiNvmExpressHostControllerPpiGuid ## CONSUMES
>gEdkiiIoMmuPpiGuid ## CONSUMES
>gEfiEndOfPeiSignalPpiGuid ## CONSUMES
> + gEfiPeiVirtualBlockIoPpiGuid ## SOMETIMES_PRODUCES
> + gEfiPeiVirtualBlockIo2PpiGuid ## SOMETIMES_PRODUCES
> + gEdkiiPeiStorageSecurityCommandPpiGuid ##
> SOMETIMES_PRODUCES
>
> [Depex]
>gEfiPeiMemoryDiscoveredPpiGuid AND
> diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> index 0135eca6f0..7047c4f3ff 100644
> --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
> @@ -25,6 +25,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
>
> @@ -44,6 +45,7 @@ typedef struct
> _PEI_NVME_CONTROLLER_PRIVATE_DATA
> PEI_NVME_CONTROLLER_PRIVATE_DA
> #include "NvmExpressPeiHci.h"
> #include "NvmExpressPeiPassThru.h"
> #include "NvmExpressPeiBlockIo.h"
> +#include "NvmExpressPeiStorageSecurity.h"
>
> //
> // NVME PEI driver implementation related definitions
> @@ -90,10 +92,15 @@ struct _PEI_NVME_NAMESPACE_INFO {
> struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
>UINT32Signature;
>UINTN MmioBase;
> + UINTN DevicePathLength;
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> +
>EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
>EFI_PEI_RECOVERY_BLOCK_IO2_PPIBlkIo2Ppi;
> + EDKII_PEI_STORAGE_SECURITY_CMD_PPIStorageSecurityPpi;
>EFI_PEI_PPI_DESCRIPTORBlkIoPpiList;
>EFI_PEI_PPI_DESCRIPTORBlkIo2PpiList;
> + EFI_PEI_PPI_DESCRIPTORStorageSecurityPpiList;
>EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
>
>//
> @@ -139,11 +146,13 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
>PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
> };
>
> -#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO(a) \
> +#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO(a)
> \
>CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, BlkIoPpi,
>
[edk2] [PATCH v2 06/12] MdeModulePkg/NvmExpressPei: Add logic to produce SSC PPI
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1409
For the NvmExpressPei driver, this commit will add codes to produce the
Storage Security Command PPI if the underlying NVM Express controller
supports the Security Send and Security Receive commands.
Cc: Jian J Wang
Cc: Ray Ni
Cc: Eric Dong
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu
---
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf | 10 +-
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h| 81 +++-
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h | 20 +-
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h | 247
MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c | 317
+++
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c| 143 +--
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c | 32 +-
MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c | 423
8 files changed, 1184 insertions(+), 89 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
index 9591572fec..0666e5892b 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.inf
@@ -2,7 +2,7 @@
# The NvmExpressPei driver is used to manage non-volatile memory subsystem
# which follows NVM Express specification at PEI phase.
#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
@@ -30,6 +30,7 @@
#
[Sources]
+ DevicePath.c
DmaMem.c
NvmExpressPei.c
NvmExpressPei.h
@@ -39,6 +40,8 @@
NvmExpressPeiHci.h
NvmExpressPeiPassThru.c
NvmExpressPeiPassThru.h
+ NvmExpressPeiStorageSecurity.c
+ NvmExpressPeiStorageSecurity.h
[Packages]
MdePkg/MdePkg.dec
@@ -54,11 +57,12 @@
PeimEntryPoint
[Ppis]
- gEfiPeiVirtualBlockIoPpiGuid ## PRODUCES
- gEfiPeiVirtualBlockIo2PpiGuid ## PRODUCES
gEdkiiPeiNvmExpressHostControllerPpiGuid ## CONSUMES
gEdkiiIoMmuPpiGuid ## CONSUMES
gEfiEndOfPeiSignalPpiGuid ## CONSUMES
+ gEfiPeiVirtualBlockIoPpiGuid ## SOMETIMES_PRODUCES
+ gEfiPeiVirtualBlockIo2PpiGuid ## SOMETIMES_PRODUCES
+ gEdkiiPeiStorageSecurityCommandPpiGuid ## SOMETIMES_PRODUCES
[Depex]
gEfiPeiMemoryDiscoveredPpiGuid AND
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
index 0135eca6f0..7047c4f3ff 100644
--- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
+++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h
@@ -25,6 +25,7 @@
#include
#include
#include
+#include
#include
#include
@@ -44,6 +45,7 @@ typedef struct _PEI_NVME_CONTROLLER_PRIVATE_DATA
PEI_NVME_CONTROLLER_PRIVATE_DA
#include "NvmExpressPeiHci.h"
#include "NvmExpressPeiPassThru.h"
#include "NvmExpressPeiBlockIo.h"
+#include "NvmExpressPeiStorageSecurity.h"
//
// NVME PEI driver implementation related definitions
@@ -90,10 +92,15 @@ struct _PEI_NVME_NAMESPACE_INFO {
struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
UINT32Signature;
UINTN MmioBase;
+ UINTN DevicePathLength;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
EFI_PEI_RECOVERY_BLOCK_IO2_PPIBlkIo2Ppi;
+ EDKII_PEI_STORAGE_SECURITY_CMD_PPIStorageSecurityPpi;
EFI_PEI_PPI_DESCRIPTORBlkIoPpiList;
EFI_PEI_PPI_DESCRIPTORBlkIo2PpiList;
+ EFI_PEI_PPI_DESCRIPTORStorageSecurityPpiList;
EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
//
@@ -139,11 +146,13 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
};
-#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO(a) \
+#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO(a) \
CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, BlkIoPpi,
NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE)
-#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2(a)\
+#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2(a) \
CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, BlkIo2Ppi,
NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE)
-#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a)\
+#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY(a)\
+ CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, StorageSecurityPpi,
