Some users of this library (i.e., FVP-AArch64 and RTSM-A15_MPCore)
may be built to execute straight from NOR flash. Since device mappings
should have the XN attribute set (according to the architecture), mapping
the NOR flash as a device may prevent it from being executable.

Since the NOR flash DXE driver is perfectly capable of setting the correct
attributes for the region it needs to write to, and since we will be
executing from DRAM by that time anyway, we can simply map the NOR flash
as normal memory initially.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c 
b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
index 6c5e494d502c..c6df2e1b3de4 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
@@ -126,7 +126,7 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_NOR0_BASE;
   VirtualMemoryTable[Index].Length       = ARM_VE_SMB_NOR0_SZ + 
ARM_VE_SMB_NOR1_SZ;
-  VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+  VirtualMemoryTable[Index].Attributes   = CacheAttributes;
 
   // SMB CS2 - SRAM
   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
-- 
1.9.1

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