ESP should be set to top of eSRAM range that aligns with Flat32.asm. Because CPU BIST data will be located at top of STACK, this issue leads Platform Sec Lib cannot get the correct CPU BIST information.
This fix is to address below issue: https://tianocore.acgmultimedia.com/show_bug.cgi?id=123 Cc: Steven Shi <steven....@intel.com> Cc: Michael Kinney <michael.d.kin...@intel.com> Cc: Kelly Steele <kelly.ste...@intel.com> Cc: Feng Tian <feng.t...@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff....@intel.com> --- QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Flat32.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Flat32.S b/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Flat32.S index 2bb503f..f35dbcf 100644 --- a/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Flat32.S +++ b/QuarkPlatformPkg/Library/PlatformSecLib/Ia32/Flat32.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------ # -# Copyright (c) 2013 - 2015 Intel Corporation. +# Copyright (c) 2013 - 2016 Intel Corporation. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -263,7 +263,7 @@ L0: # Set up stack pointer # movl ASM_PFX(PcdGet32(PcdEsramStage1Base)), %esp - movl $QUARK_STACK_SIZE_BYTES, %esi + movl $QUARK_ESRAM_MEM_SIZE_BYTES, %esi addl %esi, %esp # ESP = top of stack (stack grows downwards). # -- 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
