Re: [edk2] [PATCH edk2-platforms] Silicon/AMD/Styx: add PPTT ACPI table
On 15 March 2018 at 20:07, Leif Lindholm wrote:
> On Thu, Mar 08, 2018 at 05:03:16PM +, Ard Biesheuvel wrote:
>> Add a ACPI PPTT table describing the cache topology of the Seattle SoC.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel
>
> Looks plausible:
> Reviewed-by: Leif Lindholm
>
Pushed as 6d6591a29e52
Thanks
>> ---
>> Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 1 +
>> Silicon/AMD/Styx/AcpiTables/Pptt.c | 225
>>
>> Silicon/AMD/Styx/Common/AmdStyxAcpiLib.h| 1 +
>> Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 3 +-
>> 4 files changed, 229 insertions(+), 1 deletion(-)
>>
>> diff --git a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
>> b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
>> index cfffc73894c0..057c52512e4e 100644
>> --- a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
>> +++ b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
>> @@ -38,6 +38,7 @@ [Sources]
>>Csrt.c
>>Dsdt.c
>>Iort.c
>> + Pptt.c
>>
>> [Packages]
>>ArmPkg/ArmPkg.dec
>> diff --git a/Silicon/AMD/Styx/AcpiTables/Pptt.c
>> b/Silicon/AMD/Styx/AcpiTables/Pptt.c
>> new file mode 100644
>> index ..d9d7c494d86f
>> --- /dev/null
>> +++ b/Silicon/AMD/Styx/AcpiTables/Pptt.c
>> @@ -0,0 +1,225 @@
>> +/** @file
>> +
>> + Copyright (c) 2018, Linaro Ltd. All rights reserved.
>> +
>> + This program and the accompanying materials are licensed and made
>> available
>> + under the terms and conditions of the BSD License which accompanies this
>> + distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
>> IMPLIED.
>> +
>> +**/
>> +
>> +#include
>> +
>> +#include
>> +
>> +#define FIELD_OFFSET(type, name)__builtin_offsetof(type, name)
>> +
>> +#pragma pack(1)
>> +typedef struct {
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Core;
>> + UINT32Offset[2];
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE DCache;
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE ICache;
>> +} STYX_PPTT_CORE;
>> +
>> +typedef struct {
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Cluster;
>> + UINT32Offset[1];
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE L2Cache;
>> + STYX_PPTT_CORECores[2];
>> +} STYX_PPTT_CLUSTER;
>> +
>> +typedef struct {
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Package;
>> + UINT32Offset[1];
>> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE L3Cache;
>> + STYX_PPTT_CLUSTER
>> Clusters[NUM_CORES / 2];
>> +} STYX_PPTT_PACKAGE;
>> +
>> +typedef struct {
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Pptt;
>> + STYX_PPTT_PACKAGE Packages[1];
>> +} STYX_PPTT_TABLE;
>> +#pragma pack()
>> +
>> +#define PPTT_CORE(pid, cid, id) {
>> \
>> + {
>> \
>> +EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR,
>> \
>> +FIELD_OFFSET (STYX_PPTT_CORE, DCache),
>> \
>> +{},
>> \
>> +{
>> \
>> + 0,/* PhysicalPackage */
>> \
>> + EFI_ACPI_6_2_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorIdValid */
>> \
>> +},
>> \
>> +FIELD_OFFSET (STYX_PPTT_TABLE,
>> \
>> + Packages[pid].Clusters[cid]), /* Parent */
>> \
>> +((cid) << 8) + (id),/* AcpiProcessorId */
>> \
>> +2, /* NumberOfPrivateResources
>> */\
>> + }, {
>> \
>> +FIELD_OFFSET (STYX_PPTT_TABLE,
>> \
>> + Packages[pid].Clusters[cid].Cores[id].DCache),
>> \
>> +FIELD_OFFSET (STYX_PPTT_TABLE,
>> \
>> + Packages[pid].Clusters[cid].Cores[id].ICache),
>> \
>> + }, {
>> \
>> +EFI_ACPI_6_2_P
Re: [edk2] [PATCH edk2-platforms] Silicon/AMD/Styx: add PPTT ACPI table
On Thu, Mar 08, 2018 at 05:03:16PM +, Ard Biesheuvel wrote:
> Add a ACPI PPTT table describing the cache topology of the Seattle SoC.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Looks plausible:
Reviewed-by: Leif Lindholm
> ---
> Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 1 +
> Silicon/AMD/Styx/AcpiTables/Pptt.c | 225
>
> Silicon/AMD/Styx/Common/AmdStyxAcpiLib.h| 1 +
> Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c | 3 +-
> 4 files changed, 229 insertions(+), 1 deletion(-)
>
> diff --git a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
> b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
> index cfffc73894c0..057c52512e4e 100644
> --- a/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
> +++ b/Silicon/AMD/Styx/AcpiTables/AcpiTables.inf
> @@ -38,6 +38,7 @@ [Sources]
>Csrt.c
>Dsdt.c
>Iort.c
> + Pptt.c
>
> [Packages]
>ArmPkg/ArmPkg.dec
> diff --git a/Silicon/AMD/Styx/AcpiTables/Pptt.c
> b/Silicon/AMD/Styx/AcpiTables/Pptt.c
> new file mode 100644
> index ..d9d7c494d86f
> --- /dev/null
> +++ b/Silicon/AMD/Styx/AcpiTables/Pptt.c
> @@ -0,0 +1,225 @@
> +/** @file
> +
> + Copyright (c) 2018, Linaro Ltd. All rights reserved.
> +
> + This program and the accompanying materials are licensed and made available
> + under the terms and conditions of the BSD License which accompanies this
> + distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +
> +**/
> +
> +#include
> +
> +#include
> +
> +#define FIELD_OFFSET(type, name)__builtin_offsetof(type, name)
> +
> +#pragma pack(1)
> +typedef struct {
> + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Core;
> + UINT32Offset[2];
> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE DCache;
> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE ICache;
> +} STYX_PPTT_CORE;
> +
> +typedef struct {
> + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Cluster;
> + UINT32Offset[1];
> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE L2Cache;
> + STYX_PPTT_CORECores[2];
> +} STYX_PPTT_CLUSTER;
> +
> +typedef struct {
> + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Package;
> + UINT32Offset[1];
> + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE L3Cache;
> + STYX_PPTT_CLUSTER
> Clusters[NUM_CORES / 2];
> +} STYX_PPTT_PACKAGE;
> +
> +typedef struct {
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Pptt;
> + STYX_PPTT_PACKAGE Packages[1];
> +} STYX_PPTT_TABLE;
> +#pragma pack()
> +
> +#define PPTT_CORE(pid, cid, id) {
> \
> + {
> \
> +EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR,
> \
> +FIELD_OFFSET (STYX_PPTT_CORE, DCache),
> \
> +{},
> \
> +{
> \
> + 0,/* PhysicalPackage */
> \
> + EFI_ACPI_6_2_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorIdValid */
> \
> +},
> \
> +FIELD_OFFSET (STYX_PPTT_TABLE,
> \
> + Packages[pid].Clusters[cid]), /* Parent */
> \
> +((cid) << 8) + (id),/* AcpiProcessorId */
> \
> +2, /* NumberOfPrivateResources
> */\
> + }, {
> \
> +FIELD_OFFSET (STYX_PPTT_TABLE,
> \
> + Packages[pid].Clusters[cid].Cores[id].DCache),
> \
> +FIELD_OFFSET (STYX_PPTT_TABLE,
> \
> + Packages[pid].Clusters[cid].Cores[id].ICache),
> \
> + }, {
> \
> +EFI_ACPI_6_2_PPTT_TYPE_CACHE,
> \
> +sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE),
> \
> +{},
