Re: [PSES] SV: [PSES] PCB layout technique - multilayer

2020-02-10 Thread Ken Wyatt
Hi Amund/Gert, I agree with Gert’s advice, that all (especially high speed) signal layers need to have an adjacent ground return plane in order to properly capture the electromagnetic wave of the digital signals (which travel in the dielectric space between layers). The one exception, in my

Re: [PSES] SV: [PSES] PCB layout technique - multilayer

2020-02-10 Thread Gert Gremmen
It s an extra layer you might allocate to that low frequency signals , analog signals and or extra power supply. On 10-2-2020 10:22, Amund Westin wrote: Thanks Gert I want to read your advices with great attention. Just one immediately follow-up èThis Misc layer, is it an extra layer for

[PSES] SV: [PSES] PCB layout technique - multilayer

2020-02-10 Thread Amund Westin
Thanks Gert I want to read your advices with great attention. Just one immediately follow-up ==>This Misc layer, is it an extra layer for signal routing, as a Sbott3? Mvh Amund Fra: Gert Gremmen Sendt: 10. februar 2020 09:57 Til: Amund Westin ; EMC-PSTC@LISTSERV.IEEE.ORG Emne:

Re: [PSES] PCB layout technique - multilayer

2020-02-10 Thread Gert Gremmen
Just 2 hints of thousands: If you implement 2 ground planes make sure the ground references on top and bottom are related to the closest ground layer . The stack will than be:  Stop -- GND --Stop2 -- PWR - Misc - Sbott2 - GND -Sbott ((S=signal)) (basically you route 2 x 3 layer boards

Re: [PSES] PCB layout technique - multilayer

2020-02-10 Thread John Woodgate
Look for books and other publications by Keith Armstrong, and others by Tim Williams. On 2020-02-10 07:27, Amund Westin wrote: I’m looking for articles about how to do good EMC layout on multilayer PCB. Choice of PCB layer stacking (8 or 10 layers) and basic routing techniques are the