---
Makefile | 2 +-
configure | 3 +++
doc/APIchanges| 3 +++
ffbuild/arch.mak | 1 +
libavutil/cpu.h | 1 +
libavutil/tests/cpu.c | 1 +
tests/checkasm/checkasm.c | 1 +
7 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index de727cbe00..4c3af09fec 100644
--- a/Makefile
+++ b/Makefile
@@ -101,7 +101,7 @@ SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS
\
ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \
ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS\
MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \
- MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS \
+ MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS RVVB-OBJS\
OBJS SLIBOBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS
define RESET
diff --git a/configure b/configure
index 00c3cee33f..2c74b1e8a3 100755
--- a/configure
+++ b/configure
@@ -,6 +,7 @@ ARCH_EXT_LIST_PPC="
ARCH_EXT_LIST_RISCV="
rv
rvv
+rv_zvbb
"
ARCH_EXT_LIST_X86="
@@ -2760,6 +2761,7 @@ power8_deps="vsx"
rv_deps="riscv"
rvv_deps="rv"
+rv_zvbb_deps="rvv"
loongson2_deps="mips"
loongson3_deps="mips"
@@ -6379,6 +6381,7 @@ elif enabled riscv; then
enabled rv && check_inline_asm rv '".option arch, +zbb\nrev8 t0, t1"'
enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0,
e8, m1, ta, ma"'
+enabled rv_zvbb && check_inline_asm rv_zvbb '".option arch, +zvbb\nvclz.v
v0, v8"'
elif enabled x86; then
diff --git a/doc/APIchanges b/doc/APIchanges
index 824beec9d3..238d22c135 100644
--- a/doc/APIchanges
+++ b/doc/APIchanges
@@ -2,6 +2,9 @@ The last version increases of all libraries were on 2024-03-07
API changes, most recent first:
+2024-05-10 - x - lavu 59.18.100 - cpu.h
+ Add AV_CPU_FLAG_RV_ZVBB.
+
2024-05-04 - xx - lavu 59.17.100 - opt.h
Add AV_OPT_TYPE_UINT and av_opt_eval_uint().
diff --git a/ffbuild/arch.mak b/ffbuild/arch.mak
index 23a3feb090..3fc40e5e5d 100644
--- a/ffbuild/arch.mak
+++ b/ffbuild/arch.mak
@@ -17,6 +17,7 @@ OBJS-$(HAVE_VSX) += $(VSX-OBJS) $(VSX-OBJS-yes)
OBJS-$(HAVE_RV) += $(RV-OBJS) $(RV-OBJS-yes)
OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes)
+OBJS-$(HAVE_RV_ZVBB) += $(RVVB-OBJS)$(RVVB-OBJS-yes)
OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes)
OBJS-$(HAVE_X86ASM) += $(X86ASM-OBJS) $(X86ASM-OBJS-yes)
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 8dff341886..cc19828d4b 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -90,6 +90,7 @@
#define AV_CPU_FLAG_RVV_F64 (1 << 6) ///< Vectors of double's
#define AV_CPU_FLAG_RVB_BASIC(1 << 7) ///< Basic bit-manipulations
#define AV_CPU_FLAG_RVB_ADDR (1 << 8) ///< Address bit-manipulations
+#define AV_CPU_FLAG_RV_ZVBB (1 << 9) ///< Vector basic bit-manipulations
/**
* Return the flags which specify extensions supported by the CPU.
diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c
index d91bfeab5c..10e620963b 100644
--- a/libavutil/tests/cpu.c
+++ b/libavutil/tests/cpu.c
@@ -94,6 +94,7 @@ static const struct {
{ AV_CPU_FLAG_RVV_F32, "zve32f" },
{ AV_CPU_FLAG_RVV_I64, "zve64x" },
{ AV_CPU_FLAG_RVV_F64, "zve64d" },
+{ AV_CPU_FLAG_RV_ZVBB, "zvbb" },
#endif
{ 0 }
};
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 9be32fc16e..9a05c1f95e 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -282,6 +282,7 @@ static const struct {
{ "RVVf32", "rvv_f32", AV_CPU_FLAG_RVV_F32 },
{ "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 },
{ "RVVf64", "rvv_f64", AV_CPU_FLAG_RVV_F64 },
+{ "RV_Zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB },
#elif ARCH_MIPS
{ "MMI", "mmi", AV_CPU_FLAG_MMI },
{ "MSA", "msa", AV_CPU_FLAG_MSA },
--
2.43.0
___
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