Re: [flashrom] [PATCH] don't print dmidecode shell error

2011-06-27 Thread Bernd Blaauw
Op 27-6-2011 14:44, Stefan Tauner schreef: stepan told me to commit this, but i hesitate. i want to integrate dos/win support first. i would drop the __DJGPP__ flag there because /dev/null is supported by it: http://www.delorie.com/djgpp/doc/eli-m17n99.html#Unix%20devices additionally i would

[flashrom] flashrom virtual machine policy?

2011-06-27 Thread Bernd Blaauw
What's the Flashrom project's stance on virtualisation/emulation combined with using Flashrom? I've only got some experience with VMware Workstation and not much else with others, but how should a FlashROM that's being run in an emulator react? * Programming a BIOS in a VM seems rather

Re: [flashrom] flashrom virtual machine policy?

2011-06-27 Thread Jonathan A. Kollasch
On Mon, Jun 27, 2011 at 03:03:36PM +0200, Bernd Blaauw wrote: What's the Flashrom project's stance on virtualisation/emulation combined with using Flashrom? Unless it's on a simulator like SimNow! where the flash chip may be accurately emulated, flashrom will never detect a chip, and thus will

Re: [flashrom] [patch] atavia

2011-06-27 Thread Jonathan A. Kollasch
On Sun, Jun 26, 2011 at 11:33:33PM +, Jonathan A. Kollasch wrote: Add VIA VT6421A LPC programmer driver. Okay, so it still doesn't work. The 6421 is being clever, and coping with that is really something I don't care to do, at least right now. Jonathan Kollasch

Re: [flashrom] [PATCH] don't print dmidecode shell error

2011-06-27 Thread Stefan Tauner
On Mon, 27 Jun 2011 14:54:49 +0200 Bernd Blaauw bbla...@home.nl wrote: Op 27-6-2011 14:44, Stefan Tauner schreef: stepan told me to commit this, but i hesitate. i want to integrate dos/win support first. i would drop the __DJGPP__ flag there because /dev/null is supported by it:

Re: [flashrom] [PATCH] don't print dmidecode shell error

2011-06-27 Thread Bernd Blaauw
Op 27-6-2011 15:29, Stefan Tauner schreef: does it with the previously attached patch still? Can't say, I'm a simple Windows/Dos user, thus leeching on Idwer's DOS compilation. Someday I'll start with Linux and compiling, likely the day I purchase that Asrock E350M board for Coreboot

Re: [flashrom] [PATCH] Macronix MX25L6445E

2011-06-27 Thread Wagner, Helge (GE Intelligent Platforms)
Hello Stefan, i have not looked at the datasheet(s), but maybe there is a way to distinguish the two devices (with another id command for example)? I have asked Macronix, and they suggest to use the REMS2 function, which is supported on the MX25L6445E (returns 0xC216) and is not supported on

Re: [flashrom] [PATCH] Macronix MX25L6445E

2011-06-27 Thread Carl-Daniel Hailfinger
Hello Helge, thanks for your patch. It looks good to me on a first glance, and I hope to review it in detail soon. A short comment (in reply to Stefan's review) is at the end of this mail. Am 27.06.2011 17:50 schrieb Stefan Tauner: On Mon, 27 Jun 2011 17:06:42 +0200 Wagner, Helge (GE

[flashrom] flashrom -V output

2011-06-27 Thread DeLa
flashrom v0.9.3-r1357 on Linux 2.6.38-8-generic (i686), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 3 usecs, 1352M loops per second, 10 myus = 11 us, 100 myus = 102

[flashrom] SST 49LF008A and Poulsbo - still having erase problem

2011-06-27 Thread Joel Brinton
Hello, First thanks all for the hard work - flashrom is a great utility! I'm currently having trouble on the Intel SCH (Poulsbo) with a 49LF008A (Toradex Z530 COMExpress board). I found an old mail message [http://www.flashrom.org/pipermail/flashrom/2010-March/002481.html] of someone

Re: [flashrom] SST 49LF008A and Poulsbo - still having erase problem

2011-06-27 Thread Joel Brinton
 Having stderr in the dump might also help :) coreboot last image size (not ROM size) is 1048576 bytes. Manufacturer: iWave Mainboard ID: iWRainbowG6 Note: If the following flash access fails, try -m :. Reading old flash chip contents... Erasing and writing flash chip... Looking at blockwise

[flashrom] [PATCH 0/8] ichspi 6.0

2011-06-27 Thread Stefan Tauner
hwseq does use all data registers now with the help of new refactored read/write functions which are also used for swseq in all versions. main problem remains descriptor decoding (not new changes in this set). dhendrix: i was pretty tired so i fear that the quality of the previous one could be

[flashrom] [PATCH 1/8] ichspi.c: make REGWRITE* macros safer

2011-06-27 Thread Stefan Tauner
'+' does have a quite high precedence so calling those macros with a term including weaker operators in the off parameter may have unexpected consequences Signed-off-by: Stefan Tauner stefan.tau...@student.tuwien.ac.at --- ichspi.c |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)

[flashrom] [PATCH 2/8] ichspi.c: simplify ich_set_bbar

2011-06-27 Thread Stefan Tauner
less code, documenting better what the differences are (i.e. offset of BBAR only). Signed-off-by: Stefan Tauner stefan.tau...@student.tuwien.ac.at --- ichspi.c | 48 +--- 1 files changed, 21 insertions(+), 27 deletions(-) diff --git a/ichspi.c

[flashrom] [PATCH 3/8] ichspi.c: add FPB (Flash Partition Boundary) macros and init printing

2011-06-27 Thread Stefan Tauner
Signed-off-by: Stefan Tauner stefan.tau...@student.tuwien.ac.at --- ichspi.c |7 +++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/ichspi.c b/ichspi.c index 7e777f1..f35ea37 100644 --- a/ichspi.c +++ b/ichspi.c @@ -131,6 +131,10 @@ #define ICH9_REG_BBAR 0xA0

[flashrom] [PATCH 4/8] ichspi.c: preserve reserved bits in address registers

2011-06-27 Thread Stefan Tauner
Signed-off-by: Stefan Tauner stefan.tau...@student.tuwien.ac.at --- ichspi.c | 13 - 1 files changed, 8 insertions(+), 5 deletions(-) diff --git a/ichspi.c b/ichspi.c index f35ea37..19e52d2 100644 --- a/ichspi.c +++ b/ichspi.c @@ -659,10 +659,11 @@ static int

[flashrom] [PATCH 5/8] ichspi.c: refactor filling and reading the fdata/spid registers

2011-06-27 Thread Stefan Tauner
- add ich_fill_data to fill the chipset registers from an array - add ich_read_data to copy the data from the chipset register into an array - replace the existing code with calls to those functions NB: this changes the semantic of the *run_opcode functions a bit: previously they could trash the

[flashrom] [PATCH 7/8] ichspi:c add support for Intel Hardware Sequencing

2011-06-27 Thread Stefan Tauner
todo: - commit message (is a link to my blog post a good idea (additionally)?) - revise (levels of) prints - revise timeout values Tested-by: David Hendricks dhend...@google.com Signed-off-by: Stefan Tauner stefan.tau...@student.tuwien.ac.at --- chipdrivers.h |6 + flashchips.c | 23

[flashrom] [PATCH 8/8] squash! ichspi:c add support for Intel Hardware Sequencing

2011-06-27 Thread Stefan Tauner
- add SPI_CONTROLLER_ICH_HWSEQ support to ich_set_bbar although unused atm - remove ich_hwseq_get_flash_boundary - use all fdata registers for transfers - allow 25b addresses and add ich_hwseq_set_addr Signed-off-by: Stefan Tauner stefan.tau...@student.tuwien.ac.at --- ichspi.c | 83