Split erase region walking out of erase_flash.
That allows us to use erase region walking for a combined erase/write
action, and is a prerequisite for partial flashing.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net
Index: flashrom-walk_eraseregions/flashrom.c
Hello Andrew,
In my case it contains what seems to be a windows dll (begins with MZ and
contains This program cannot be run in DOS mode etc...), doesn't look like a
bootblock. I found out that it could somehow be linked with slic 2.1, a
feature used to transparently validate Windows on OEMs.
Hi,
I've tested a Winbond W25Q80BV (W25Q80BVDAIG/25Q80BVAIG) socketed on a Asus
M4A87TD/USB3. Read, erase, write and verify worked fine. Attached is
flashrom -V output.
Jonathan Kollasch
flashrom v0.9.2-r1072 on NetBSD 5.1_RC3 (i386), built with libpci 3.1.3, GCC
4.1.3 20080704
Author: hailfinger
Date: Sat Jul 10 18:56:32 2010
New Revision: 1073
URL: http://flashrom.org/trac/coreboot/changeset/1073
Log:
Autodetect the ITE IT8705 Super I/O and enable flash writes if it
performs LPC-Parallel translation.
Remove board enables which triggered the IT8705 write enable
On 10.07.2010 17:38, Uwe Hermann wrote:
On Fri, Jul 09, 2010 at 06:39:40PM +0200, Carl-Daniel Hailfinger wrote:
Autodetect the ITE IT8705 Super I/O and enable flash writes if it
^
Missing 'F' in the commit message.
performs LPC-Parallel translation.
Am Freitag, den 09.07.2010, 19:34 +0200 schrieb Carl-Daniel Hailfinger:
-int spi_chip_write_1(struct flashchip *flash, uint8_t *buf)
+/* real chunksize is 1, logical chunksize is 1 */
+int spi_chip_write_1_new(struct flashchip *flash, uint8_t *buf, int start,
int len)
I think
Am Samstag, den 10.07.2010, 19:41 +0200 schrieb Carl-Daniel Hailfinger:
On 10.07.2010 19:21, Michael Karcher wrote:
I think spi_chip_write_1_range makes a better name than
spi_chip_write_1_new. But if your plan is to remove the old
spi_chip_write_1 function and rename this function at the
Am Samstag, den 10.07.2010, 03:05 +0200 schrieb Carl-Daniel Hailfinger:
-int spi_disable_blockprotect(void);
+int spi_disable_blockprotect(struct flashchip *flash);
This change makes sense, but you don't use the flash parameter yet.
@@ -1392,6 +1408,7 @@
On 10.07.2010 20:16, Michael Karcher wrote:
Am Samstag, den 22.05.2010, 03:26 +0200 schrieb Carl-Daniel Hailfinger:
[as requested on IRC, this is not a full review, but two things not
directly related to the patch stand out I don't want to leave
uncommented]
int
Author: mkarcher
Date: Sat Jul 10 21:34:15 2010
New Revision: 1074
URL: http://flashrom.org/trac/coreboot/changeset/1074
Log:
Fix read function for EMST F25L008A
SPI chips never should use read_memmapped. The SPI master code might
decide that read_memmapped is fine for this chip, though, in a
Am Samstag, den 10.07.2010, 21:26 +0200 schrieb Carl-Daniel Hailfinger:
+ .unlock = spi_disable_blockprotect,
.write = spi_chip_write_1,
.read = read_memmapped,
OUCH! blame me for committing that! read must not be read_memmapped.
Use the max_rom_decode infrastructure for wbsio_spi instead of
open-coding a variant which only aborts after it is too late.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net
diff -ur flashrom-partial_write_spi_intermediate/flash.h
flashrom-wbsio_max_decode/flash.h
---
On 10.07.2010 21:20, Carl-Daniel Hailfinger wrote:
On 10.07.2010 20:15, Michael Karcher wrote:
Am Samstag, den 10.07.2010, 19:41 +0200 schrieb Carl-Daniel Hailfinger:
The spi_programmer array has a .write_256
member for every controller. In case the controller can't do anything
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