Thanks Nikolai! Since there was no feedback, I updated the page :) On Tue, Mar 15, 2022 at 5:24 PM Nikolai Artemiev <nartem...@google.com> wrote:
> Hi everyone! > > As a follow up to https://review.coreboot.org/c/flashrom/+/58477 and > https://review.coreboot.org/c/flashrom/+/58480, I want to update > the section "Adding/reviewing a new flash chip" of the dev guidelines > <http://flashrom.org/Development_Guidelines> with documentation for two > new chip data fields that were added: > > > - `.reg_bits` stores information about what configuration bits the > chip has and where they are found. For example,`.cmp = {STATUS2, 6, RW}` > indicates that the chip has a complement bit (CMP) and it is the 6th bit of > the 2nd status register. See `struct reg_bit_info` in flash.h for details > on each of the structure's fields. > > Note that some chips have configuration bits that function like TB/SEC/CMP > but are called something else in the datasheet (e.g. BP3/BP4/...). These > bits should be assigned to a field according their function and the > datasheet name should be noted in a comment, for example: > ``` > .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */ > ``` > > > - `.decode_range` points to a function that determines what protection > range will be selected by particular configuration bit values. It is > required for writeprotect operations on the chip. > > > Let me know if the text is alright, thanks! > > Cheers, > Nik > > -- Anastasia.
_______________________________________________ flashrom mailing list -- flashrom@flashrom.org To unsubscribe send an email to flashrom-le...@flashrom.org
