Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On Thu, Oct 22, 2009 at 11:44:24PM +0200, Uwe Hermann wrote: On Thu, Oct 22, 2009 at 03:16:16PM +0200, Luc Verhaegen wrote: Ok, big change here which will require several of the people on the list below to test and Ack this patch. But one has to admit; the result is worth it. Yes, I think so too, but see below for one change request. Will test the patch on ASUS P4B266 soon. Besides that, duplicating pci_dev_find in every board function strikes me as something that was better in the old code. Ack. I prefer to see this: { struct pci_dev *dev; dev = pci_dev_find(0x8086, 0x27b8); /* Intel ICH7 LPC */ if (!dev) { fprintf(stderr, \nERROR: Intel ICH7 LPC bridge not found.\n); return -1; } ich_gpio_raise(dev, 34); /* #TBL */ ich_gpio_raise(dev, 35); /* #WP */ return 0; } Over the completely impossible: { int ret; ret = ich_gpio_raise(name, 0x8086, 0x27B8, 0x48, 0x0c, 0xffc0, 34); if (!ret) ret = ich_gpio_raise(name, 0x8086, 0x27B8, 0x48, 0x0c, 0xffc0, 35); return ret; } I agree we should drop the totally useless 0x48 register index, 0x0c offset, and 0xffc0 bitmask from the function prototype. Also, IMHO name is pretty useless, it's on my TODO list to drop that anyway. However, I very much think that we _do_ want the PCI IDs to stay in there. Example call would look like this: ich_gpio_raise(name, 0x8086, 0x27B8, 34); I'm fine with also dropping 0x8086 (PCI vendor ID) as that should always be the same for the ich_* function. If we later also drop name this becomes: ich_gpio_raise(0x27B8, 34); Which is perfect. Or even this, which still does not make me comfortable, and which requires the big switch statement in the ich_gpio_raise function anyway. { int ret; ret = ich_gpio_raise(name, 0x27B8, 34); if (!ret) ret = ich_gpio_raise(name, 0x27B8, 35); return ret; } This is perfectly fine if you ask me. Many board enables only raise one pin and thus are as simple as: { return ich_gpio_raise(name, 0x27B8, 34); } Which I like a lot. And the above example is very nice and readable,too. People will naturally add a comment here with the chipset name. If they don't, then people who come in afterwards will want to see such a comment. Once you have seen a few of those pci dev finding things, and they all get copy/pasted around anyway, you quickly see what is important to them, and they are all very formulaic anyway. You learn to ignore the rest. No need to copy any of it around, that's just useless code duplication. Just put them in the ich_gpio_raise() function, they're fine in there. I do not agree. One issue with the stick the discovery of the pci device in the gpio set routine is the multiple gpio pin poking. Another is when you need to touch some other bits of that same pci device. It is also the pci device finding which can fail on a badly matched board here (or some programming issue which we should not encounter if we have board enables tested). So intel_ich_gpio_raise itself, later on, should not fail anymore. Getting the dev, and then working from there is atomic enough, without overly abstracting or keeping things. Also, retrieving the dev, can be made a tiny bit cleaner, at a later stage, which will then be uniform for all, even the non-ich board enables. Then you really can apply a more general formula. If you no longer have to pass the name, then you have the situation where people put comments in there which state the name, so that is not an improvement either. Let's get the bugs out of this patch, and then worry about the looks of it in further patches. Luc Verhaegen. ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On Fri, Oct 23, 2009 at 01:46:52AM +0200, Carl-Daniel Hailfinger wrote: On 22.10.2009 23:44, Uwe Hermann wrote: On Thu, Oct 22, 2009 at 03:16:16PM +0200, Luc Verhaegen wrote: I agree we should drop the totally useless 0x48 register index, 0x0c offset, and 0xffc0 bitmask from the function prototype. Absolutely. Also, IMHO name is pretty useless, it's on my TODO list to drop that anyway. Indeed. However, I very much think that we _do_ want the PCI IDs to stay in there. Example call would look like this: ich_gpio_raise(name, 0x8086, 0x27B8, 34); I'm fine with also dropping 0x8086 (PCI vendor ID) as that should always be the same for the ich_* function. If we later also drop name this becomes: ich_gpio_raise(0x27B8, 34); Which is perfect. Hm yes. It is a bit ugly in the case of multiple GPIOs per board, but other than that... please see my mail from a few minutes ago for more commentary. Or even this, which still does not make me comfortable, and which requires the big switch statement in the ich_gpio_raise function anyway. { int ret; ret = ich_gpio_raise(name, 0x27B8, 34); if (!ret) ret = ich_gpio_raise(name, 0x27B8, 35); return ret; } This is perfectly fine if you ask me. Many board enables only raise one pin and thus are as simple as: { return ich_gpio_raise(name, 0x27B8, 34); } Which I like a lot. And the above example is very nice and readable,too. Well yes. Once you have seen a few of those pci dev finding things, and they all get copy/pasted around anyway, you quickly see what is important to them, and they are all very formulaic anyway. You learn to ignore the rest. No need to copy any of it around, that's just useless code duplication. Just put them in the ich_gpio_raise() function, they're fine in there. We should strive to keep the board enables 1. short and 2. easy to understand. The old code clearly fails #2, while some of the new proposals fail #1. Apart from that, this discussion really helps us define our goals for the future. Regards, Carl-Daniel As said before, do not abstract away too much, then people will end up working around the abstraction later on when they find they need to. The dev finding can be improved, but this is not the sort of improvement that should alter the behaviour of the gpio setting itself, and therefor is of less importance than the harder to test things this patch does. Luc Verhaegen. ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On 23.10.2009 16:27, Luc Verhaegen wrote: On Fri, Oct 23, 2009 at 01:41:41AM +0200, Carl-Daniel Hailfinger wrote: On 22.10.2009 15:16, Luc Verhaegen wrote: I prefer to see this: { struct pci_dev *dev; dev = pci_dev_find(0x8086, 0x27b8); /* Intel ICH7 LPC */ if (!dev) { fprintf(stderr, \nERROR: Intel ICH7 LPC bridge not found.\n); The line above is chipset specific and does not belong in board code. Boards are very heavily tied to chipsets. Quite often, southbridge manufacturers do not provide complete drop-in replacements for new chipsets, and boards come with the same chipset even if they run a bit longer, just with different revisions. Yes, but the way you suggested keeps the description around in a comment and an error message. That's duplication. Once you have seen a few of those pci dev finding things, and they all get copy/pasted around anyway, you quickly see what is important to them, and they are all very formulaic anyway. You learn to ignore the rest. What could be done is the following: /** * Saves a few lines per board enable routine. */ struct pci_dev *pci_dev_find_board(uint8_t vendor, uint8_t device, char *name) { struct pci_dev *dev; dev = pci_dev_find(vendor, device); if (!dev) fprintf(stderr, \nERROR: %s not found.\n); return dev; } Which then turns the first board enable into the following: { struct pci_dev *dev; dev = pci_dev_find_board(0x8086, 0x27b8, Intel ICH7 LPC bridge); Two ways to make the above acceptable: - Call it pci_dev_find_intel and remove the vendorid+name parameter. - Call it pci_dev_find_name and remove the name parameter. As I wrote above, my major objection is having the chipset name in a board function. This does not scale and leads to exactly those problems we have now with the board enable table (copy and paste without thinking). Well, if we provide bare pciids, people will add comments or would want to see them anyway. This argument list there provides documentation in the same go. Let's use your original pci_dev_find variant and refactor it later. Right now this discussion is leading nowhere and I want the important parts of the patch merged. No, the size of the BAR differs depending on the chipset generation. One of the parameters of the old function was the mask for the BAR address and that parameter was wrong in some cases. Since your patch also has the same mask for all generations, the bug has been carried forward (I won't blame you for this). This i have checked. All of the intel ICHs have the lower bits zeroed per definition (except bit 0 which is 1 for this being an io bar). Everyone is having 5:1 zeroed, except the very latest (9 10) which have 6:1 zeroed. So this mask thing does not matter. Ah ok. But please add your explanation above as a comment to the generic ICH function. I changed this only later on, as it really made the whole thing clearer. Working with a gpio_byte = gpio / 8; gpio_bit = gpio % 8; and then using INB/OUTB is just 3 lines more, and another + gpio_byte in each INB/OUTB, but this is of course quite acceptable. Do the new and old chipset generations handle byte accesses gracefully or do they expect dword accesses? I do not think that such detail is given in the datasheets or whether it really matters. Since i do not have any intel hw, i also cannot go and find out and i will have to depend on people testing this. I expect both to be just fine. If we get reports from our testers that everything is fine indeed, I'm OK with either byte or word or dword access. Since we're already in the process of designing this function in a way that is future-proof, I'd like to have undo (restore) ability for board enables which will be called from programmer_shutdown. If this was just a matter of touching at most one GPIO per flashrom execution, it would be simple to use static variables for saving the old state. Since we do touch more than one GPIO line for some boards, this is a bit more complicated. Redesigning the code yet another time later would make this whole discussion obsolete and waste some of the effort which has been put in. We need a way to store the signal/direction/level tuple for every GPIO this function is called for, and enable per-GPIO restore. One way would be to have this function keep a list of GPIOs it touched and for every touched GPIO keep the state tuple in a locally allocated data structure. The function would take an additional parameter enum action: set_bit/clear_bit/restore_bit. Oh, please don't. This is a lot of hassle and not really necessary. I can understand if you want this to happen for chipset enable, there it is just fine, and the overhead is little. For the board specific enable i would not like to see this at all.
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
2009/10/24 Luc Verhaegen l...@skynet.be On Fri, Oct 23, 2009 at 06:49:18PM +0200, Carl-Daniel Hailfinger wrote: On 23.10.2009 16:27, Luc Verhaegen wrote: On Fri, Oct 23, 2009 at 01:41:41AM +0200, Carl-Daniel Hailfinger wrote: Boards are very heavily tied to chipsets. Quite often, southbridge manufacturers do not provide complete drop-in replacements for new chipsets, and boards come with the same chipset even if they run a bit longer, just with different revisions. Yes, but the way you suggested keeps the description around in a comment and an error message. That's duplication. Yeah, we can do away with this duplication by turning that into one function which takes the name as the argument. Once you have seen a few of those pci dev finding things, and they all get copy/pasted around anyway, you quickly see what is important to them, and they are all very formulaic anyway. You learn to ignore the rest. What could be done is the following: /** * Saves a few lines per board enable routine. */ struct pci_dev *pci_dev_find_board(uint8_t vendor, uint8_t device, char *name) { struct pci_dev *dev; dev = pci_dev_find(vendor, device); if (!dev) fprintf(stderr, \nERROR: %s not found.\n); return dev; } Which then turns the first board enable into the following: { struct pci_dev *dev; dev = pci_dev_find_board(0x8086, 0x27b8, Intel ICH7 LPC bridge); Two ways to make the above acceptable: - Call it pci_dev_find_intel and remove the vendorid+name parameter. - Call it pci_dev_find_name and remove the name parameter. As I wrote above, my major objection is having the chipset name in a board function. This does not scale and leads to exactly those problems we have now with the board enable table (copy and paste without thinking). Well, if we provide bare pciids, people will add comments or would want to see them anyway. This argument list there provides documentation in the same go. Let's use your original pci_dev_find variant and refactor it later. Right now this discussion is leading nowhere and I want the important parts of the patch merged. Yeah, this way it is at least in the same shape as the other functions, and this refactoring (of all) can be done later without much danger, the touching of extra gpio bits now is much more likely to break things. This i have checked. All of the intel ICHs have the lower bits zeroed per definition (except bit 0 which is 1 for this being an io bar). Everyone is having 5:1 zeroed, except the very latest (9 10) which have 6:1 zeroed. So this mask thing does not matter. Ah ok. But please add your explanation above as a comment to the generic ICH function. Done. If we get reports from our testers that everything is fine indeed, I'm OK with either byte or word or dword access. Wait and see. I will try to get this one board enable resent, on top of this patch here. And will get idwer his board enable out (finally). This is two more testcases. The pain is in boards with multiple flash chips where flashrom may toggle the chip select lines in the future (DualBIOS). Anyway, we can handle this later. Right, solve it when it occurs and when we know what it is exactly that we need to do. If it works, no objection from my side. So then we are just waiting for testers ;) * part of the dell comment restored. That one is crucial. For referrence, here's the rewritten comment which would be OK for me: Suited for the Dell PowerEdge 1850. The GPIO number has to be in the range [16,31] according to the public Intel 82801EB ICH5 / 82801ER ICH5R datasheet and was found by exhaustive search. Done. Acked-by: Idwer Vollering vid...@gmail.com Latest patch attached, difference is just those two comments and the intel_ prependage (and the fact that i now went to git-svn so i can juggle the patches more easily). INL/OUTL was kept while waiting for testing. Luc Verhaegen. ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On 22.10.2009 15:16, Luc Verhaegen wrote: We are writing flashrom here. We are dealing with bits and pci-ids. Lots of them. If we cannot see the important things because we abstracted too far or too little, then we fail. I agree that finding the right abstraction level is key. I prefer to see this: { struct pci_dev *dev; dev = pci_dev_find(0x8086, 0x27b8); /* Intel ICH7 LPC */ if (!dev) { fprintf(stderr, \nERROR: Intel ICH7 LPC bridge not found.\n); The line above is chipset specific and does not belong in board code. return -1; } ich_gpio_raise(dev, 34); /* #TBL */ ich_gpio_raise(dev, 35); /* #WP */ return 0; } Over the completely impossible: { int ret; ret = ich_gpio_raise(name, 0x8086, 0x27B8, 0x48, 0x0c, 0xffc0, 34); if (!ret) ret = ich_gpio_raise(name, 0x8086, 0x27B8, 0x48, 0x0c, 0xffc0, 35); return ret; } I won't claim the old interface was perfect. It definitely had too many parameters. Or even this, which still does not make me comfortable, and which requires the big switch statement in the ich_gpio_raise function anyway. { int ret; ret = ich_gpio_raise(name, 0x27B8, 34); if (!ret) ret = ich_gpio_raise(name, 0x27B8, 35); return ret; } The example above has pretty readable code, though we could argue about whether it is a good that you have to specify the ID twice. Once you have seen a few of those pci dev finding things, and they all get copy/pasted around anyway, you quickly see what is important to them, and they are all very formulaic anyway. You learn to ignore the rest. What could be done is the following: /** * Saves a few lines per board enable routine. */ struct pci_dev *pci_dev_find_board(uint8_t vendor, uint8_t device, char *name) { struct pci_dev *dev; dev = pci_dev_find(vendor, device); if (!dev) fprintf(stderr, \nERROR: %s not found.\n); return dev; } Which then turns the first board enable into the following: { struct pci_dev *dev; dev = pci_dev_find_board(0x8086, 0x27b8, Intel ICH7 LPC bridge); Two ways to make the above acceptable: - Call it pci_dev_find_intel and remove the vendorid+name parameter. - Call it pci_dev_find_name and remove the name parameter. As I wrote above, my major objection is having the chipset name in a board function. This does not scale and leads to exactly those problems we have now with the board enable table (copy and paste without thinking). if (!dev) return -1; ich_gpio_raise(dev, 34); /* #TBL */ ich_gpio_raise(dev, 35); /* #WP */ return 0; } It saves us from a pair of {} and an fprintf, and pretty much takes the comment in as an argument. But this is as far as it goes in a productive and maintainable manner, and the only further reduction in codesize i would accept. Going any further will make the whole thing less immediately readable. But since we are going to make this saving on 19 board enables already (not counting the pending ones), we probably should consider this change. We really have enough of these board enables today to be able to see some lines in there today. We can see the most important one now, and we are slowly acquiring the routines for touching gpio lines on common LPC/ISA bridges for most vendors now; we have via, nvidia and intel now, and the board enables for those are pretty much all the same formula: * find device. * vendor_devicefamily_gpio_set(device, gpio) And we have many of those sitting in our board_enable.c with many more probably following. And a few of them already touch multiple gpio lines. When i originally set up this table, i intended for the first device in the list to be passed as the device that should be poked for such things. But things evolved differently for several reasons: * not all board enables touch the pci devices or their io areas. * one did not get a pretty print message when the device was not found. * people felt safer with an extra check in the board enable. * it was not clear enough from the onset of this table that this first device was meant to be the passed and used when needed. But then, quite a few of the earlier board enables treated the pciids rather stepmotherly anyway. * the ISA/LPC bridge was not always a good entry for matching a board uniquely. Yes, the table evolved in unexpected ways. If we move to a three device table (let's postpone that until actually completely unavoidable), then maybe we should reconsider using a fixed entry as to avoid having to find the device inside the board enable, but not before. About the bug, would this be endianness in the longs? No, the size of the BAR differs depending on the chipset generation. One of the
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On 22.10.2009 23:44, Uwe Hermann wrote: On Thu, Oct 22, 2009 at 03:16:16PM +0200, Luc Verhaegen wrote: I agree we should drop the totally useless 0x48 register index, 0x0c offset, and 0xffc0 bitmask from the function prototype. Absolutely. Also, IMHO name is pretty useless, it's on my TODO list to drop that anyway. Indeed. However, I very much think that we _do_ want the PCI IDs to stay in there. Example call would look like this: ich_gpio_raise(name, 0x8086, 0x27B8, 34); I'm fine with also dropping 0x8086 (PCI vendor ID) as that should always be the same for the ich_* function. If we later also drop name this becomes: ich_gpio_raise(0x27B8, 34); Which is perfect. Hm yes. It is a bit ugly in the case of multiple GPIOs per board, but other than that... please see my mail from a few minutes ago for more commentary. Or even this, which still does not make me comfortable, and which requires the big switch statement in the ich_gpio_raise function anyway. { int ret; ret = ich_gpio_raise(name, 0x27B8, 34); if (!ret) ret = ich_gpio_raise(name, 0x27B8, 35); return ret; } This is perfectly fine if you ask me. Many board enables only raise one pin and thus are as simple as: { return ich_gpio_raise(name, 0x27B8, 34); } Which I like a lot. And the above example is very nice and readable,too. Well yes. Once you have seen a few of those pci dev finding things, and they all get copy/pasted around anyway, you quickly see what is important to them, and they are all very formulaic anyway. You learn to ignore the rest. No need to copy any of it around, that's just useless code duplication. Just put them in the ich_gpio_raise() function, they're fine in there. We should strive to keep the board enables 1. short and 2. easy to understand. The old code clearly fails #2, while some of the new proposals fail #1. Apart from that, this discussion really helps us define our goals for the future. Regards, Carl-Daniel -- Developer quote of the week: We are juggling too many chainsaws and flaming arrows and tigers. ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On 23.10.2009 01:41, Carl-Daniel Hailfinger wrote: On 22.10.2009 15:16, Luc Verhaegen wrote: Also, we are no longer fully on par with the previous board enables which used to touch one bit only per gpio line. Now we touch three. Idwer has a board which requires us to set the first bit (signal to gpio) and the third (gpio level), and it can be forseen that the input/output also needs to be set somewhere in future. Since we need to go through the pain of getting this code tested on a representative subset of this hardware anyway, why not go for a fuller test which will hopefully stand the test of time better? [...] We need a way to store the signal/direction/level tuple for every GPIO this function is called for, and enable per-GPIO restore. One way would be to have this function keep a list of GPIOs it touched and for every touched GPIO keep the state tuple in a locally allocated data structure. The function would take an additional parameter enum action: set_bit/clear_bit/restore_bit. One more thought: Instead of writing the whole tuple without checking the old value, can we add some debugging instead? I.e. printf_debug(Changing signal to GPIO) if the signal was previously set to an alternate function, and being silent in the case where everything is already set up correctly? Regards, Carl-Daniel -- Developer quote of the week: We are juggling too many chainsaws and flaming arrows and tigers. ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Re: [flashrom] [PATCH] Boards: Unify all intel ICH GPIO raising.
On 22.10.2009 02:56, Luc Verhaegen wrote: Ok, big change here which will require several of the people on the list below to test and Ack this patch. But one has to admit; the result is worth it. Before anybody tests: AFAICS the patch has a bug in the bitmask code which was already present in the old code, but the new code makes it harder to fix. Besides that, duplicating pci_dev_find in every board function strikes me as something that was better in the old code. I do agree that the old code required too much chipset knowledge into the board functions, so this patch does improve the situation in that regard. Luc, if you want me to go in detail I can do that after I've gotten some sleep. So it is pretty likely that we'll see another iteration of the patch which has to be tested as well... Regards, Carl-Daniel -- Developer quote of the week: We are juggling too many chainsaws and flaming arrows and tigers. ___ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom