Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-25 Thread J. Gareth Moreton via fpc-devel
Correction to last post.  When applying BZHI to an input ("Result := Input and ((1 shl x) - 1)"), the initial "mov $-1,%eax" is unnecessary unless the mask is being preserved, and is just: bzhil %ecx,(ref-to-Input),%eax Kit On 25/10/2022 13:44, J. Gareth Moreton via fpc-devel wrote: What I

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-25 Thread J. Gareth Moreton via fpc-devel
What I want to do is the following... Say I have the expression "(1 shl x) - 1"... under the default AMD Athlon optimisations, you might get something like this: (x in %cl, Result in %eax) movl $1,%eax shll %cl,%eax subl $1,%eax Under -CpCOREAVX2, you might get this (ignoring any

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread J. Gareth Moreton via fpc-devel
Thanks Michael.  Sven already filled me in - the more I learn! Kit On 24/10/2022 16:44, Michael Van Canneyt via fpc-devel wrote: On Mon, 24 Oct 2022, J. Gareth Moreton via fpc-devel wrote: That's useful - thank you.  Michael Van Canneyt mentioend he updated the documentation for this -

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread Michael Van Canneyt via fpc-devel
On Mon, 24 Oct 2022, J. Gareth Moreton via fpc-devel wrote: That's useful - thank you.  Michael Van Canneyt mentioend he updated the documentation for this - where is this usually located? It's not here, for example: https://www.freepascal.org/docs-html/ref/refsu45.html Daily

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread J. Gareth Moreton via fpc-devel
The more I learn! On 24/10/2022 13:06, Sven Barth wrote: J. Gareth Moreton via fpc-devel schrieb am Mo., 24. Okt. 2022, 13:52: That's useful - thank you.  Michael Van Canneyt mentioend he updated the documentation for this - where is this usually located? It's not here,

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread Sven Barth via fpc-devel
J. Gareth Moreton via fpc-devel schrieb am Mo., 24. Okt. 2022, 13:52: > That's useful - thank you. Michael Van Canneyt mentioend he updated the > documentation for this - where is this usually located? It's not here, > for example: https://www.freepascal.org/docs-html/ref/refsu45.html That is

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread J. Gareth Moreton via fpc-devel
That's useful - thank you.  Michael Van Canneyt mentioend he updated the documentation for this - where is this usually located? It's not here, for example: https://www.freepascal.org/docs-html/ref/refsu45.html Kit On 24/10/2022 11:58, Kai Burghardt via fpc-devel wrote: Hi there: On

Re: [fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread Kai Burghardt via fpc-devel
Hi there: On 2022‑10‑24 11:51:32 +0100, J. Gareth Moreton via fpc-devel wrote: > [...] I've come across one situation that I need clarity on... how > are SHL and SHR instructions handled if the shift value exceeds the word > size? About a half year ago I raised a documentation issue regarding

[fpc-devel] Policy regarding SHL/SHR under x86

2022-10-24 Thread J. Gareth Moreton via fpc-devel
Hi everyone, I'm looking at more optimisations under x86_64 that use the BMI instructions.  I've come across one situation that I need clarity on... how are SHL and SHR instructions handled if the shift value exceeds the word size? For example, say I have the code "power2 := 1 shl