Re: XSAVE vs. XSAVEOPT in fpusave / fpu_kern_enter?

2017-08-15 Thread Konstantin Belousov
On Mon, Aug 14, 2017 at 08:42:35PM +, Rang, Anton wrote: > Hi, > > While glancing at fpu_kern_enter, I noticed that fpusave() uses the > XSAVE instruction, but not XSAVEOPT. The instance in cpu_switch.S is > patched if XSAVEOPT is available, but should we also be able to us

Re: XSAVE vs. XSAVEOPT in fpusave / fpu_kern_enter?

2017-08-14 Thread Bruce Evans
On Mon, 14 Aug 2017, Rang, Anton wrote: While glancing at fpu_kern_enter, I noticed that fpusave() uses the XSAVE instruction, but not XSAVEOPT. The instance in cpu_switch.S is patched if XSAVEOPT is available, but should we also be able to use XSAVEOPT in fpusave as well? I can't se

XSAVE vs. XSAVEOPT in fpusave / fpu_kern_enter?

2017-08-14 Thread Rang, Anton
Hi, While glancing at fpu_kern_enter, I noticed that fpusave() uses the XSAVE instruction, but not XSAVEOPT. The instance in cpu_switch.S is patched if XSAVEOPT is available, but should we also be able to use XSAVEOPT in fpusave as well? I can't see any reason why not, but I'm not

Re: XSAVEOPT

2012-07-09 Thread Konstantin Belousov
On Mon, Jul 09, 2012 at 11:24:52AM -0400, John Baldwin wrote: > On Sunday, July 08, 2012 11:02:25 am Konstantin Belousov wrote: > > Please find at > > http://people.freebsd.org/~kib/misc/xsaveopt.1.patch > > a patch to finally add suport for using XSAVEOPT for our amd64 co

Re: XSAVEOPT

2012-07-09 Thread John Baldwin
On Sunday, July 08, 2012 11:02:25 am Konstantin Belousov wrote: > Please find at > http://people.freebsd.org/~kib/misc/xsaveopt.1.patch > a patch to finally add suport for using XSAVEOPT for our amd64 context > switch code. See Intel SDM for description of the XSAVEOPT instruction. >

XSAVEOPT

2012-07-08 Thread Konstantin Belousov
Please find at http://people.freebsd.org/~kib/misc/xsaveopt.1.patch a patch to finally add suport for using XSAVEOPT for our amd64 context switch code. See Intel SDM for description of the XSAVEOPT instruction. Summary is that the instruction allows to not write parts of the FPU state which was