On Wed, Nov 06, 2013 at 12:30:05PM -0500, John Baldwin wrote:
On Wednesday, November 06, 2013 4:12:24 am Dmitry Luhtionov wrote:
--- /usr/src/sys/amd64//amd64/identcpu.c.orig2013-11-01
14:43:15.0 +0200
+++ /usr/src/sys/amd64//amd64/identcpu.c2013-11-04 12:06:06.0
+0200
@@ -366,14 +366,14 @@
\017b14
\020LWP/* Lightweight Profiling */
\021FMA4/* 4-operand FMA instructions */
-\022b17
+\022TCE/* Translation Cache Extension */
\023b18
\024NodeId/* NodeId MSR support */
\025b20
\026TBM/* Trailing Bit Manipulation */
\027Topology/* Topology Extensions */
-\030b23
-\031b24
+\030PCXC/* Core performance counter extensions */
+\031PNXC/* NB performance counter extensions */
\032b25
\033b26
\034b27
It would be best to also add flags for these in specialreg.h as well. The
i386 identcpu.c might also need updating.
There is apparently more bits defined in the BKDG for Kabini.
Below is the patch which I plan to commit shortly.
diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c
index 27ea9a6..3712fc0 100644
--- a/sys/amd64/amd64/identcpu.c
+++ b/sys/amd64/amd64/identcpu.c
@@ -366,18 +366,18 @@ printcpuinfo(void)
\017b14
\020LWP /* Lightweight Profiling */
\021FMA4 /* 4-operand FMA instructions */
- \022b17
+ \022TCE /* Translation Cache Extension
*/
\023b18
\024NodeId/* NodeId MSR support */
\025b20
\026TBM /* Trailing Bit Manipulation */
\027Topology /* Topology Extensions */
- \030b23
- \031b24
+ \030PCXC /* Core perf count */
+ \031PNXC /* NB perf count */
\032b25
- \033b26
- \034b27
- \035b28
+ \033DBE /* Data Breakpoint extension */
+ \034PTSC /* Performance TSC */
+ \035PL2I /* L2I perf count */
\036b29
\037b30
\040b31
diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c
index beec9b1..1af3ac2 100644
--- a/sys/i386/i386/identcpu.c
+++ b/sys/i386/i386/identcpu.c
@@ -842,18 +842,18 @@ printcpuinfo(void)
\017b14
\020LWP /* Lightweight Profiling */
\021FMA4 /* 4-operand FMA instructions */
- \022b17
+ \022TCE /* Translation Cache Extension
*/
\023b18
\024NodeId/* NodeId MSR support */
\025b20
\026TBM /* Trailing Bit Manipulation */
\027Topology /* Topology Extensions */
- \030b23
- \031b24
+ \030PCXC /* Core perf count */
+ \031PNXC /* NB perf count */
\032b25
- \033b26
- \034b27
- \035b28
+ \033DBE /* Data Breakpoint extension */
+ \034PTSC /* Performance TSC */
+ \035PL2I /* L2I perf count */
\036b29
\037b30
\040b31
diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h
index 4247ee2..3d20e61 100644
--- a/sys/x86/include/specialreg.h
+++ b/sys/x86/include/specialreg.h
@@ -201,9 +201,15 @@
#defineAMDID2_WDT 0x2000
#defineAMDID2_LWP 0x8000
#defineAMDID2_FMA4 0x0001
+#defineAMDID2_TCE 0x0002
#defineAMDID2_NODE_ID 0x0008
#defineAMDID2_TBM 0x0020
#defineAMDID2_TOPOLOGY 0x0040
+#defineAMDID2_PCXC 0x0080
+#defineAMDID2_PNXC 0x0100
+#defineAMDID2_DBE 0x0400
