Re: [PATCH] PCI bus number management
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 02/06/14 14:37, John Baldwin wrote: I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) My Toshiba Satellite A-105 survives all three with one oddity - when 'clear_bars' is set, it recognizes that a USB mouse is attached but neither the external USB drive or webcam. imb -BEGIN PGP SIGNATURE- Version: GnuPG v1 iEYEARECAAYFAlL6Fs4ACgkQQv9rrgRC1JJH4ACeMVHmW4W5LZgp+9MSPrONnI06 Lo8AnjIj5acN1GNCL3Tjr9Pt/aawJ86u =B24W -END PGP SIGNATURE- ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
On 02/06/2014 08:37 PM, John Baldwin wrote: I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. This is a really bad idea, because BIOS/SMM tends to have those hardcoded. Or am I misunderstanding the purpose of this patch? Julian signature.asc Description: OpenPGP digital signature
Re: [PATCH] PCI bus number management
On Thursday, February 06, 2014 8:58:42 pm David Shane Holden wrote: On 02/06/14 14:37, John Baldwin wrote: I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates a bus resource from its parent bridge, and child bridges allocate their ranges from their parent devices. At the top of the PCI tree, the Host-PCI bridges allocate their respective bus ranges from their PCI domain/segment. There isn't really a device node for PCI domains, so I created a helper API that basically auto- creates a PCI bus rman for each domain on first use and then sub-allocates from that for Host-PCI bridges. The current patch (with some extra debugging) is at http://people.FreeBSD.org/~jhb/patches/pci_bus_rman.3.patch I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) Note that the patch only enables bus number management on amd64 and i386. I believe ia64 just needs to define PCI_RES_BUS for this to work since it mandates ACPI. Porting this to other platforms requires handling PCI_RES_BUS rseources for Host-PCI bridges in bus_alloc_resource(), bus_adjust_resource(), and bus_release_resource(). Setting all 3 on an Atom D510MO works fine. On a Lenovo W520 though hw.pci.clear_bars=1 causes a lockup during boot. The last few lines with a normal boot are: pcib0: ACPI Host-PCI bridge port 0xcf8-0xcff on acpi0 pcib0: decoding 5 range 0-0xfe pci0: ACPI PCI bus on pcib0 secbus=1, subbus=1 pci0:0:1:0: allocated initial secbus range While a verbose boot produces: pcib0: allocated type 3 (0xc400-0xc7ff) for rid 10 of pci:0:0:26:0 pcib0: matched entry for 0x26.INTA pcib0: slot 26 INTA hardwired to IRQ 26 And it ends there. Setting the other 2 are fine though. Ok, I think this may be a bit of a known issue in that some video cards really don't like having their framebuffer disabled, even temporarily. Thanks for testing! -- John Baldwin ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
On Friday, February 07, 2014 7:43:51 am Julian Stecklina wrote: On 02/06/2014 08:37 PM, John Baldwin wrote: I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. This is a really bad idea, because BIOS/SMM tends to have those hardcoded. Or am I misunderstanding the purpose of this patch? The BIOS just programs them initially. By default we use whatever the BIOS programs and only rely on this infrastructure if we need to grow the tree for some reason (e.g. hotplug). However, it is definitely valid for an OS to reassign bus numbers as it sees fit. -- John Baldwin ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
Works fine setting all 3 on a Samsung ATIV BOOK 2 model NP270E5E-K02IT on FreeBSD 11.0-CURRENT amd64 r261561 with NEWCONS. Maurizio ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
[PATCH] PCI bus number management
I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates a bus resource from its parent bridge, and child bridges allocate their ranges from their parent devices. At the top of the PCI tree, the Host-PCI bridges allocate their respective bus ranges from their PCI domain/segment. There isn't really a device node for PCI domains, so I created a helper API that basically auto- creates a PCI bus rman for each domain on first use and then sub-allocates from that for Host-PCI bridges. The current patch (with some extra debugging) is at http://people.FreeBSD.org/~jhb/patches/pci_bus_rman.3.patch I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) Note that the patch only enables bus number management on amd64 and i386. I believe ia64 just needs to define PCI_RES_BUS for this to work since it mandates ACPI. Porting this to other platforms requires handling PCI_RES_BUS rseources for Host-PCI bridges in bus_alloc_resource(), bus_adjust_resource(), and bus_release_resource(). -- John Baldwin ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
On Thu, Feb 6, 2014 at 2:37 PM, John Baldwin j...@freebsd.org wrote: I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates a bus resource from its parent bridge, and child bridges allocate their ranges from their parent devices. At the top of the PCI tree, the Host-PCI bridges allocate their respective bus ranges from their PCI domain/segment. There isn't really a device node for PCI domains, so I created a helper API that basically auto- creates a PCI bus rman for each domain on first use and then sub-allocates from that for Host-PCI bridges. The current patch (with some extra debugging) is at http://people.FreeBSD.org/~jhb/patches/pci_bus_rman.3.patch I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) Note that the patch only enables bus number management on amd64 and i386. I believe ia64 just needs to define PCI_RES_BUS for this to work since it mandates ACPI. Porting this to other platforms requires handling PCI_RES_BUS rseources for Host-PCI bridges in bus_alloc_resource(), bus_adjust_resource(), and bus_release_resource(). -- John Baldwin I get a 404 - Not Found trying to follow the link. ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
On Thu, Feb 6, 2014 at 2:47 PM, Thomas Hoffmann trh...@gmail.com wrote: On Thu, Feb 6, 2014 at 2:37 PM, John Baldwin j...@freebsd.org wrote: I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates a bus resource from its parent bridge, and child bridges allocate their ranges from their parent devices. At the top of the PCI tree, the Host-PCI bridges allocate their respective bus ranges from their PCI domain/segment. There isn't really a device node for PCI domains, so I created a helper API that basically auto- creates a PCI bus rman for each domain on first use and then sub-allocates from that for Host-PCI bridges. The current patch (with some extra debugging) is at http://people.FreeBSD.org/~jhb/patches/pci_bus_rman.3.patch I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) Note that the patch only enables bus number management on amd64 and i386. I believe ia64 just needs to define PCI_RES_BUS for this to work since it mandates ACPI. Porting this to other platforms requires handling PCI_RES_BUS rseources for Host-PCI bridges in bus_alloc_resource(), bus_adjust_resource(), and bus_release_resource(). -- John Baldwin I get a 404 - Not Found trying to follow the link. Got it by backing up one level on the link and selecting form the list. ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
On Thursday, February 06, 2014 2:47:09 pm Thomas Hoffmann wrote: On Thu, Feb 6, 2014 at 2:37 PM, John Baldwin j...@freebsd.org wrote: I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates a bus resource from its parent bridge, and child bridges allocate their ranges from their parent devices. At the top of the PCI tree, the Host-PCI bridges allocate their respective bus ranges from their PCI domain/segment. There isn't really a device node for PCI domains, so I created a helper API that basically auto- creates a PCI bus rman for each domain on first use and then sub-allocates from that for Host-PCI bridges. The current patch (with some extra debugging) is at http://people.FreeBSD.org/~jhb/patches/pci_bus_rman.3.patch I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) Note that the patch only enables bus number management on amd64 and i386. I believe ia64 just needs to define PCI_RES_BUS for this to work since it mandates ACPI. Porting this to other platforms requires handling PCI_RES_BUS rseources for Host-PCI bridges in bus_alloc_resource(), bus_adjust_resource(), and bus_release_resource(). -- John Baldwin I get a 404 - Not Found trying to follow the link. Oops, it is: http://people.freebsd.org/~jhb/patches/pci_bus_rman3.patch -- John Baldwin ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
Re: [PATCH] PCI bus number management
On 02/06/14 14:37, John Baldwin wrote: I have a patch to teach the PCI bus code and PCI-PCI bridge driver to manage PCI bus numbers. The approach is somewhat similar to how NEW_PCIB manages I/O windows for briges. Each bridge creates an rman to manage the bus numbers for all buses and bridges that live below it. Each bus allocates a bus resource from its parent bridge, and child bridges allocate their ranges from their parent devices. At the top of the PCI tree, the Host-PCI bridges allocate their respective bus ranges from their PCI domain/segment. There isn't really a device node for PCI domains, so I created a helper API that basically auto- creates a PCI bus rman for each domain on first use and then sub-allocates from that for Host-PCI bridges. The current patch (with some extra debugging) is at http://people.FreeBSD.org/~jhb/patches/pci_bus_rman.3.patch I would like to commit this to HEAD soon but thought I would post it for some pre-commit testing for the brave. :) If you are really brave, try booting with 'hw.pci.clear_buses=1' which will force the kernel to renumber all buses in the system. If you are really, really brave, try booting with 'hw.pci.clear_bars=1', 'hw.pci.clear_buses=1', and 'hw.pci.clear_pcib=1'. (My laptop survives with all those set) Note that the patch only enables bus number management on amd64 and i386. I believe ia64 just needs to define PCI_RES_BUS for this to work since it mandates ACPI. Porting this to other platforms requires handling PCI_RES_BUS rseources for Host-PCI bridges in bus_alloc_resource(), bus_adjust_resource(), and bus_release_resource(). Setting all 3 on an Atom D510MO works fine. On a Lenovo W520 though hw.pci.clear_bars=1 causes a lockup during boot. The last few lines with a normal boot are: pcib0: ACPI Host-PCI bridge port 0xcf8-0xcff on acpi0 pcib0: decoding 5 range 0-0xfe pci0: ACPI PCI bus on pcib0 secbus=1, subbus=1 pci0:0:1:0: allocated initial secbus range While a verbose boot produces: pcib0: allocated type 3 (0xc400-0xc7ff) for rid 10 of pci:0:0:26:0 pcib0: matched entry for 0x26.INTA pcib0: slot 26 INTA hardwired to IRQ 26 And it ends there. Setting the other 2 are fine though. ___ freebsd-current@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-current To unsubscribe, send any mail to freebsd-current-unsubscr...@freebsd.org
