Hi,
On 27 August 2009 am 06:53:36 Steve Watt wrote:
In 4a954a35.4030...@icyb.net.ua, a...@icyb.net.ua wrote:
Assuming that ECC data lanes are connected between the two on
motherboard, and given that BIOS doesn't perform any ECC
setup (nor there is any option to control that) - would it be
On Thu, Aug 27, 2009 at 11:30:15AM +0800, Erich Dollansky wrote:
how should it be done at OS level at all when the OS is loaded
into RAM?
Copy the kernel to the video RAM, jump to it, enable ECC, copy back.
Joerg
___
freebsd-hackers@freebsd.org
Joerg Sonnenberger jo...@britannica.bec.de writes:
Erich Dollansky er...@apsara.com.sg writes:
how should it be done at OS level at all when the OS is loaded
into RAM?
Copy the kernel to the video RAM, jump to it, enable ECC, copy back.
Not just the kernel - you have to copy all the memory
In 200908271130.18073.er...@apsara.com.sg, er...@apsara.com.sg wrote:
Hi,
On 27 August 2009 am 06:53:36 Steve Watt wrote:
In 4a954a35.4030...@icyb.net.ua, a...@icyb.net.ua wrote:
Assuming that ECC data lanes are connected between the two on
motherboard, and given that BIOS doesn't perform any
Here is a question that I am afraid I know an answer for.
I have some ECC capable hardware:
1) Athlon II with embedded memory controller that can do ECC
2) DRAM modules with ECC
Assuming that ECC data lanes are connected between the two on motherboard, and
given that BIOS doesn't perform any ECC
In 4a954a35.4030...@icyb.net.ua, a...@icyb.net.ua wrote:
Here is a question that I am afraid I know an answer for.
I have some ECC capable hardware:
1) Athlon II with embedded memory controller that can do ECC
2) DRAM modules with ECC
Assuming that ECC data lanes are connected between the two on
6 matches
Mail list logo