Re: shared cache -- Re: SMP detection

2006-09-01 Thread Scott Bennett
On Thu, 31 Aug 2006 08:18:57 -0700 (PDT) backyard <[EMAIL PROTECTED]> wrote: >--- "Chad Leigh -- Shire.Net LLC" <[EMAIL PROTECTED]> >wrote: > >> >> On Aug 30, 2006, at 12:12 PM, backyard wrote: >> >> > with HT disabling in FreeBSD is more for the >> security >> > issues about a potential ex

Re: shared cache -- Re: SMP detection

2006-08-31 Thread Josh Carroll
Core 2 Duos have the EM64T extensions. Core Duos (Yonah) are a mobile chip only, not a full line of processors like the Core 2 architecture (Merom, Conroe, Woodcrest). I suspect the Core 2 chips do not suffer from the same security implications as HT-enabled processors. I'm not certain, but I thi

Re: shared cache -- Re: SMP detection

2006-08-31 Thread backyard
--- "Chad Leigh -- Shire.Net LLC" <[EMAIL PROTECTED]> wrote: > > On Aug 30, 2006, at 12:12 PM, backyard wrote: > > > with HT disabling in FreeBSD is more for the > security > > issues about a potential exploit whereby one > process > > in one pipe can access the priveledged information > of >

shared cache -- Re: SMP detection

2006-08-30 Thread Chad Leigh -- Shire.Net LLC
On Aug 30, 2006, at 12:12 PM, backyard wrote: with HT disabling in FreeBSD is more for the security issues about a potential exploit whereby one process in one pipe can access the priveledged information of a process in another pipe because the two cores share one processor cache and thus one c