Re: T7200 CPU not detected by est

2008-01-29 Thread Krassimir Slavchev
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Stefan Lambrev wrote:
 Greetings,
 
 Krassimir Slavchev wrote:
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 Hash: SHA1

 Stefan Lambrev wrote:
  
 Greetings,

 Krassimir Slavchev wrote:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1

 Ian Smith wrote:
  
  
 On Fri, 25 Jan 2008, John Baldwin wrote:
   On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
John Baldwin wrote:
 On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
 Hi folks,

 I have several systems using T7200 mobile CPUs running under
 7-stable.
 However, EST does not recognize the cpus. When loading
 cpufreq I get:

 You can try this patch.  It won't add support for all of the
 levels, but it
 will support the current level and the highest level (IIRC).

  It works now on my T7700:
   dev.est.0.%desc: Enhanced SpeedStep Frequency Control
dev.est.0.%driver: est
dev.est.0.%parent: cpu0
dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000
 1600/22000
1200/16000
dev.est.1.%desc: Enhanced SpeedStep Frequency Control
dev.est.1.%driver: est
dev.est.1.%parent: cpu1
dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000
 1600/22000
1200/16000
 Odd, it shouldn't have provided that many settings.  It also
 doesn't
   provide power info.  I wonder if you are getting the settings from
   ACPI.

 Assuming so, wouldn't this seem to be an instance needing the recent:

  kern/114722: [acpi] [patch] Nearly duplicate p-state entries
 reported  http://www.freebsd.org/cgi/query-pr.cgi?pr=114722
 
 With this patch the result is the same.
 
 Patched src/sys/kern/kern_cpu.c is already in RELENG_7_0.
 It was submitted 8 days ago.
 Are you sure your sources are newer then this?

 

 No, they where almost 2 weeks older.
 I have just upgraded to todays 7.0 and the result is the same.

   
 Can you show me the result of: sysctl dev.cpu.0.freq_levels

dev.cpu.0.freq_levels: 2401/35000 2100/30625 2000/28000 1750/24500
1600/22000 1400/19250
1200/16000 1050/14000 900/12000 800/14000 700/12250 600/10500 500/8750
400/7000 300/5250
200/3500 100/1750

 
 May be est driver doesn't use the patched function in
 src/sys/kern/kern_cpu.c ?
 
 Also do you see any problems with this? :)

No

 Powerd should work because it reads dev.cpu.0.freq_levels

May be, I have to disable acpi to have bge :(

 
 CC Nate Lawson.
 

Best Regards

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Re: T7200 CPU not detected by est

2008-01-29 Thread Stefan Lambrev

Greetings,

Krassimir Slavchev wrote:

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Hash: SHA1

Stefan Lambrev wrote:
  

Greetings,

Krassimir Slavchev wrote:


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Hash: SHA1

Ian Smith wrote:
 
  

On Fri, 25 Jan 2008, John Baldwin wrote:
  On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
   John Baldwin wrote:
On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
Hi folks,
   
I have several systems using T7200 mobile CPUs running under
7-stable.
However, EST does not recognize the cpus. When loading
cpufreq I get:
   
You can try this patch.  It won't add support for all of the
levels, but it
will support the current level and the highest level (IIRC).
   
 It works now on my T7700:
  dev.est.0.%desc: Enhanced SpeedStep Frequency Control
   dev.est.0.%driver: est
   dev.est.0.%parent: cpu0
   dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000
1600/22000
   1200/16000
   dev.est.1.%desc: Enhanced SpeedStep Frequency Control
   dev.est.1.%driver: est
   dev.est.1.%parent: cpu1
   dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000
1600/22000
   1200/16000
Odd, it shouldn't have provided that many settings.  It also
doesn't
  provide power info.  I wonder if you are getting the settings from
  ACPI.

Assuming so, wouldn't this seem to be an instance needing the recent:

 kern/114722: [acpi] [patch] Nearly duplicate p-state entries
reported  http://www.freebsd.org/cgi/query-pr.cgi?pr=114722



With this patch the result is the same.
  
  

Patched src/sys/kern/kern_cpu.c is already in RELENG_7_0.
It was submitted 8 days ago.
Are you sure your sources are newer then this?




No, they where almost 2 weeks older.
I have just upgraded to todays 7.0 and the result is the same.

  

Can you show me the result of: sysctl dev.cpu.0.freq_levels

May be est driver doesn't use the patched function in 
src/sys/kern/kern_cpu.c ?


Also do you see any problems with this? :)
Powerd should work because it reads dev.cpu.0.freq_levels

CC Nate Lawson.

--

Best Wishes,
Stefan Lambrev
ICQ# 24134177


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Re: T7200 CPU not detected by est

2008-01-29 Thread Krassimir Slavchev
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Hash: SHA1

Stefan Lambrev wrote:
 Greetings,
 
 Krassimir Slavchev wrote:
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1

 Ian Smith wrote:
  
 On Fri, 25 Jan 2008, John Baldwin wrote:
   On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
John Baldwin wrote:
 On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
 Hi folks,

 I have several systems using T7200 mobile CPUs running under
 7-stable.
 However, EST does not recognize the cpus. When loading
 cpufreq I get:

 You can try this patch.  It won't add support for all of the
 levels, but it
 will support the current level and the highest level (IIRC).

  It works now on my T7700:
   dev.est.0.%desc: Enhanced SpeedStep Frequency Control
dev.est.0.%driver: est
dev.est.0.%parent: cpu0
dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000
 1600/22000
1200/16000
dev.est.1.%desc: Enhanced SpeedStep Frequency Control
dev.est.1.%driver: est
dev.est.1.%parent: cpu1
dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000
 1600/22000
1200/16000
 Odd, it shouldn't have provided that many settings.  It also
 doesn't
   provide power info.  I wonder if you are getting the settings from
   ACPI.

 Assuming so, wouldn't this seem to be an instance needing the recent:

  kern/114722: [acpi] [patch] Nearly duplicate p-state entries
 reported  http://www.freebsd.org/cgi/query-pr.cgi?pr=114722
 

 With this patch the result is the same.
   
 Patched src/sys/kern/kern_cpu.c is already in RELENG_7_0.
 It was submitted 8 days ago.
 Are you sure your sources are newer then this?
 

No, they where almost 2 weeks older.
I have just upgraded to todays 7.0 and the result is the same.


Best Regards


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Re: T7200 CPU not detected by est

2008-01-28 Thread Stefan Lambrev

Greetings,

Krassimir Slavchev wrote:

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Hash: SHA1

Ian Smith wrote:
  

On Fri, 25 Jan 2008, John Baldwin wrote:
  On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
   John Baldwin wrote:
On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
Hi folks,
   
I have several systems using T7200 mobile CPUs running under 7-stable.
However, EST does not recognize the cpus. When loading cpufreq I get:
   
You can try this patch.  It won't add support for all of the levels, but 
it
will support the current level and the highest level (IIRC).
   
   
   
   It works now on my T7700:
   
   dev.est.0.%desc: Enhanced SpeedStep Frequency Control

   dev.est.0.%driver: est
   dev.est.0.%parent: cpu0
   dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
   1200/16000
   dev.est.1.%desc: Enhanced SpeedStep Frequency Control
   dev.est.1.%driver: est
   dev.est.1.%parent: cpu1
   dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
   1200/16000
  
  Odd, it shouldn't have provided that many settings.  It also doesn't

  provide power info.  I wonder if you are getting the settings from
  ACPI.

Assuming so, wouldn't this seem to be an instance needing the recent:

 kern/114722: [acpi] [patch] Nearly duplicate p-state entries reported 
 http://www.freebsd.org/cgi/query-pr.cgi?pr=114722



With this patch the result is the same.
  

Patched src/sys/kern/kern_cpu.c is already in RELENG_7_0.
It was submitted 8 days ago.
Are you sure your sources are newer then this?
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Re: T7200 CPU not detected by est

2008-01-27 Thread Krassimir Slavchev
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Hash: SHA1

Ian Smith wrote:
 On Fri, 25 Jan 2008, John Baldwin wrote:
   On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
John Baldwin wrote:
 On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
 Hi folks,

 I have several systems using T7200 mobile CPUs running under 7-stable.
 However, EST does not recognize the cpus. When loading cpufreq I get:

 You can try this patch.  It won't add support for all of the levels, 
 but it
 will support the current level and the highest level (IIRC).



It works now on my T7700:

dev.est.0.%desc: Enhanced SpeedStep Frequency Control
dev.est.0.%driver: est
dev.est.0.%parent: cpu0
dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
1200/16000
dev.est.1.%desc: Enhanced SpeedStep Frequency Control
dev.est.1.%driver: est
dev.est.1.%parent: cpu1
dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
1200/16000
   
   Odd, it shouldn't have provided that many settings.  It also doesn't
   provide power info.  I wonder if you are getting the settings from
   ACPI.
 
 Assuming so, wouldn't this seem to be an instance needing the recent:
 
  kern/114722: [acpi] [patch] Nearly duplicate p-state entries reported 
  http://www.freebsd.org/cgi/query-pr.cgi?pr=114722

With this patch the result is the same.

 
 ?
 
 cheers, Ian
 
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Re: T7200 CPU not detected by est

2008-01-25 Thread Krassimir Slavchev
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John Baldwin wrote:
 On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
 John Baldwin wrote:
 On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
 Hi folks,

 I have several systems using T7200 mobile CPUs running under 7-stable.
 However, EST does not recognize the cpus. When loading cpufreq I get:
 You can try this patch.  It won't add support for all of the levels, but it
 will support the current level and the highest level (IIRC).


 It works now on my T7700:

 dev.est.0.%desc: Enhanced SpeedStep Frequency Control
 dev.est.0.%driver: est
 dev.est.0.%parent: cpu0
 dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
 1200/16000
 dev.est.1.%desc: Enhanced SpeedStep Frequency Control
 dev.est.1.%driver: est
 dev.est.1.%parent: cpu1
 dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
 1200/16000
 
 Odd, it shouldn't have provided that many settings.  It also doesn't
 provide power info.  I wonder if you are getting the settings from
 ACPI.
 

That is the output of 'sysctl -a | grep dev.est' and I don't have any
additional settings.
May be something is wrong with the ACPI on this Acer notebook. There
were errors in the DSDT table but after fixing them the output is the
same. Actually I have problems with the bge card, it does not work with
acpi enabled because it can't map memory...
Let me know if you want any additional information?


Best Regards
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Re: T7200 CPU not detected by est

2008-01-25 Thread Ian Smith
On Fri, 25 Jan 2008, John Baldwin wrote:
  On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
   John Baldwin wrote:
On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
Hi folks,
   
I have several systems using T7200 mobile CPUs running under 7-stable.
However, EST does not recognize the cpus. When loading cpufreq I get:
   
You can try this patch.  It won't add support for all of the levels, but 
it
will support the current level and the highest level (IIRC).
   
   
   
   It works now on my T7700:
   
   dev.est.0.%desc: Enhanced SpeedStep Frequency Control
   dev.est.0.%driver: est
   dev.est.0.%parent: cpu0
   dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
   1200/16000
   dev.est.1.%desc: Enhanced SpeedStep Frequency Control
   dev.est.1.%driver: est
   dev.est.1.%parent: cpu1
   dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
   1200/16000
  
  Odd, it shouldn't have provided that many settings.  It also doesn't
  provide power info.  I wonder if you are getting the settings from
  ACPI.

Assuming so, wouldn't this seem to be an instance needing the recent:

 kern/114722: [acpi] [patch] Nearly duplicate p-state entries reported 
 http://www.freebsd.org/cgi/query-pr.cgi?pr=114722

?

cheers, Ian

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Re: T7200 CPU not detected by est

2008-01-25 Thread John Baldwin
On Wednesday 23 January 2008 02:42:52 am Krassimir Slavchev wrote:
 John Baldwin wrote:
  On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
  Hi folks,
 
  I have several systems using T7200 mobile CPUs running under 7-stable.
  However, EST does not recognize the cpus. When loading cpufreq I get:
 
  You can try this patch.  It won't add support for all of the levels, but it
  will support the current level and the highest level (IIRC).
 
 
 
 It works now on my T7700:
 
 dev.est.0.%desc: Enhanced SpeedStep Frequency Control
 dev.est.0.%driver: est
 dev.est.0.%parent: cpu0
 dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
 1200/16000
 dev.est.1.%desc: Enhanced SpeedStep Frequency Control
 dev.est.1.%driver: est
 dev.est.1.%parent: cpu1
 dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
 1200/16000

Odd, it shouldn't have provided that many settings.  It also doesn't
provide power info.  I wonder if you are getting the settings from
ACPI.

-- 
John Baldwin
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Re: T7200 CPU not detected by est

2008-01-22 Thread Gerrit Kühn
On Mon, 21 Jan 2008 09:01:02 -0800 Jeremy Chadwick [EMAIL PROTECTED]
wrote about Re: T7200 CPU not detected by est:

JC  Jan 18 23:18:14 comet kernel: est1: Enhanced SpeedStep Frequency
JC  Control on cpu1 Jan 18 23:18:14 comet kernel: est: CPU supports
JC  Control Enhanced Speedstep, but is not recognized. 
JC  Jan 18 23:18:14 comet kernel: est: cpu_vendor GenuineIntel, msr
JC  6130c2906000c29 Jan 18 23:18:14 comet kernel: device_attach: est1
JC  attach returned 6 

JC I see identical behaviour on our Supermicro PDSMI+ systems, using E6420
JC CPUs, so I don't believe the problem is specific to your motherboard or
JC certain Intel CPU models:

It is definitely not bound to certain mainboards, because I see it on
several different ones. However, I have only T-series CPUs to test.

JC CPU: Intel(R) Core(TM)2 CPU  6420  @ 2.13GHz (2128.01-MHz
JC 686-class CPU) acpi0: PTLTD   RSDT on motherboard
JC acpi0: [ITHREAD]
JC acpi0: Power Button (fixed)
JC cpu0: ACPI CPU on acpi0
JC est0: Enhanced SpeedStep Frequency Control on cpu0
JC est: CPU supports Enhanced Speedstep, but is not recognized.
JC est: cpu_vendor GenuineIntel, msr 82a082a0600082a
JC device_attach: est0 attach returned 6
JC cpu1: ACPI CPU on acpi0
JC est1: Enhanced SpeedStep Frequency Control on cpu1
JC est: CPU supports Enhanced Speedstep, but is not recognized.
JC est: cpu_vendor GenuineIntel, msr 82a082a0600082a
JC device_attach: est1 attach returned 6

Ok, so it's probably neither specific for CPUs nor for the mainbaords;
however, up to now all CPUs with this problem are Core2 CPUs.

JC In the case of our servers, we usually turn EIST off (this one
JC particular box has it enabled) because of the above problem -- but I'd
JC much rather have it turned on to help save power.  For a laptop or
JC workstation, however, I can see this being an incredibly important
JC feature.

I run low power workstations here which are intended to be used in a lab
environment, and I would very much like to have working power-saving
features (otherwise the whole setup is quite useless).

Can I somehow help debugging this, should I file a PR or are there any
further recommended things to do?


cu
  Gerrit
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Re: T7200 CPU not detected by est

2008-01-22 Thread Jeremy Chadwick
On Tue, Jan 22, 2008 at 09:47:56AM +0100, Gerrit Kühn wrote:
 Ok, so it's probably neither specific for CPUs nor for the mainbaords;
 however, up to now all CPUs with this problem are Core2 CPUs.
 
 JC In the case of our servers, we usually turn EIST off (this one
 JC particular box has it enabled) because of the above problem -- but I'd
 JC much rather have it turned on to help save power.  For a laptop or
 JC workstation, however, I can see this being an incredibly important
 JC feature.
 
 I run low power workstations here which are intended to be used in a lab
 environment, and I would very much like to have working power-saving
 features (otherwise the whole setup is quite useless).
 
 Can I somehow help debugging this, should I file a PR or are there any
 further recommended things to do?

I believe the problem is that our CPUs don't match any of the
identification verification methods performed in
src/sys/i386/cpufreq/est.c.

I should be able to make a patch for this, but will need time  -- our
to-be-dev/test C2D box sits in my living room waiting for CPUs to arrive
so it can be built.  :-)

If you'd like to file a PR in the meantime, that'd be great too; let me
know what the PR # is.

-- 
| Jeremy Chadwickjdc at parodius.com |
| Parodius Networking   http://www.parodius.com/ |
| UNIX Systems Administrator  Mountain View, CA, USA |
| Making life hard for others since 1977.  PGP: 4BD6C0CB |

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Re: T7200 CPU not detected by est

2008-01-22 Thread Jeremy Chadwick
On Tue, Jan 22, 2008 at 01:24:55AM -0800, Jeremy Chadwick wrote:
 I believe the problem is that our CPUs don't match any of the
 identification verification methods performed in
 src/sys/i386/cpufreq/est.c.
 
 I should be able to make a patch for this, but will need time  -- our
 to-be-dev/test C2D box sits in my living room waiting for CPUs to arrive
 so it can be built.  :-)

I've spent most of this evening poking at the code in question, as well
as looking at [too many] Intel specification documents for both the
Intel Core 2 Duo Desktop (E) and Mobile (T) processors.

Some technical details are below, followed by the i'm a user not a
programmer stuff.

The message CPU supports Enhanced Speedstep, but is not recognized is
indeed because the E6420 and the T7200 are not in the frequency tables
within src/sys/i386/cpufreq/est.c.  It appears that est.c is actually
for the older Pentium M and VIA Centaur platforms -- particularly, those
which do not offer frequency tables via ACPI, and instead use some
hard-coded tables based on CPU manufacturer specifications.

However, within docs for the Intel C2D CPUs, the tables in question are
no where to be found.  You can find lots of documentation describing
what all the VID bits do and what multiplication factor they break down
to (e.g. 1. = normal, 0.8250 = slower, 0.6000 = even slower, etc.)
but there's no pre-defined list of frequencies that I could find.  This
frustrated me, so I took a look at what Linux did.

Seems they were in the same boat, and ended up doing essentialy what
FreeBSD has done: support SpeedStep on platforms which don't provide
frequency tables through ACPI (speedstep-centrino) and instead require
fiddling of bits via MSR, and also support SpeedStep on platforms which
have frequency tables provided via ACPI.  They combined both drivers
into a single driver, speedstep-cpufreq, which prefers the ACPI method
but will restort to the old MSR method on platforms where available:

http://osdir.com/ml/kernel.cpufreq/2006-09/msg4.html

Further research into the FreeBSD side of things showed me that the
cpufreq(4) driver supports both the MSR method (via est.c) and the ACPI
method.  This can be seen in the cpufreq(4) manpage; the MSR method is
est (which is what est.c is), and the ACPI method is acpi_perf.
There's also acpi_throttle, but I'm not sure what that is.  cpufreq(4)
provides both some kernel API functions for twiddling of stuff, as well
as sysctl(8) knobs.

That said, I did a `sysctl -a | grep freq` on our E6420 system with EIST
enabled, and found the following relevant data:

dev.cpu.0.freq: 2117
dev.cpu.0.freq_levels: 2117/-1 1852/-1 1587/-1 1323/-1 1058/-1 793/-1 529/-1 
264/-1
dev.cpufreq.0.%driver: cpufreq
dev.cpufreq.0.%parent: cpu0
dev.cpufreq.1.%driver: cpufreq
dev.cpufreq.1.%parent: cpu1

The dev.cpu.0.freq_levels values are CPU MHz/milliwatt; the -1 values
for milliwatt are missing, but this shouldn't impact things.

Since cpufreq(4) is what obtains these via ACPI (a la acpi_perf, I
assume), it's safe to say that cpufreq(4) will slow the system down if
one was to change dev.cpu.0.freq to one of the values shown in
freq_levels.  I have some ideas as to why there's no dev.cpu.1.freq,
but my ideas are based on the older EIST stuff I've read tonight.

That said:

powerd(8) on FreeBSD will flip through all of the above MHz values,
depending upon how you tune it.

I use powerd(8) on my AMD Athlon 64 X2 system at home.  I had to
enable the Cool'n'Quiet BIOS option, and then this showed up:

cpu0: ACPI CPU on acpi0
powernow0: Cool`n'Quiet K8 on cpu0
cpu1: ACPI CPU on acpi0
powernow1: Cool`n'Quiet K8 on cpu1

icarus# ps -aux | grep powerd
root  669  0.0  0.0  3140   832  ??  Ss   Thu06am   0:16.23 
/usr/sbin/powerd -p 2000

And the sysctl values:

dev.cpu.0.freq: 1005
dev.cpu.0.freq_levels: 2010/89000 1809/84600 1005/40100
dev.powernow.0.freq_settings: 2010/89000 1809/84600 1005/40100
dev.powernow.1.freq_settings: 2010/89000 1809/84600 1005/40100
dev.cpufreq.0.%driver: cpufreq
dev.cpufreq.0.%parent: cpu0
dev.cpufreq.1.%driver: cpufreq
dev.cpufreq.1.%parent: cpu1

Interesting thing here is that there's dev.powernow.[0].freq_settings
while on the E6420 box there's only the 0 index.

Anyway, I decided to run powerd on the EIST box to see what happened:

# ps -auxw | grep powerd
root25602  0.0  0.0  3120   820  ??  Ss5:43AM   0:00.00 
/usr/sbin/powerd -p 2000
root25604  0.0  0.0  1588   780  p1  R+5:43AM   0:00.00 grep powerd
# sysctl -a | egrep 'dev.*freq:|freq_levels:'
dev.cpu.0.freq: 1323
dev.cpu.0.freq_levels: 2117/-1 1852/-1 1587/-1 1323/-1 1058/-1 793/-1 529/-1 
264/-1
# sysctl -a | egrep 'dev.*freq:|freq_levels:'
dev.cpu.0.freq: 264
dev.cpu.0.freq_levels: 2117/-1 1852/-1 1587/-1 1323/-1 1058/-1 793/-1 529/-1 
264/-1

And I can tell the system is significantly slower when idle, which is
normal.  :-)

So give that a try...

-- 
| Jeremy Chadwickjdc at parodius.com |

Re: T7200 CPU not detected by est

2008-01-22 Thread Gerrit Kühn
On Tue, 22 Jan 2008 05:47:25 -0800 Jeremy Chadwick [EMAIL PROTECTED]
wrote about Re: T7200 CPU not detected by est:

JC And I can tell the system is significantly slower when idle, which is
JC normal.  :-)

JC So give that a try...

First of all, thank you very much for your work and your mail.
Surprisingly (at least to me :-) everything seems to work as you said with
the system on my desk here, which has a T7200 and FreeBSD 6.3-RC2.
However, I know I already tried this with my system at home with a T7200
and FreeBSD 7.0-Beta4, and it crashed and rebooted when starting powerd.
Just to make sure, I will try again and report about it when I am back at
home.
Meanwhile, I also opened a PR under #119895.


cu
  Gerrit
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Re: T7200 CPU not detected by est

2008-01-22 Thread John Baldwin
On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
 Hi folks,
 
 I have several systems using T7200 mobile CPUs running under 7-stable.
 However, EST does not recognize the cpus. When loading cpufreq I get:

You can try this patch.  It won't add support for all of the levels, but it 
will support the current level and the highest level (IIRC).

Index: est.c
===
RCS file: /usr/cvs/src/sys/i386/cpufreq/est.c,v
retrieving revision 1.11
diff -u -r1.11 est.c
--- est.c   11 May 2006 17:35:44 -  1.11
+++ est.c   2 Oct 2007 18:04:58 -
@@ -38,6 +38,7 @@
 #include sys/systm.h
 
 #include cpufreq_if.h
+#include machine/clock.h
 #include machine/md_var.h
 
 #include contrib/dev/acpica/acpi.h
@@ -70,6 +71,7 @@
 struct est_softc {
device_tdev;
int acpi_settings;
+   int msr_settings;
freq_info   *freq_list;
 };
 
@@ -897,6 +899,7 @@
 static int est_get_info(device_t dev);
 static int est_acpi_info(device_t dev, freq_info **freqs);
 static int est_table_info(device_t dev, uint64_t msr, freq_info **freqs);
+static int est_msr_info(device_t dev, uint64_t msr, freq_info **freqs);
 static freq_info *est_get_current(freq_info *freq_list);
 static int est_settings(device_t dev, struct cf_setting *sets, int *count);
 static int est_set(device_t dev, const struct cf_setting *set);
@@ -1031,11 +1034,13 @@
 static int
 est_detach(device_t dev)
 {
+#if 0
struct est_softc *sc;
 
sc = device_get_softc(dev);
-   if (sc-acpi_settings)
+   if (sc-acpi_settings || sc-msr_settings)
free(sc-freq_list, M_DEVBUF);
+#endif
return (ENXIO);
 }
 
@@ -1059,6 +1064,9 @@
if (error)
error = est_acpi_info(dev, sc-freq_list);
 
+   if (error)
+   error = est_msr_info(dev, msr, sc-freq_list);
+
if (error) {
printf(
est: CPU supports Enhanced Speedstep, but is not recognized.\n
@@ -1149,6 +1157,77 @@
return (0);
 }
 
+/*
+ * Flesh out a simple rate table containing the high and low frequencies
+ * based on the current clock speed and the upper 32 bits of the MSR.
+ */
+static int
+est_msr_info(device_t dev, uint64_t msr, freq_info **freqs)
+{
+   struct est_softc *sc;
+   freq_info *fp;
+   int bus, freq, volts;
+   uint16_t id;
+
+   if (strcmp(GenuineIntel, cpu_vendor) != 0)
+   return (EOPNOTSUPP);
+
+   /* Figure out the bus clock. */
+   freq = tsc_freq / 100;
+   id = msr  32;
+   bus = freq / (id  8);
+   device_printf(dev, Guessed bus clock (high) of %d MHz\n, bus);
+   if (bus != 100  bus != 133) {
+   /* We may be running on the low frequency. */
+   id = msr  48;
+   bus = freq / (id  8);
+   device_printf(dev, Guessed bus clock (low) of %d MHz\n, bus);
+   if (bus != 100  bus != 133)
+   return (EOPNOTSUPP);
+   
+   /* Calculate high frequency. */
+   id = msr  32;
+   freq = ((id  8)  0xff) * bus;
+   }
+
+   /* Fill out a new freq table containing just the high and low freqs. */
+   sc = device_get_softc(dev);
+   fp = malloc(sizeof(freq_info) * 3, M_DEVBUF, M_WAITOK | M_ZERO);
+
+   /* First, the high frequency. */
+   volts = id  0xff;
+   if (volts != 0) {
+   volts = 4;
+   volts += 700;
+   }
+   fp[0].freq = freq;
+   fp[0].volts = volts;
+   fp[0].id16 = id;
+   fp[0].power = CPUFREQ_VAL_UNKNOWN;
+   device_printf(dev, Guessed high setting of %d MHz @ %d Mv\n, freq,
+   volts);
+
+   /* Second, the low frequency. */
+   id = msr  48;
+   freq = ((id  8)  0xff) * bus;
+   volts = id  0xff;
+   if (volts != 0) {
+   volts = 4;
+   volts += 700;
+   }
+   fp[1].freq = freq;
+   fp[1].volts = volts;
+   fp[1].id16 = id;
+   fp[1].power = CPUFREQ_VAL_UNKNOWN;
+   device_printf(dev, Guessed low setting of %d MHz @ %d Mv\n, freq,
+   volts);
+
+   /* Table is already terminated due to M_ZERO. */
+   sc-msr_settings = TRUE;
+   *freqs = fp;
+   return (0);
+}
+
 static freq_info *
 est_get_current(freq_info *freq_list)
 {


-- 
John Baldwin
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Re: T7200 CPU not detected by est

2008-01-22 Thread Krassimir Slavchev
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

John Baldwin wrote:
 On Monday 21 January 2008 11:16:06 am Gerrit Kühn wrote:
 Hi folks,

 I have several systems using T7200 mobile CPUs running under 7-stable.
 However, EST does not recognize the cpus. When loading cpufreq I get:
 
 You can try this patch.  It won't add support for all of the levels, but it 
 will support the current level and the highest level (IIRC).
 


It works now on my T7700:

dev.est.0.%desc: Enhanced SpeedStep Frequency Control
dev.est.0.%driver: est
dev.est.0.%parent: cpu0
dev.est.0.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
1200/16000
dev.est.1.%desc: Enhanced SpeedStep Frequency Control
dev.est.1.%driver: est
dev.est.1.%parent: cpu1
dev.est.1.freq_settings: 2401/35000 2400/35000 2000/28000 1600/22000
1200/16000


Thanks
-BEGIN PGP SIGNATURE-
Version: GnuPG v1.4.7 (FreeBSD)

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/t5yK13dWc6XywqAWEDCjP8=
=xpsg
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Re: T7200 CPU not detected by est

2008-01-21 Thread Jeremy Chadwick
On Mon, Jan 21, 2008 at 05:16:06PM +0100, Gerrit Kühn wrote:
 I have several systems using T7200 mobile CPUs running under 7-stable.
 However, EST does not recognize the cpus. When loading cpufreq I get:
 
 ---
 Jan 18 23:18:14 comet kernel: est1: Enhanced SpeedStep Frequency Control on 
 cpu1 
 Jan 18 23:18:14 comet kernel: est: CPU supports Enhanced Speedstep, but is 
 not recognized. 
 Jan 18 23:18:14 comet kernel: est: cpu_vendor GenuineIntel, msr 
 6130c2906000c29 
 Jan 18 23:18:14 comet kernel: device_attach: est1 attach returned 6 
 ---

I see identical behaviour on our Supermicro PDSMI+ systems, using E6420
CPUs, so I don't believe the problem is specific to your motherboard or
certain Intel CPU models:

CPU: Intel(R) Core(TM)2 CPU  6420  @ 2.13GHz (2128.01-MHz 686-class CPU)
acpi0: PTLTD   RSDT on motherboard
acpi0: [ITHREAD]
acpi0: Power Button (fixed)
cpu0: ACPI CPU on acpi0
est0: Enhanced SpeedStep Frequency Control on cpu0
est: CPU supports Enhanced Speedstep, but is not recognized.
est: cpu_vendor GenuineIntel, msr 82a082a0600082a
device_attach: est0 attach returned 6
cpu1: ACPI CPU on acpi0
est1: Enhanced SpeedStep Frequency Control on cpu1
est: CPU supports Enhanced Speedstep, but is not recognized.
est: cpu_vendor GenuineIntel, msr 82a082a0600082a
device_attach: est1 attach returned 6

In the case of our servers, we usually turn EIST off (this one
particular box has it enabled) because of the above problem -- but I'd
much rather have it turned on to help save power.  For a laptop or
workstation, however, I can see this being an incredibly important
feature.

-- 
| Jeremy Chadwickjdc at parodius.com |
| Parodius Networking   http://www.parodius.com/ |
| UNIX Systems Administrator  Mountain View, CA, USA |
| Making life hard for others since 1977.  PGP: 4BD6C0CB |

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