Hi Andriy,
I attempted to re-write all bits back, but the result is the same. Strange.
Perhaps the initialization code is wrong somewhere? I will give it another
review.
--
Farhan Khan
PGP Fingerprint: B28D 2726 E2BC A97E 3854 5ABE 9A9F 00BC D525 16EE
On Thu, Dec 28, 2017 at 4:28 AM, Andriy
Hi,
there are some issues that may cause wrong interrupt handling:
1) IMR register bits - they were taken from 92c
(and they are not compatible - for example, RXFOVW seems to be moved
to the ext register)
2) Try to ACK (write back) all bits,
not masked ones (like it is done for 92c)
Hi Adrian,
> So, what do the bits in R88EE_HIMR mean? What about HIRME? Let's
> figure out which it is.
Unfortunately, I do not know what these values are regarding. My
speculation is that R88EE_HIMR and HIMRE are how you notify the device to
clear the interrupt. On the Linux source, they are
Hi,
So it looks like the thing that's generating the interrupt isn't being cleared.
So, what do the bits in R88EE_HIMR mean? What about HIRME? Let's
figure out which it is.
Also, is it something in C2H (the target to host event channel) that's
not being handled?
-adrian
On 21 December
