Hi,
there are some issues that may cause wrong interrupt handling:
1) IMR register bits - they were taken from 92c
(and they are not compatible - for example, RXFOVW seems to be moved
to the ext register)
2) Try to ACK (write back) all bits,
not masked ones (like it is done for 92c)
Hi Andriy,
I attempted to re-write all bits back, but the result is the same. Strange.
Perhaps the initialization code is wrong somewhere? I will give it another
review.
--
Farhan Khan
PGP Fingerprint: B28D 2726 E2BC A97E 3854 5ABE 9A9F 00BC D525 16EE
On Thu, Dec 28, 2017 at 4:28 AM, Andriy
