This wait queue is signaled on all IRQs for a given GPU and will be
used as part of the new MSM_WAIT_IOVA ioctl so userspace can sleep
until the value at a given iova reaches a certain condition.
Signed-off-by: Brian Ho <br...@brkho.com>
---
drivers/gpu/drm/msm/msm_gpu.c | 4 ++++
drivers/gpu/drm/msm/msm_gpu.h | 3 +++
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index a052364a5d74..d7310c1336e5 100644
--- a/drivers/gpu/drm/msm/msm_gpu.c
+++ b/drivers/gpu/drm/msm/msm_gpu.c
@@ -779,6 +779,8 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct
msm_gem_submit *submit,
static irqreturn_t irq_handler(int irq, void *data)
{
struct msm_gpu *gpu = data;
+ wake_up_all(&gpu->event);
+
return gpu->funcs->irq(gpu);
}
@@ -871,6 +873,8 @@ int msm_gpu_init(struct drm_device *drm, struct
platform_device *pdev,
spin_lock_init(&gpu->perf_lock);
+ init_waitqueue_head(&gpu->event);
+
/* Map registers: */
gpu->mmio = msm_ioremap(pdev, config->ioname, name);
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index ab8f0f9c9dc8..60562f065dbc 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -104,6 +104,9 @@ struct msm_gpu {
struct msm_gem_address_space *aspace;
+ /* GPU-wide wait queue that is signaled on all IRQs */
+ wait_queue_head_t event;
+
/* Power Control: */
struct regulator *gpu_reg, *gpu_cx;
struct clk_bulk_data *grp_clks;
--
2.25.0.341.g760bfbb309-goog
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
