Re: [Freedreno] [PATCH 03/11] drm/msm: Add hint to DRM_IOCTL_MSM_GEM_INFO to return an object IOVA

2017-02-06 Thread Emil Velikov
Hi Jordan, On 6 February 2017 at 17:39, Jordan Crouse wrote: > Modify the 'pad' member of struct drm_msm_gem_info to 'hint'. If the > user sets 'hint' to non-zero it means that they want a IOVA for the > GEM object instead of a mmap() offset. Return the iova in the

Re: [Freedreno] [PATCH 03/11] drm/msm: Add hint to DRM_IOCTL_MSM_GEM_INFO to return an object IOVA

2017-02-06 Thread Rob Clark
On Mon, Feb 6, 2017 at 2:20 PM, Emil Velikov wrote: > Hi Jordan, > > On 6 February 2017 at 17:39, Jordan Crouse wrote: >> Modify the 'pad' member of struct drm_msm_gem_info to 'hint'. If the >> user sets 'hint' to non-zero it means that they want

Re: [Freedreno] [PATCH 00/11] drm/msm: A5XX preemption

2017-02-06 Thread Alex Deucher
On Mon, Feb 6, 2017 at 12:59 PM, Daniel Vetter wrote: > On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote: >> This series of patches implements multiple ringbuffers and preemption for >> Adreno >> A5XX targets. Preemption allows a command to be interrupted at

Re: [Freedreno] [Intel-gfx] [PATCH 00/11] drm/msm: A5XX preemption

2017-02-06 Thread Rob Clark
On Mon, Feb 6, 2017 at 1:23 PM, Daniel Stone wrote: > Hi, > > On 6 February 2017 at 17:59, Daniel Vetter wrote: >> On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote: >>> This initial series implements 4 ringbuffers to give sufficient coverage

[Freedreno] [pull] drm/msm: msm-next for 4.11

2017-02-06 Thread Rob Clark
Hi Dave, The big things this time around are: 1) support for hw cursor on newer mdp5 devices (snapdragon 820+, tested on db820c) 2) dsi encoder cleanup 3) gpu dt bindings cleanup so we can get the gpu nodes merged upstream The following changes since commit

Re: [Freedreno] [PATCH 00/11] drm/msm: A5XX preemption

2017-02-06 Thread Daniel Stone
Hi, On 6 February 2017 at 17:59, Daniel Vetter wrote: > On Mon, Feb 06, 2017 at 10:39:28AM -0700, Jordan Crouse wrote: >> This initial series implements 4 ringbuffers to give sufficient coverage for >> the >> range of priority levels requested by the GLES and compute

[Freedreno] [PATCH 03/11] drm/msm: Add hint to DRM_IOCTL_MSM_GEM_INFO to return an object IOVA

2017-02-06 Thread Jordan Crouse
Modify the 'pad' member of struct drm_msm_gem_info to 'hint'. If the user sets 'hint' to non-zero it means that they want a IOVA for the GEM object instead of a mmap() offset. Return the iova in the 'offset' member. Signed-off-by: Jordan Crouse ---

[Freedreno] [PATCH 04/11] drm/msm: Remove idle function hook

2017-02-06 Thread Jordan Crouse
There isn't any generic code that uses ->idle so remove it. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 4 ++-- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 4 ++-- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 9 -

[Freedreno] [PATCH 05/11] drm/msm: get an iova from the address space instead of an id

2017-02-06 Thread Jordan Crouse
In the future we won't have a fixed set of addresses spaces. Instead of going through the effort of assigning a ID for each address space just use the address space itself as a token for getting / putting an iova. This forces a few changes in the gem object however: instead of using a simple

[Freedreno] [PATCH 01/11] drm/msm: Make sure to detach the MMU during GPU cleanup

2017-02-06 Thread Jordan Crouse
We should be detaching the MMU before destroying the address space. To do this cleanly, the detach has to happen in adreno_gpu_cleanup() because it needs access to structs in adreno_gpu.c. Plus it is better symmetry to have the attach and detach at the same code level. Signed-off-by: Jordan

[Freedreno] [PATCH 07/11] drm/msm: Remove memptrs->wptr

2017-02-06 Thread Jordan Crouse
memptrs->wptr seems to be unused. Remove it to avoid confusing the upcoming preemption code. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 --- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 - 2 files changed, 4 deletions(-) diff --git

[Freedreno] [PATCH 06/11] drm/msm: Add a struct to pass configuration to msm_gpu_init()

2017-02-06 Thread Jordan Crouse
The amount of information that we need to pass into msm_gpu_init() is steadily increasing, so add a new struct to stabilize the function call and make it easier to add new configuration down the line. Signed-off-by: Jordan Crouse ---

[Freedreno] [PATCH 10/11] drm/msm: Make the value of RB_CNTL (almost) generic

2017-02-06 Thread Jordan Crouse
We use a global ringbuffer size and block size for all targets and at least for 5XX preemption we need to know the value the RB_CNTL in several locations so it makes sense to caculate it once and use it everywhere. The only monkey wrench is that we need to disable the RPTR shadow for A430 targets

[Freedreno] [PATCH 02/11] drm/msm: Improve the zap shader

2017-02-06 Thread Jordan Crouse
Simply the code, use snprintf correctly and make sure that we memset the rest of the segment if the memory size in the ELF file is larger than the file size. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 60 +--