[Freedreno] [DPU PATCH 0/2] Connector virtualization for Dual-DSI

This patch series adds support to DSI connector virtualization for Dual-DSI configuration. These changes have been tested using dual-dsi truly panel on sdm845 platform. Additional changes that will be needed to have end-to-end functionality: --> DSI6G-v2 changes:

[Freedreno] [DPU PATCH v2 1/2] drm/msm/dsi: check video mode engine status before waiting

Make sure the video mode engine is on before waiting for the video done interrupt. Otherwise it leads to silent timeouts increasing display turn ON time. Changes in v2: - Replace pr_err with dev_err - Changed error message Signed-off-by: Abhinav Kumar ---

[Freedreno] [DPU PATCH 2/2] drm/msm/dsi: Use one connector for dual DSI mode

Current DSI driver uses two connectors for dual DSI case even though we only have one panel. Fix this by implementing one connector/bridge for dual DSI use case. Use master DSI controllers to register one connector/bridge. Change-Id: I067b39f3b32eb3aa92d4155d4ca703ca7690645b Signed-off-by:

[Freedreno] [DPU PATCH v2 2/2] drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY

Currently the DSI PHY timings are hard-coded for a specific panel for the 10nm PHY. Replace this with the auto PHY timing calculator which can calculate the PHY timings for any panel. Changes in v2: - None Reviewed-by: Archit Taneja Signed-off-by: Abhinav Kumar