Add support for the A6XX family of Adreno GPUs. The biggest addition
is the GMU (Graphics Management Unit) which takes over most of the
power management of the GPU itself but in a ironic twist of fate
needs a goodly amount of management itself. Add support for the
A6XX core code, the GMU and the
On Mon, Mar 05, 2018 at 10:09:38AM +0530, Viresh Kumar wrote:
> On 02-03-18, 14:43, Jordan Crouse wrote:
> > +static int a6xx_gmu_build_freq_table(struct device *dev, unsigned long
> > *freqs,
> > + u32 size)
> > +{
> > + int count = dev_pm_opp_get_opp_count(dev);
> > + struct
On 02-03-18, 14:43, Jordan Crouse wrote:
> +static int a6xx_gmu_build_freq_table(struct device *dev, unsigned long
> *freqs,
> + u32 size)
> +{
> + int count = dev_pm_opp_get_opp_count(dev);
> + struct dev_pm_opp *opp;
> + int i, index = 0;
> + unsigned long freq = 1;
Add support for the A6XX family of Adreno GPUs. The biggest addition
is the GMU (Graphics Management Unit) which takes over most of the
power management of the GPU itself but in a ironic twist of fate
needs a goodly amount of management itself. Add support for the
A6XX core code, the GMU and the
