Re: [AArch64/testsuite] Add more TLS local executable testcases

On 26 August 2015 at 14:58, Jiong Wang wrote: > > This patch cover tlsle tiny model tests, tls size truncation for tiny & > small model included also. > > All testcases pass native test. > > OK for trunk? > > 2015-08-26 Jiong Wang > > gcc/testsuite/ >

[Bug rtl-optimization/67676] Implicit alignment of struct not applied to members

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67676 Richard Biener changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

Re: [PATCH] DWARF support for AIX v3

On Mon, Sep 21, 2015 at 5:41 PM, David Edelsohn wrote: > Appended is a patch to support DWARF on AIX and works with GDB and AIX > assembler. The AIX assembler prepends the CU length to the section > and does not want the compiler to provide it, so I need to disable > those

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On Tue, Sep 22, 2015 at 2:22 AM, Manuel López-Ibáñez wrote: > On 21 September 2015 at 12:29, Richard Biener > wrote: >> On Mon, Sep 21, 2015 at 11:59 AM, Manuel López-Ibáñez >> wrote: >>> On 21 September 2015 at 10:18,

[Bug tree-optimization/62171] restrict pointer to struct with restrict pointers parm doesn't prevent aliases

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 --- Comment #8 from vries at gcc dot gnu.org --- (In reply to Richard Biener from comment #7) > I was thinking about sth like > > struct X { int i; int * __restrict__ q; }; > > int foo (X& __restrict__ x, X *p) > { > *x.q = 1; > p->i = 0; >

[Bug target/67677] [6 Regression] r226005 causes "Conditional jump or move depends on uninitialised value(s)"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67677 Richard Biener changed: What|Removed |Added Target Milestone|--- |6.0

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

- Original Message - > From: "H.J. Lu" > To: "Hal Finkel" > Cc: "GCC Development" , cfe-...@lists.llvm.org > Sent: Monday, September 21, 2015 7:17:20 PM > Subject: Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers > >

Re: [PATCH] Fix PR66952

On Tue, 22 Sep 2015, Christophe Lyon wrote: > On 23 July 2015 at 13:17, Richard Biener wrote: > > On Thu, 23 Jul 2015, Kyrill Tkachov wrote: > > > >> > >> On 23/07/15 10:02, Andreas Schwab wrote: > >> > Richard Biener writes: > >> > > >> > > Index:

[Bug tree-optimization/66952] [6 Regression] wrong code at -O2 and -O3 on x86_64-linux-gnu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66952 --- Comment #10 from Richard Biener --- Author: rguenth Date: Tue Sep 22 07:47:21 2015 New Revision: 227995 URL: https://gcc.gnu.org/viewcvs?rev=227995=gcc=rev Log: 2015-09-22 Richard Biener Backport from mainline

[Bug tree-optimization/67671] restrict pointer reference looses restrict

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67671 --- Comment #1 from Richard Biener --- I think the patch is reasonable.

[Bug bootstrap/67672] [6 regression] Ada "Storage_Error stack overflow or erroneous memory access" error breaks sparc-linux bootstrap

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67672 Eric Botcazou changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC|

[Bug bootstrap/67622] [6 regression] Solaris/SPARC bootstrap fails compiling stage2 stdc++.h.gch/O2ggnu++0x.gch

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67622 Eric Botcazou changed: What|Removed |Added CC||mikpelinux at gmail dot com --- Comment

Re: [PATCH tree-inline v2] do not say "called from here" with UNKNOWN_LOCATION

On Mon, 21 Sep 2015, Manuel López-Ibáñez wrote: > In https://sourceware.org/ml/libc-alpha/2014-12/msg00300.html, we give a > "called from here" note without actually having a location, which looks > strange. I haven't been able to generate such a testcase. If this happens, > try to at least point

Re: [patch] Pack global state of forwprop to one structure

On Mon, 21 Sep 2015, Martin Jambor wrote: > Hi, > > the following patch almost removes the global state of pass_forwprop. > Only almost, because the pass calls fold_const with its own valueize > function which uses lattices, and changing the prototype of valueize > (by adding a void *data

[Bug tree-optimization/62171] restrict pointer to struct with restrict pointers parm doesn't prevent aliases

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 --- Comment #7 from Richard Biener --- I was thinking about sth like struct X { int i; int * __restrict__ q; }; int foo (X& __restrict__ x, X *p) { *x.q = 1; p->i = 0; return *x.q; } int main() { X x; x.q = return foo (x, ); }

[Bug tree-optimization/67666] single restrict pointer in struct looses restrict

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67666 --- Comment #4 from vries at gcc dot gnu.org --- Author: vries Date: Tue Sep 22 08:15:32 2015 New Revision: 227996 URL: https://gcc.gnu.org/viewcvs?rev=227996=gcc=rev Log: Handle single restrict pointer in struct in create_variable_info_for_1

[Bug tree-optimization/67666] single restrict pointer in struct looses restrict

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67666 vries at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

Re: avoiding recursive calls of calloc due to optimization

On Mon, Sep 21, 2015 at 8:17 PM, Marc Glisse wrote: > On Mon, 21 Sep 2015, Daniel Gutson wrote: > >> This is derived from https://gcc.gnu.org/ml/gcc-help/2015-03/msg00091.html >> >> Currently, gcc provides an optimization that transforms a call to >> malloc and a call to

Re: [PATCH][PR67666] Handle single restrict pointer in struct in create_variable_info_for_1

On Tue, 22 Sep 2015, Tom de Vries wrote: > Hi, > > Consider this test-case: > > struct ps > { > int *__restrict__ p; > }; > > void > f (struct ps &__restrict__ ps1) > { > *(ps1.p) = 1; > } > > > Atm, the restrict on p has no effect. Now, say we add a field to the struct: > > struct ps >

[Bug rtl-optimization/66790] Invalid uninitialized register handling in REE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66790 --- Comment #29 from Paolo Bonzini --- > While getting familiar with DF problems, I noticed that LIVE's ignores > the order of GENs and KILLs in basic blocks. In other words, the > transfer function for: GEN(r1); KILL(r1) is currently the same

[Bug rtl-optimization/66790] Invalid uninitialized register handling in REE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66790 --- Comment #31 from Paolo Bonzini --- Ah, I see now. I think you're right that the DF_REF_MUST_CLOBBER case should also clear GEN in df_live_bb_local_compute. However, regarding the "BTW" I am fairly sure now that df_live_bb_local_compute and

[Bug tree-optimization/67476] Add --param parloops-schedule=<static|dynamic|guided|auto|runtime>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67476 --- Comment #8 from vries at gcc dot gnu.org --- Pinged: https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01623.html

[Bug tree-optimization/50417] regression: memcpy with known alignment

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=50417 --- Comment #6 from Richard Biener --- *** Bug 67676 has been marked as a duplicate of this bug. ***

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

On 21 Sep 2015, at 21:45, H.J. Lu via cfe-dev wrote: > > The main purpose of x86 interrupt attribute is to allow programmers > to write x86 interrupt/exception handlers in C WITHOUT assembly > stubs to avoid extra branch from assembly stubs to C functions. I > want to

[Bug rtl-optimization/66790] Invalid uninitialized register handling in REE

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66790 --- Comment #30 from Eric Botcazou --- > GEN and KILL are not the same for LR and MIR. > > 1) Sets and clobbers are handled differently. A set or clobber of r1 > _kills_ liveness, while for MIR sets _generate_ "initialized-ness" and only >

[PING][PR67476] Add param parloops-schedule

Hi, These two patches: - https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00938.html - https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00940.html add a param parloop-schedule=. Thanks, - Tom

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

Hello Uroš, On 21 Sep 19:19, Uros Bizjak wrote: > On Mon, Sep 21, 2015 at 6:57 PM, Kirill Yukhin > wrote: > > Patch in the bottom. Is it ok? > > Comments inline. > > > -native" > > +native skylake-avx512" > > Please leave x86-64 and native at the last two places. They

Re: [PATCH] DWARF support for AIX v3

On Tue, Sep 22, 2015 at 03:16:28PM +0200, Richard Biener wrote: > On September 22, 2015 2:38:34 PM GMT+02:00, David Edelsohn > wrote: > >On Tue, Sep 22, 2015 at 4:12 AM, Richard Biener > > wrote: > >> On Mon, Sep 21, 2015 at 5:41 PM, David Edelsohn

ifcvt vs. expand_binop

On SH, the result of comparisons etc. is stored in the T_REG. It's a 1 bit reg but described as SImode. To get the T_REG into another reg, there's this insn: (define_insn "movt" [(set (match_operand:SI 0 "arith_reg_dest" "=r") (match_operand:SI 1 "t_reg_operand"))] "TARGET_SH1"

[RFC] PR tree-optimization/67628: Make tree ifcombine more symmetric and interactions with dom

Hi all, I'm looking into improving usage of aarch64 conditional compare instructions and PR 67628 is one area of improvement I identified. The problem there is different tree-level behaviour for the expressions: (a > b && b <= c) && c > d vs. a > b && (b <= c && c > d) The second variant

[PATCH][PR67671] Handle restrict pointer references as restrict in AA

Hi, Consider this test-case: ... struct ps { int *__restrict__ p; }; f (struct ps &__restrict__ ps1) { *(ps1.p) = 1; } ... Atm (meaning after the fix for PR67666) for this test-case, we register two clique/base annotations, one for the load of pointer ps1.p and one for the store to that

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

On Tue, Sep 22, 2015 at 11:31 AM, Kirill Yukhin wrote: > Hello Uroš, > On 21 Sep 19:19, Uros Bizjak wrote: >> On Mon, Sep 21, 2015 at 6:57 PM, Kirill Yukhin >> wrote: >> > Patch in the bottom. Is it ok? >> >> Comments inline. >> >> > -native" >>

Re: [PATCH] PR target/67480: AVX512 bitwise logic insns pattern is incorrect

Hello Alexander, On 18 Sep 17:51, Alexander Fomin wrote: > Hi, > On Tue, Sep 08, 2015 at 11:41:50AM +0300, Kirill Yukhin wrote: > > Hi, > > So, here you'll emit, e.g. "pandq %xmm16, %xmm17" > > If think it'll be better to attach AVX-512VL related suffix while > > discriminating > > alternatives.

[Bug c++/67678] New: Nested class can be re-declared after definition

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67678 Bug ID: 67678 Summary: Nested class can be re-declared after definition Product: gcc Version: 5.2.1 Status: UNCONFIRMED Keywords: accepts-invalid Severity: normal

RE: Predictive commoning leads to register to register moves through memory.

I took an attempt at addressing this through the RTL GCSE pass. This attempt tweaks mem_attrs_eq_p to return true if its comparing something like poly+8 and MEM [ + 8]. Is this a more suitable approach? Thanks, Simon +/* Return true if p and q reference the same location by the same name but

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

On Tue, Sep 22, 2015 at 1:11 AM, Hal Finkel wrote: > - Original Message - >> From: "H.J. Lu" >> To: "Hal Finkel" >> Cc: "GCC Development" , cfe-...@lists.llvm.org >> Sent: Monday, September 21, 2015 7:17:20 PM >>

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

On Tue, Sep 22, 2015 at 1:41 AM, David Chisnall wrote: > On 21 Sep 2015, at 21:45, H.J. Lu via cfe-dev wrote: >> >> The main purpose of x86 interrupt attribute is to allow programmers >> to write x86 interrupt/exception handlers in C WITHOUT

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

On Tue, Sep 22, 2015 at 4:44 AM, David Chisnall wrote: > On 22 Sep 2015, at 12:39, H.J. Lu via cfe-dev wrote: >> >> The center piece of my proposal is not to change how parameters >> are passed in compiler. As for user experience, the

[Bug target/65782] Assembly failure (invalid register for .seh_savexmm) with -O3 -mavx512f on mingw-w64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65782 Kai Tietz changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

Re: [PING][PR67476] Add param parloops-schedule

On 09/22/2015 09:19 AM, Tom de Vries wrote: These two patches: - https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00938.html - https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00940.html add a param parloop-schedule=. The problem I have when trying to review them

[Bug target/67480] AVX512 bitwise logic operations pattern is incorrect

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67480 --- Comment #4 from Kirill Yukhin --- Author: kyukhin Date: Tue Sep 22 11:14:25 2015 New Revision: 228010 URL: https://gcc.gnu.org/viewcvs?rev=228010=gcc=rev Log: PR target/67480 gcc/ * config/i386/sse.md (define_mode_iterator

[Bug libgomp/67141] wrong libgomp mutex initialisation order

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67141 --- Comment #7 from Chung-Lin Tang --- Author: cltang Date: Tue Sep 22 11:18:23 2015 New Revision: 228011 URL: https://gcc.gnu.org/viewcvs?rev=228011=gcc=rev Log: 2015-09-22 Chung-Lin Tang Backport from

[Bug target/67480] AVX512 bitwise logic operations pattern is incorrect

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67480 Alexander Fomin changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

On 22 Sep 2015, at 12:39, H.J. Lu via cfe-dev wrote: > > The center piece of my proposal is not to change how parameters > are passed in compiler. As for user experience, the feedbacks on > my proposal from our users are very positive. Implementing the intrinsics for

[Bug c++/54895] the compiler treats '__cdecl' & '__stdcall' as the same.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54895 --- Comment #12 from Kai Tietz --- This bug got partially fixed for x86 (32-bit) by PR/44282. For x64 we have the issue that there is made no difference between different calling-conventions, as all variants are treated as standard

Re: Predictive commoning leads to register to register moves through memory.

On Tue, Sep 22, 2015 at 12:45 PM, Simon Dardis wrote: > I took an attempt at addressing this through the RTL GCSE pass. This attempt > tweaks > mem_attrs_eq_p to return true if its comparing something like poly+8 and MEM > [ + 8]. > > Is this a more suitable approach?

Re: (patch,rfc) s/gimple/gimple */

On Mon, Sep 21, 2015 at 9:32 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Fri, Sep 18, 2015 at 3:32 PM, Trevor Saunders >> wrote: >>> On Wed, Sep 16, 2015 at 03:11:14PM -0400, David Malcolm wrote:

Re: (patch,rfc) s/gimple/gimple */

On Tue, Sep 22, 2015 at 1:16 PM, Richard Biener wrote: > On Mon, Sep 21, 2015 at 9:32 PM, Richard Sandiford > wrote: >> Richard Biener writes: >>> On Fri, Sep 18, 2015 at 3:32 PM, Trevor Saunders

[Bug tree-optimization/62171] restrict pointer to struct with restrict pointers parm doesn't prevent aliases

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 --- Comment #10 from vries at gcc dot gnu.org --- (In reply to rguent...@suse.de from comment #9) > On Tue, 22 Sep 2015, vries at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 > > > > --- Comment #8 from vries

[Bug middle-end/65965] Straight-line memcpy/memset not vectorized when equivalent loop is

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65965 --- Comment #4 from alalaw01 at gcc dot gnu.org --- (In reply to Richard Biener from comment #3) > Fixed for GCC 6. Indeed. I note that the same testcase does _not_ SLP/vectorize if I use consecutive indices: void test (int*__restrict a,

[Bug c++/67544] ICE: SIGSEGV in tree_check3 (tree.h:2896) with -fconcepts

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67544 Paolo Carlini changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/54412] Request for 32-byte stack alignment with -mavx on Windows

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54412 Kai Tietz changed: What|Removed |Added Status|UNCONFIRMED |SUSPENDED Last reconfirmed|

[Bug tree-optimization/62171] restrict pointer to struct with restrict pointers parm doesn't prevent aliases

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 --- Comment #9 from rguenther at suse dot de --- On Tue, 22 Sep 2015, vries at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 > > --- Comment #8 from vries at gcc dot gnu.org --- > (In reply to Richard Biener from

Re: [cfe-dev] RFC: Support x86 interrupt and exception handlers

On 22 Sep 2015, at 12:47, H.J. Lu wrote: > > since __builtin_exception_error () is the same as > __builtin_return_address (0) and __builtin_interrupt_data () is > address of __builtin_exception_error () + size of register. Except that they’re *not*.

Re: [PATCH 6/n] OpenMP 4.0 offloading infrastructure: option handling

Hi! On Mon, 21 Sep 2015 19:41:59 +0300, Ilya Verbin wrote: > 2015-09-21 18:15 GMT+03:00 Thomas Schwinge : > > (, "--foffload* undocumented", has recently > > been filed.) > > > > (In the following, "intelmic" is short for >

Re: [gomp4] ptx reduction simplification

Hi! On Fri, 18 Sep 2015 20:05:48 -0400, Nathan Sidwell wrote: > I've committed this patch to rework and simplify [...] > the reduction lowering hooks. > > The current implementation [...] > [was] overcomplicated in a number of ways. > * omp-low.h (omp_reduction_init_op):

[ubsan PATCH] Fix uninitialized var issue (PR sanitizer/64906)

This fixes sanitizer/64906 by also pre-evaluating OP1. The problem in this testcase is that OP1 is "SAVE_EXPR " which can't be folded any more, but when we're creating the EQ_EXPR -- checking whether this expression equals zero -- it can be folded further to "f == 0". Afterwards we end up with

Re: [gomp4] ptx reduction simplification

On 09/22/15 11:10, Thomas Schwinge wrote: Hi! On Fri, 18 Sep 2015 20:05:48 -0400, Nathan Sidwell wrote: I've committed this patch to rework and simplify [...] the reduction lowering hooks. The current implementation [...] [was] overcomplicated in a number of ways.

Re: New post-LTO OpenACC pass

On 09/21/15 16:39, Nathan Sidwell wrote: On 09/21/15 16:30, Cesar Philippidis wrote: On 09/21/2015 09:30 AM, Nathan Sidwell wrote: +const pass_data pass_data_oacc_transform = +{ + GIMPLE_PASS, /* type */ + "fold_oacc_transform", /* name */ Want to rename the tree dump file to oacc_xforms

Re: [PATCH][PR67671] Handle restrict pointer references as restrict in AA

On Tue, 22 Sep 2015, Tom de Vries wrote: > Hi, > > Consider this test-case: > ... > struct ps > { > int *__restrict__ p; > }; > > f (struct ps &__restrict__ ps1) > { > *(ps1.p) = 1; > } > ... > > Atm (meaning after the fix for PR67666) for this test-case, we register two > clique/base

Re: [PATCH 14/15][ARM/AArch64 Testsuite]Add test of vcvt{,_high}_i{f32_f16,f16_f32}

On 25 August 2015 at 14:57, Alan Lawrence wrote: > Sorry - wrong version posted. The hunk for add_options_for_arm_neon_fp16 has > moved to the previous patch! This version also fixes some whitespace issues. > > gcc/testsuite/ChangeLog: > > *

[Bug middle-end/65965] Straight-line memcpy/memset not vectorized when equivalent loop is

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65965 --- Comment #5 from rguenther at suse dot de --- On Tue, 22 Sep 2015, alalaw01 at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65965 > > --- Comment #4 from alalaw01 at gcc dot gnu.org --- > (In reply to Richard Biener

Re: [PATCH] DWARF support for AIX v3

On Tue, Sep 22, 2015 at 9:54 AM, Trevor Saunders wrote: > On Tue, Sep 22, 2015 at 03:16:28PM +0200, Richard Biener wrote: >> On September 22, 2015 2:38:34 PM GMT+02:00, David Edelsohn >> wrote: >> >On Tue, Sep 22, 2015 at 4:12 AM, Richard Biener >>

[Bug tree-optimization/62171] restrict pointer to struct with restrict pointers parm doesn't prevent aliases

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 --- Comment #11 from rguenther at suse dot de --- On Tue, 22 Sep 2015, vries at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62171 > > --- Comment #10 from vries at gcc dot gnu.org --- > (In reply to rguent...@suse.de

[Bug tree-optimization/67671] restrict pointer reference looses restrict

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67671 vries at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[PATCH, nios2] Fix to nios2_legitimize_address

Nios II Linux had a bad TLS relocation generated, exposed by the test case for PR 65771. A fix for this in nios2_legitimize_address() was tested and applied. Chung-Lin 2015-09-22 Chung-Lin Tang * config/nios2/nios2.c (nios2_legitimize_address): When handling

Re: [PATCH 1/3, libgomp] Adjust offload plugin interface for avoiding deadlock on exit

Ping x2. On 2015/9/9 04:08 PM, Chung-Lin Tang wrote: > Ping. > > On 2015/8/27 09:44 PM, Chung-Lin Tang wrote: >> We've discovered that, for several of the libgomp plugin interface routines, >> if the target specific routine calls exit() (usually upon a fatal condition), >> deadlock ensues. We

Re: [PATCH] DWARF support for AIX v3

On September 22, 2015 2:38:34 PM GMT+02:00, David Edelsohn wrote: >On Tue, Sep 22, 2015 at 4:12 AM, Richard Biener > wrote: >> On Mon, Sep 21, 2015 at 5:41 PM, David Edelsohn >wrote: >>> Appended is a patch to support DWARF on

[build] Use CRTs provided by Solaris

Solaris 12 (and probably a future Solaris 11 update or SRU) will finally bundle the CRTs (crt1.o, crti.o, crtn.o) required to link executables. Previously, there would be incomplete sets (like SPARC missing crt1.o and gcrt1.o) or inconsistencies and missing features between the versions GCC

Re: [C/C++ PATCH] RFC: Implement -Wduplicated-cond (PR c/64249) (take

On Mon, Sep 21, 2015 at 07:06:01PM +0200, Marek Polacek wrote: > I realized that current patch has a minor deficiency: it will start > a chain even in case the first condition has a side-effect thus the > chain should be invalid. I'll fix this problem soon. I changed my mind, the above mean

Re: [PATCH] DWARF support for AIX v3

On Tue, Sep 22, 2015 at 4:12 AM, Richard Biener wrote: > On Mon, Sep 21, 2015 at 5:41 PM, David Edelsohn wrote: >> Appended is a patch to support DWARF on AIX and works with GDB and AIX >> assembler. The AIX assembler prepends the CU length to the

[build] Support PIE on Solaris

Beyond the reasons for the bundled Solaris CRTs already cited in https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01638.html they need to be PIC to support position independent executables (PIE). While linker support for PIE has existed in Solaris ld since at least Solaris 11.2 and GNU ld

[Bug tree-optimization/67671] restrict pointer reference looses restrict

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67671 vries at gcc dot gnu.org changed: What|Removed |Added Keywords||patch --- Comment #2 from

[Bug sanitizer/64906] -fsanitize=integer-divide-by-zero creates false -Wmaybe-uninitialized warning

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64906 --- Comment #2 from Marek Polacek --- int testf (int f, int s) { int ret = 0; if (f) ret = s / (f ? (unsigned long) 8 : 0); return ret; }

[Bug sanitizer/64906] -fsanitize=integer-divide-by-zero creates false -Wmaybe-uninitialized warning

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64906 --- Comment #3 from Marek Polacek --- I'm testing a fix.

Re: [AArch64] Handle const address in aarch64_print_operand

On 8 September 2015 at 16:03, Jiong Wang wrote: > 2015-09-08 Jiong Wang > > gcc/ > * config/aarch64/aarch64.c (aarch64_print_operand): Add "CONST" > support. OK /Marcus

Re: [Aarch64][target/PR 67143][5.2] Backport correct constraints for atomic operations.

On 9 September 2015 at 12:43, Matthew Wahab wrote: > gcc/ > 2015-09-09 Matthew Wahab > > Backport from mainline > 2015-08-14 Matthew Wahab > > PR target/67143 > *

Re: [PATCH] DWARF support for AIX v3

On Tue, Sep 22, 2015 at 9:16 AM, Richard Biener wrote: > On September 22, 2015 2:38:34 PM GMT+02:00, David Edelsohn > wrote: >>On Tue, Sep 22, 2015 at 4:12 AM, Richard Biener >> wrote: >>> On Mon, Sep 21, 2015 at 5:41

[Bug tree-optimization/67671] restrict pointer reference looses restrict

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67671 --- Comment #3 from vries at gcc dot gnu.org --- Author: vries Date: Tue Sep 22 14:14:56 2015 New Revision: 228015 URL: https://gcc.gnu.org/viewcvs?rev=228015=gcc=rev Log: Handle restrict pointer references as restrict in AA 2015-09-22 Tom de

Re: [PATCH] DWARF support for AIX v3

On Tue, Sep 22, 2015 at 10:09:51AM -0400, David Edelsohn wrote: > On Tue, Sep 22, 2015 at 9:54 AM, Trevor Saunders > wrote: > > On Tue, Sep 22, 2015 at 03:16:28PM +0200, Richard Biener wrote: > >> On September 22, 2015 2:38:34 PM GMT+02:00, David Edelsohn > >>

Re: ifcvt vs. expand_binop

Hi Oleg, On 22/09/15 14:35, Oleg Endo wrote: On SH, the result of comparisons etc. is stored in the T_REG. It's a 1 bit reg but described as SImode. To get the T_REG into another reg, there's this insn: (define_insn "movt" [(set (match_operand:SI 0 "arith_reg_dest" "=r")

Re: [AArch64] Delete aarch64_symbol_context which is not used

On 8 September 2015 at 16:00, Jiong Wang wrote: > > The concept of aarch64_symbol_context is not used in AArch64, this patch > remove it and all relevant code. > > ok for trunk? > > 2015-09-08 Jiong. Wang > > gcc/ > * config/aarch64/aarch64-protos.h

[Bug fortran/67679] New: -Wunitialized reports on compiler generated variables

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67679 Bug ID: 67679 Summary: -Wunitialized reports on compiler generated variables Product: gcc Version: 5.2.1 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug c++/58074] [C++11][DR 1333] __is_trivial intrinsic fails for deleted members and for non-trivial copy-c'tors

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58074 Jason Merrill changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned

Re: [PATCH, i386, AVX-512] Fix iterator for k, introduce kshift[lr][bwdq].

On Tue, Sep 22, 2015 at 5:14 PM, Kirill Yukhin wrote: > Hello, > Patch in the bottom fixes iterator for k insns > since QI mode is only available for AVX-512DQ. > > It also adds support for kshift[rl][bwdq]. This patterns > will be used for mask load/store autogeneration

[Bug c++/58074] [C++11][DR 1333] __is_trivial intrinsic fails for deleted members and for non-trivial copy-c'tors

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58074 --- Comment #7 from Jason Merrill --- Created attachment 36370 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36370=edit patch for GCC 5 And a patch to add a -Wabi warning to GCC 5.

OpenACC subarray data alignment in fortran

In both OpenACC and OpenMP, each subarray has at least two data mappings associated with them, one for the pointer and another for the data in the array section (fortan also has a pset mapping). One problem I observed in fortran is that array section data is casted to char *. Consequently, when

Re: ifcvt vs. expand_binop

Hi, On Tue, 2015-09-22 at 15:21 +0100, Kyrill Tkachov wrote: > where does noce_emit_store_flag call expand_simple_binop? > Do you mean the code following the call to noce_emit_store_flag > in noce_try_store_flag_constants? (I suspect that's the code that > will get triggered for your testcase)

C++ PATCH to disconnect -Wabi= from -fcompat-version=

While looking at PR 58074, I found that I wanted to be able to refer to different ABI compatibility levels for warnings vs. mangling compatibility aliases. Under this patch, if only one is specified it still implies the other, but if both are specified they can be different. I've also

[Bug c++/58074] [C++11][DR 1333] __is_trivial intrinsic fails for deleted members and for non-trivial copy-c'tors

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58074 --- Comment #6 from Jason Merrill --- Created attachment 36369 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36369=edit patch But here's the fix if the committee reaffirms the DR.

[PATCH, i386, AVX-512] Fix iterator for k, introduce kshift[lr][bwdq].

Hello, Patch in the bottom fixes iterator for k insns since QI mode is only available for AVX-512DQ. It also adds support for kshift[rl][bwdq]. This patterns will be used for mask load/store autogeneration on which Ilya Enkovich is working on. gcc/ * config/i386/i386.md (define_code_attr

[gomp4] Another oacc reduction simplification

I've committed this patch, which simplifies the generation of openacc reduction code. Primarily three changes 1) Don't have a fake gang reduction outside of worker & vector loops. Deal with the receiver object directly. I.e. 'ref_to_res' need not be a null pointer for vector and worker

Re: [PATCH] DWARF support for AIX v3

On 09/21/2015 08:41 AM, David Edelsohn wrote: > +#ifndef XCOFF_DEBUGGING_INFO >if (DWARF_INITIAL_LENGTH_SIZE - DWARF_OFFSET_SIZE == 4) > dw2_asm_output_data (4, 0x, >"Initial length escape value indicating 64-bit DWARF extension"); >dw2_asm_output_data

[Bug other/67627] libatomic parallel build failure

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67627 --- Comment #1 from nsz at gcc dot gnu.org --- adding all-multi: $(libatomic_la_LIBADD) to libatomic/Makefile.in solves the problem for me, but i'm not sure what's the automake way of doing this

Re: [PATCH] shrink-wrap: Handle multiple predecessors of prologue

On 09/21/2015 04:01 PM, Segher Boessenkool wrote: On Mon, Sep 21, 2015 at 01:56:28PM +0200, Bernd Schmidt wrote: + basic_block new_bb = create_empty_bb (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb); + BB_COPY_PARTITION (new_bb, pro); [...] + *entry_edge = make_single_succ_edge (new_bb, pro,

Re: [PATCH] Fix 67064 - Register asm variable broken

On 09/16/2015 10:24 AM, Andres Tiraboschi wrote: Hi, this patch fix the following bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67064 for gcc 5.2 It passes all the gcc tests except for this: FAIL: g++.dg/cpp1y/auto-fn15.C -std=gnu++14 (test for excess errors) Yep. The test is verifying

<    1   2