[Bug c/69985] [6 Regression] ICE: in linemap_position_for_loc_and_offset, at libcpp/line-map.c:924

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69985 --- Comment #1 from Markus Trippelsdorf --- Created attachment 37812 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37812=edit unreduced testcase

[Bug c/69985] New: [6 Regression] ICE: in linemap_position_for_loc_and_offset, at libcpp/line-map.c:924

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69985 Bug ID: 69985 Summary: [6 Regression] ICE: in linemap_position_for_loc_and_offset, at libcpp/line-map.c:924 Product: gcc Version: 6.0 Status:

[Bug target/69613] [6 Regression] wrong code with -O and simple 128bit arithmetics and vectors @ aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69613 Jakub Jelinek changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|---

[Bug rtl-optimization/69896] [6 Regression] wrong code with -frename-registers @ x64_64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69896 Jakub Jelinek changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|---

[Bug rtl-optimization/69896] [6 Regression] wrong code with -frename-registers @ x64_64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69896 --- Comment #10 from Jakub Jelinek --- Author: jakub Date: Sat Feb 27 06:43:20 2016 New Revision: 233777 URL: https://gcc.gnu.org/viewcvs?rev=233777=gcc=rev Log: PR rtl-optimization/69896 * tree-vect-generic.c

Re: [PATCH] Avoid 1x vectors in tree-vect-generic (PR rtl-optimization/69896)

On February 27, 2016 2:07:43 AM GMT+01:00, Bill Schmidt wrote: >Also tested with powerpc64le-unknown-linux-gnu native bootstrap with no >regressions, where it fixes this bug as well as the (reopened) PR69613. > >Bill > >On Sat, 2016-02-27 at 00:04 +0100, Jakub

Re: [PATCH] Avoid 1x vectors in tree-vect-generic (PR rtl-optimization/69896)

Also tested with powerpc64le-unknown-linux-gnu native bootstrap with no regressions, where it fixes this bug as well as the (reopened) PR69613. Bill On Sat, 2016-02-27 at 00:04 +0100, Jakub Jelinek wrote: > Hi! > > On ppc64, the widest (and only) supported vector mode for __int128 > element

[Bug fortran/66310] Problems with intrinsic repeat for large number of copies

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66310 --- Comment #7 from Jerry DeLisle --- Created attachment 37811 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37811=edit Proposed patch This patch fixes some signed integer problems in a few places and allows the test case to compile on

[Bug target/69613] [6 Regression] wrong code with -O and simple 128bit arithmetics and vectors @ aarch64

23:31:56 UTC 2016 (revision 233771) --- > LAST_UPDATED: Fri Feb 26 23:30:24 UTC 2016 (revision 233771) 26c26 < /home/wschmidt/gcc/build/gcc-mainline-base/gcc/testsuite/g++/../../xg++ versi on 6.0.0 20160226 (experimental) [trunk revision 233771] (GCC) --- > /home/wschmidt/gcc/build/gcc-m

[Bug target/54349] _mm_cvtsi128_si64 unnecessary stores value at stack

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54349 --- Comment #11 from Alexander Peslyak --- Turns out that gcc 4.6.x to 4.8.x generating "movd" instead of "movq" is actually a deliberate hack, to support binutils older than 2.17 ("movq" support committed in 2005, released in 2006) and

Re: [isocpp-parallel] Proposal for new memory_order_consume definition

On 2/25/16, Hans Boehm wrote: > If carries_dependency affects semantics, then it should not be an > attribute. > > The original design, or at least my understanding of it, was that it not > have semantics; it was only a suggestion to the compiler that it should > preserve

Re: [PATCH][LRA]Don't generate reload for output scratch operand from reload instruction.

On 02/26/2016 07:54 AM, Renlin Li wrote: Hi all, I admit that, the title looks a little bit confusing. The situation is like this, To make insn_1 strict, lra generates a new insn_1_reload insn. In insn_1_reload, there is a scratch operand with this form clobber (match_scratch:MODE x "=") When

Re: [AArch64] Emit square root using the Newton series

On 02/26/16 17:42, Evandro Menezes wrote: On 02/26/16 08:59, James Greenhalgh wrote: On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote: In preparation for the patch adding the Newton series also for square root, I'd like to propose this patch changing the name of the existing

Re: [AArch64] Emit square root using the Newton series

On 02/26/16 08:59, James Greenhalgh wrote: On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote: In preparation for the patch adding the Newton series also for square root, I'd like to propose this patch changing the name of the existing tuning flag for the reciprocal square root.

[Bug tree-optimization/15826] don't use "if" to extract a single bit bit-field.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 Andrew Pinski changed: What|Removed |Added Status|RESOLVED|NEW Resolution|FIXED

[Bug middle-end/19466] [meta-bug] bit-fields are non optimal

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19466 Bug 19466 depends on bug 15826, which changed state. Bug 15826 Summary: don't use "if" to extract a single bit bit-field. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 What|Removed |Added

[Bug middle-end/19987] [meta-bug] fold missing optimizations in general

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19987 Bug 19987 depends on bug 15826, which changed state. Bug 15826 Summary: don't use "if" to extract a single bit bit-field. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 What|Removed |Added

[Bug target/69613] [6 Regression] wrong code with -O and simple 128bit arithmetics and vectors @ aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69613 --- Comment #11 from Bill Schmidt --- Will check now.

[Bug tree-optimization/15826] don't use "if" to extract a single bit bit-field.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 Martin Sebor changed: What|Removed |Added Status|NEW |RESOLVED CC|

[Bug middle-end/19466] [meta-bug] bit-fields are non optimal

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19466 Bug 19466 depends on bug 15826, which changed state. Bug 15826 Summary: don't use "if" to extract a single bit bit-field. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 What|Removed |Added

[Bug middle-end/19987] [meta-bug] fold missing optimizations in general

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19987 Bug 19987 depends on bug 15826, which changed state. Bug 15826 Summary: don't use "if" to extract a single bit bit-field. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 What|Removed |Added

[Bug tree-optimization/15826] don't use "if" to extract a single bit bit-field.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15826 --- Comment #10 from Martin Sebor --- Author: msebor Date: Fri Feb 26 23:24:29 2016 New Revision: 233771 URL: https://gcc.gnu.org/viewcvs?rev=233771=gcc=rev Log: PR tree-optimization/15826 - don't use "if" to extract a single bit

[PATCH] Avoid 1x vectors in tree-vect-generic (PR rtl-optimization/69896)

Hi! On ppc64, the widest (and only) supported vector mode for __int128 element type is V1TImode, and there is a V1TImode or opcode and a couple of others, but IMNSHO it is highly undesirable to lower BLKmode (say 2xTI, 4xTI etc.) generic vectors to V1TI instead of TI, there are no advantages in

[Bug target/69773] gcc ICE at -O2 and above on valid code on x86_64-linux-gnu in "assign_by_spills"

/6.0.0/lto-wrapper Target: x86_64-pc-linux-gnu Configured with: ../gcc/configure --prefix=/home/absozero/trunk/root-gcc --enable-languages=c,c++ --disable-werror --enable-multilib Thread model: posix gcc version 6.0.0 20160226 (experimental) [trunk revision 233763] (GCC) $ gcc-trunk pr65693.c

[Bug tree-optimization/69740] [5 Regression] gcc ICE at -O2 and above on valid code on x86_64-linux-gnu in "verify_loop_structure"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69740 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug tree-optimization/69984] [4.9/5/6] Signed comparison instruction emitted for unsigned variable comparison

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69984 Andrew Pinski changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug tree-optimization/69740] [5 Regression] gcc ICE at -O2 and above on valid code on x86_64-linux-gnu in "verify_loop_structure"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69740 --- Comment #7 from Jeffrey A. Law --- Author: law Date: Fri Feb 26 22:56:02 2016 New Revision: 233769 URL: https://gcc.gnu.org/viewcvs?rev=233769=gcc=rev Log: PR tree-optimization/69740 * cfghooks.c (remove_edge): Request loop

[Bug tree-optimization/69984] New: [4.9/5/6] Signed comparison instruction emitted for unsigned variable comparison

popq%rbx .cfi_remember_state .cfi_def_cfa_offset 8 jmp bar2 .p2align 4,,10 .p2align 3 .L6: .cfi_restore_state callbar1 jmp .L2 .cfi_endproc .LFE0: .size foo, .-foo .ident "GCC: (GNU) 6.0.0

Re: [PATCH][AArch64] Replace insn to zero up DF register

On 02/26/16 06:37, Wilco Dijkstra wrote: Evandro Menezes wrote: I have a question though: is it necessary to add the "fp" and "simd" attributes to both movsf_aarch64 and movdf_aarch64 as well? You need at least the "simd" attribute, but providing "fp" as well is clearer

[Bug target/69969] [5 Regression] Function attribute no-vsx

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69969 Jakub Jelinek changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/69969] [5/6 Regression] Function attribute no-vsx

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69969 --- Comment #3 from Jakub Jelinek --- Author: jakub Date: Fri Feb 26 22:35:00 2016 New Revision: 233767 URL: https://gcc.gnu.org/viewcvs?rev=233767=gcc=rev Log: PR target/69969 * config/rs6000/rs6000.c

Re: [C PATCH] Fix C error-recovery (PR c/69796, PR c/69974)

On Fri, Feb 26, 2016 at 02:45:38PM -0700, Jeff Law wrote: > >2016-02-26 Jakub Jelinek > > > > PR c/69796 > > PR c/69974 > > * c-parser.c (c_parser_translation_unit): Don't change TREE_TYPE > > of incomplete decls to error_mark_node. > > > > *

Re: [PATCH][AArch64] PR target/69613: Return zero TARGET_SHIFT_TRUNCATION_MASK when SHIFT_COUNT_TRUNCATED is false

On Fri, Feb 26, 2016 at 1:44 PM, H.J. Lu wrote: > On Fri, Feb 26, 2016 at 7:50 AM, James Greenhalgh > wrote: >> On Thu, Feb 25, 2016 at 09:25:45AM +, Kyrill Tkachov wrote: >>> Hi all, >>> >>> In this wrong-code PR we get bad code when

[Bug c++/15766] bad parse error recovery (2 bugs)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15766 Martin Sebor changed: What|Removed |Added Status|NEW |RESOLVED CC|

Re: [PATCH, rs6000] Fixing PR 67145

On Fri, Feb 26, 2016 at 01:35:10PM -0800, Richard Henderson wrote: > On 02/26/2016 01:03 PM, Segher Boessenkool wrote: > > On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote: > >> + /* Perform rematerialization if only all operands are registers and > >> + all

[Bug c++/15766] bad parse error recovery (2 bugs)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15766 --- Comment #7 from Martin Sebor --- Author: msebor Date: Fri Feb 26 21:50:15 2016 New Revision: 233765 URL: https://gcc.gnu.org/viewcvs?rev=233765=gcc=rev Log: PR c++/15766 - bad parse error recovery (2 bugs) gcc/testsuite/ChangeLog:

Re: [C PATCH] Fix C error-recovery (PR c/69796, PR c/69974)

On 02/26/2016 07:43 AM, Jakub Jelinek wrote: Hi! Already PR69483 and these two further PRs show that it is really a bad idea to set TREE_TYPE of decls with incomplete types to error_mark_node, there are lots of places in the middle-end that don't expect error_mark_nodes appearing so late. I've

Re: [PATCH][AArch64] PR target/69613: Return zero TARGET_SHIFT_TRUNCATION_MASK when SHIFT_COUNT_TRUNCATED is false

On Fri, Feb 26, 2016 at 7:50 AM, James Greenhalgh wrote: > On Thu, Feb 25, 2016 at 09:25:45AM +, Kyrill Tkachov wrote: >> Hi all, >> >> In this wrong-code PR we get bad code when synthesising a TImode right shift >> by variable amount using DImode shifts during

Re: [PATCH] Fix up recent texinfo regression

On 02/26/2016 01:55 PM, Jakub Jelinek wrote: On Fri, Feb 26, 2016 at 01:09:57PM -0700, Martin Sebor wrote: On 02/26/2016 12:51 PM, Jakub Jelinek wrote: I've noticed today: ../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A ../../gcc/doc/extend.texi:10764: warning:

Re: [PATCH, rs6000] Fixing PR 67145

On Fri, Feb 26, 2016 at 01:10:17PM -0800, Richard Henderson wrote: > On 02/26/2016 01:01 PM, Segher Boessenkool wrote: > >> How do you imagine the rs6000 change will regress codegen? > > > > Combine of sequences with double-length adds. > > What sort of test case are you imagining here? The

Re: [PATCH, rs6000] Fixing PR 67145

On 02/26/2016 01:03 PM, Segher Boessenkool wrote: > On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote: >> + /* Perform rematerialization if only all operands are registers and >> + all operations are PLUS. */ >> + for (i = 0; i < n_ops; i++) >> +if

Re: [wwwdocs] Update -Wnonnull description

On Thu, 25 Feb 2016, Marek Polacek wrote: > Now that -Wnonnull-comare has been split out of -Wnonnull, we should > also update the porting_to text. Is this sufficient? It is for me. :-) Unless anyone else complains, go ahead and commit. Thanks, Gerald

Re: [PATCH] [wwwdocs] Add a "Plugin issues" section to the GCC 6 porting guide

Hi David, On Thu, 11 Feb 2016, David Malcolm wrote: > I've (mostly) ported gcc-python-plugin to gcc 6. The attached patch > for the gcc website starts a new "Plugin issues" section, and covers > the biggest issue I ran into (FWIW the suggested compatibility typedef > is the one I committed to

Re: [PATCH 2/4] Replace ENABLE_CHECKING macro with flag_checking in GNAT

On 02/24/2016 07:10 AM, marxin wrote: gcc/ada/ChangeLog: 2016-02-24 Martin Liska * gcc-interface/utils.c (set_reverse_storage_order_on_pad_type): Replace ENABLE_CHECKING macro with flag_checking. OK. jeff

Warning for converting (possibly) negative float/double to unsigned int

Perhaps this question is appropriate for the gcc mail list. Converting a float/double to unsigned int is undefined if the result would be negative when converted to a signed int. x86-64 and arm treat this condition differently---x86-64 returns a value whose bit pattern is the same as the bit

Re: Revert gcc r227962

On 02/26/2016 04:04 AM, JonY wrote: Hi, I've submitted a patch that was committed as r227962, it causes some unintended side effects (namely libuuid on Cygwin). Can someone please revert? Kai still needs some time to setup his gcc development environment. We'd need to have a better sense of

Re: Validity of SUBREG+AND-imm transformations

On 02/26/2016 06:40 AM, Kyrill Tkachov wrote: Hi all, I'm looking at a case where some RTL passes create an RTL expression of the form: (subreg:QI (and:SI (reg:SI x1) (const_int 31)) 0) which I'd like to simplify to: (and:QI (subreg:QI (reg:SI x1) 0) (const_int 31)) I can

Re: [PATCH, rs6000] Fixing PR 67145

On 02/26/2016 01:01 PM, Segher Boessenkool wrote: >> How do you imagine the rs6000 change will regress codegen? > > Combine of sequences with double-length adds. What sort of test case are you imagining here? The trivial tests I've looked at have all been optimal (before and after). > It

[Bug target/69613] [6 Regression] wrong code with -O and simple 128bit arithmetics and vectors @ aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69613 --- Comment #10 from Jakub Jelinek --- Try https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69896#c8 ? I'm bootstrapping/regtesting it now on x86_64-linux and i686-linux, if it fixes even this testcase for you and you could bootstrap/regtest it on

[PING^2] Re: [PATCH] [wwwdocs] Add a "Plugin issues" section to the GCC 6 porting guide

Ping On Thu, 2016-02-18 at 10:44 -0500, David Malcolm wrote: > Ping: > https://gcc.gnu.org/ml/gcc-patches/2016-02/msg00765.html > > > On Thu, 2016-02-11 at 10:12 -0500, David Malcolm wrote: > > I've (mostly) ported gcc-python-plugin to gcc 6. The attached > > patch > > for the gcc website

Re: [PATCH, rs6000] Fixing PR 67145

On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote: > diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c > index 450fa8b..9d55e7b 100644 > --- a/gcc/simplify-rtx.c > +++ b/gcc/simplify-rtx.c > @@ -4421,9 +4421,17 @@ simplify_plus_minus (enum rtx_code code, machine_mode > mode,

[Bug target/69613] [6 Regression] wrong code with -O and simple 128bit arithmetics and vectors @ aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69613 --- Comment #9 from Bill Schmidt --- Executing on host: /home/wschmidt/gcc/build/gcc-mainline-test/gcc/xgcc -B/home/wschmidt/gcc/build/gcc-mainline-test/gcc/ /home/wschmidt/gcc/gcc-mainline-test/gcc/testsuite/gcc.dg/torture/pr69613.c

Re: [PATCH, rs6000] Fixing PR 67145

On Fri, Feb 26, 2016 at 12:51:10PM -0800, Richard Henderson wrote: > > What is the rs6000 ICE? > > The simplify-rtx.c patch causes (reg:M ca) to get sorted to a different spot > in > the (plus (plus r1 r2) r3) chain than the rs6000 backend expects, producing an > ICE due to an unrecognizable

[Bug target/69613] [6 Regression] wrong code with -O and simple 128bit arithmetics and vectors @ aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69613 Bill Schmidt changed: What|Removed |Added Status|RESOLVED|REOPENED CC|

Re: [PATCH] Fix up recent texinfo regression

On Fri, Feb 26, 2016 at 01:09:57PM -0700, Martin Sebor wrote: > On 02/26/2016 12:51 PM, Jakub Jelinek wrote: > >I've noticed today: > >../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A > >../../gcc/doc/extend.texi:10764: warning: `.' or `,' must follow @xref, not A > >

Re: [PATCH, rs6000] Fixing PR 67145

On 02/26/2016 12:41 PM, Segher Boessenkool wrote: > On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote: >> It's the simplify-rtx.c portion of the patch that fixes the i686 regression. >> >> In the PR, Alan raises some good points, but I don't believe that we can >> address those

[Bug rtl-optimization/69896] [6 Regression] wrong code with -frename-registers @ x64_64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69896 --- Comment #9 from Jakub Jelinek --- Created attachment 37810 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37810=edit gcc6-pr69896.patch And here is the unfinished BIT_FIELD_REF folding patch. This fixes one issue, where we are asking

[Bug c++/69517] [5/6 regression] SEGV on a VLA with excess initializer elements

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69517 Martin Sebor changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned

Re: [PATCH, rs6000] Fixing PR 67145

On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote: > It's the simplify-rtx.c portion of the patch that fixes the i686 regression. > > In the PR, Alan raises some good points, but I don't believe that we can > address those for gcc6. A new rtl reassoc optimization that takes loop

Re: Importance of transformations that turn data dependencies into control dependencies?

On 02/24/2016 05:14 AM, Richard Biener wrote: Note that if a user writes if (p == d) { ... do lots of stuff via p ... } GCC might rewrite accesses to p as accesses to d and thus expose those opportunities. Is that a transform that isn't valid then or is the code written by

[Bug rtl-optimization/69896] [6 Regression] wrong code with -frename-registers @ x64_64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69896 --- Comment #8 from Jakub Jelinek --- Created attachment 37809 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37809=edit gcc6-pr69896.patch Ah, managed to reproduce. I have one patch and one partial incomplete one. It doesn't make any

Re: Committing via git

On 02/26/2016 12:18 PM, Joel Sherrill wrote: On 2/26/2016 11:50 AM, Jonathan Wakely wrote: On 26 February 2016 at 17:25, Joel Sherrill wrote: Hi Is there something special needed to commit via git? I got an odd error pushing some minor RTEMS patches and wondered what the proper procedure

[Bug middle-end/69983] [6 Regression] FAIL: gcc.dg/graphite/scop-sor.c scan-tree-dump-times graphite "number of SCoPs: 1" 1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69983 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC|

Re: [PATCH] Fix PR69760

On Wed, Feb 24, 2016 at 6:49 AM, Richard Biener wrote: > > The following fixes bogus SCEV analysis for expressions that are only > executed conditionally [note: conditionally here doesn't include > after a taken exit]. Basically we have to make sure further analysis > does not

[Bug middle-end/69983] New: [6 Regression] FAIL: gcc.dg/graphite/scop-sor.c scan-tree-dump-times graphite "number of SCoPs: 1" 1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69983 Bug ID: 69983 Summary: [6 Regression] FAIL: gcc.dg/graphite/scop-sor.c scan-tree-dump-times graphite "number of SCoPs: 1" 1 Product: gcc Version: 6.0 Status:

[Bug middle-end/69920] [6 Regression] FAIL: g++.dg/torture/pr42704.C -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69920 Jeffrey A. Law changed: What|Removed |Added Status|ASSIGNED|RESOLVED CC|

[Bug tree-optimization/68714] [6 Regression] less folding of vector comparison

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68714 Richard Henderson changed: What|Removed |Added Status|NEW |ASSIGNED CC|

Re: [PATCH] Fix up recent texinfo regression

On 02/26/2016 12:51 PM, Jakub Jelinek wrote: Hi! I've noticed today: ../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A ../../gcc/doc/extend.texi:10764: warning: `.' or `,' must follow @xref, not A After reading info texinfo on @xref and @pxref, I believe it is

Re: [PATCH] Fix "no-vsx" target attribute handling (PR target/69969)

On Fri, Feb 26, 2016 at 2:27 PM, Jakub Jelinek wrote: > Hi! > > Most of the errors and warnings in rs6000_option_override_internal > are emitted only if the particular option is explicit, e.g. > if (TARGET_P9_DFORM && !TARGET_P9_VECTOR) > { > if

[Bug rtl-optimization/69896] [6 Regression] wrong code with -frename-registers @ x64_64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69896 --- Comment #7 from Jakub Jelinek --- Can't reproduce such ICE (with a cross). That said, this was a RTL bug, so if it ICEs during gimple verification, IMHO it should be tracked in a different PR.

[Bug c++/69958] sizeof... computes wrong size

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69958 Jason Merrill changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug c++/69958] sizeof... computes wrong size

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69958 --- Comment #4 from Jason Merrill --- Author: jason Date: Fri Feb 26 19:54:33 2016 New Revision: 233758 URL: https://gcc.gnu.org/viewcvs?rev=233758=gcc=rev Log: PR c++/69958 * pt.c (make_argument_pack): New.

C++ PATCH for c++/69958 (wrong sizeof...)

alias templates are supposed to be transparent, so when we see template using wrapped2 = list>; the size_for needs to be expanded into sizeof...(something). There is no way to write this "something" in C++, but it's simple enough to leave it as an

[PATCH] Fix up recent texinfo regression

Hi! I've noticed today: ../../gcc/doc/extend.texi:10717: warning: `.' or `,' must follow @xref, not A ../../gcc/doc/extend.texi:10764: warning: `.' or `,' must follow @xref, not A After reading info texinfo on @xref and @pxref, I believe it is invalid to use @xref this way, in the middle of a

[Bug hsa/69674] hsa offloading, -m32: "internal compiler error: in hsa_build_append_simple_mov"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69674 Martin Jambor changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

Re: [hsa merge 08/10] HSAIL BRIG description header file

On Feb 26, 2016, at 10:58 AM, Martin Jambor wrote: > I have asked HSA foundation Thanks. > The license is going to be: > > The MIT License (MIT) Wonderful.

[PATCH] Fix "no-vsx" target attribute handling (PR target/69969)

Hi! Most of the errors and warnings in rs6000_option_override_internal are emitted only if the particular option is explicit, e.g. if (TARGET_P9_DFORM && !TARGET_P9_VECTOR) { if (rs6000_isa_flags_explicit & OPTION_MASK_P9_VECTOR) error ("-mpower9-dform requires

Re: Committing via git

On 2/26/2016 11:50 AM, Jonathan Wakely wrote: On 26 February 2016 at 17:25, Joel Sherrill wrote: Hi Is there something special needed to commit via git? I got an odd error pushing some minor RTEMS patches and wondered what the proper procedure was. I am using the same commands and process

[Bug c/6906] warn about asserts with side effects

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=6906 --- Comment #6 from owner at bugs dot debian.org --- Thank you for the additional information you have supplied regarding this Bug report. This is an automatically generated reply to let you know your message has been received. Your message is

Re: [PATCH] powerpc: Handle DImode rotatert implemented with rlwinm (PR69946)

On Fri, Feb 26, 2016 at 1:52 PM, Segher Boessenkool wrote: > On Thu, Feb 25, 2016 at 10:52:29AM -0500, David Edelsohn wrote: >> Please add a short comment explaining why rs6000_insn_for_shift_mask >> doesn't need to match the logic in rs6000_is_valid_shift_mask >>

[Bug c/66298] -Wmisleading-indentation should also detect missing indentation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66298 --- Comment #2 from David Malcolm --- IIRC, currently the warning is checking for guards that appear to guard a statement, but which don't; the above examples are all for guards that don't appear to guard a statement, but do.

[Bug c/66298] -Wmisleading-indentation should also detect missing indentation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66298 --- Comment #1 from Florian Weimer --- Other examples. All should receive warnings. while (check_something()) // do_something(); (commented out) do_something(); if (check_something()) #include "/dev/null" do_something(); if

[Bug bootstrap/69709] [6 Regression] profiled bootstrap error on s390x-linux-gnu with r233194

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69709 Jakub Jelinek changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

Re: [hsa merge 08/10] HSAIL BRIG description header file

Hi, I hope I've got some good news: On Thu, Jan 14, 2016 at 05:18:56PM -0800, Ian Lance Taylor wrote: > Jakub Jelinek writes: > > > On Wed, Jan 13, 2016 at 06:39:33PM +0100, Martin Jambor wrote: > >> the following patch adds a BRIG (binary representation of HSAIL) > >>

[Bug c++/15538] Misleading diagnostic for recursive template instantiation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15538 Martin Sebor changed: What|Removed |Added Last reconfirmed|2005-06-20 04:11:44 |2016-2-26 CC|

[Bug target/69946] [6 Regression] Invalid ppc64 assembly emitted starting with r226005

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69946 Jakub Jelinek changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug c++/69958] sizeof... computes wrong size

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69958 Jason Merrill changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

Re: [PATCH] powerpc: Handle DImode rotatert implemented with rlwinm (PR69946)

On Thu, Feb 25, 2016 at 10:52:29AM -0500, David Edelsohn wrote: > Please add a short comment explaining why rs6000_insn_for_shift_mask > doesn't need to match the logic in rs6000_is_valid_shift_mask > converting rotates to simple shifts. I added this comment: --- trunk/gcc/config/rs6000/rs6000.c

[Bug target/69946] [6 Regression] Invalid ppc64 assembly emitted starting with r226005

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69946 --- Comment #3 from Segher Boessenkool --- Author: segher Date: Fri Feb 26 18:49:18 2016 New Revision: 233755 URL: https://gcc.gnu.org/viewcvs?rev=233755=gcc=rev Log: powerpc: Handle DImode rotatert implemented with rlwinm (PR69946) Some

Re: (Non-)offloading diagnostics

Hi, On Fri, Feb 26, 2016 at 06:51:34PM +0100, Jakub Jelinek wrote: > On Fri, Feb 26, 2016 at 06:18:13PM +0100, Martin Jambor wrote: > > > I'm a proponent of enabling as many useful warnings by default, or if not > > > by default, then with -Wall. -Whsa is enabled by default, and has thus > > >

[Bug target/69841] Wrong template instantiation in C++11 on armv7l

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69841 James Greenhalgh changed: What|Removed |Added CC||jason at gcc dot gnu.org --- Comment

[Bug middle-end/69920] [6 Regression] FAIL: g++.dg/torture/pr42704.C -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69920 --- Comment #14 from Martin Jambor --- (In reply to Dominik Vogt from comment #12) > The Ice in 42704.c is gone on s390[x] with trunk (but not the other FAILs). > Is the Ice below related to this bug report or is it something totally >

[Bug middle-end/69976] Zero the local stack on function exit

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69976 --- Comment #4 from joseph at codesourcery dot com --- I think you should read the discussion starting at and see how your ideas compare to it, then maybe try to restart that discussion and

[Bug tree-optimization/69740] [5/6 Regression] gcc ICE at -O2 and above on valid code on x86_64-linux-gnu in "verify_loop_structure"

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69740 --- Comment #6 from Jeffrey A. Law --- Author: law Date: Fri Feb 26 18:17:02 2016 New Revision: 233754 URL: https://gcc.gnu.org/viewcvs?rev=233754=gcc=rev Log: PR tree-optimization/69740 * cfghooks.c (remove_edge): Request loop

Re: Fix PR44281 (bad RA with global regs)

On 02/26/2016 08:41 AM, Bernd Schmidt wrote: On 02/22/2016 03:37 PM, Richard Biener wrote: Do calls properly clobber them even if they are not in the set of call-clobbered regs? Are asm()s properly using/clobbering them? I think you are allowed to use them in asm()s without adding constraints

Re: [Fortran, Patch] (Coarrays) Wrong events size

Dear Alessandro, Seconded! I saw your ping on my phone and was going to respond. well, now :-) Thanks for the patch Paul On 26 February 2016 at 18:29, Thomas Koenig wrote: > Hi Allessandro, > >> * PING * > > > Looks obvious and simple enough for me. > > OK. > >

Re: [Patch, Fortran] PR 69495: unused-label warning does not tell which flag triggered it

double-ping ... 2016-02-12 0:29 GMT+01:00 Janus Weil : > ping! > > 2016-02-05 19:19 GMT+01:00 Janus Weil : >> Hi all, >> >> I have slightly updated the patch now to avoid string-breaking issues >> (even if it may not be a problem at all, as mentioned by

[Bug middle-end/69920] [6 Regression] FAIL: g++.dg/torture/pr42704.C -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69920 --- Comment #13 from Martin Jambor --- Author: jamborm Date: Fri Feb 26 18:06:42 2016 New Revision: 233753 URL: https://gcc.gnu.org/viewcvs?rev=233753=gcc=rev Log: [PR 69920] Prevent SRA from leaving a removed SSA_NAME in IL 2016-02-26 Martin

[Bug bootstrap/69709] [6 Regression] profiled bootstrap error on s390x-linux-gnu with r233194

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69709 --- Comment #14 from Andreas Krebbel --- Author: krebbel Date: Fri Feb 26 18:03:51 2016 New Revision: 233752 URL: https://gcc.gnu.org/viewcvs?rev=233752=gcc=rev Log: S/390: PR69709 Fix risbg splitter This fixes a wrong code generation problem

[Bug c++/15369] "Wrong" line number for static constructor function

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=15369 Martin Sebor changed: What|Removed |Added Status|NEW |RESOLVED CC|

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