decrement_and_branch_until_zero pattern

2018-06-07 Thread Paul Koning
I'm a bit puzzled by the decrement_and_branch_until_zero looping pattern. The manual described it as a named pattern, through from the description it isn't clear that it's referenced by name. I see those only in m68k and pa. There are similar looking but anonymous patterns in pdp11 and vax, s

gcc-7-20180607 is now available

2018-06-07 Thread gccadmin
Snapshot gcc-7-20180607 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/7-20180607/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 7 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-7

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Richard Earnshaw (lists)
On 07/06/18 10:46, Richard Biener wrote: > On Thu, Jun 7, 2018 at 11:45 AM Ard Biesheuvel > wrote: >> >> On 7 June 2018 at 11:35, Richard Biener wrote: >>> On Thu, Jun 7, 2018 at 10:45 AM Ard Biesheuvel >>> wrote: On 7 June 2018 at 10:21, Christoffer Dall wrote: > On Thu, Jun 07,

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Richard Biener
On Thu, Jun 7, 2018 at 12:01 PM Will Deacon wrote: > > On Thu, Jun 07, 2018 at 09:48:50AM +0200, Christoffer Dall wrote: > > [+Will] > > > > On Tue, Jun 05, 2018 at 03:07:14PM +0200, Laszlo Ersek wrote: > > > On 06/05/18 13:30, Richard Biener wrote: > > > > On Mon, Jun 4, 2018 at 8:11 PM Laszlo Er

Re: How to get GCC on par with ICC?

2018-06-07 Thread Richard Biener
On Wed, Jun 6, 2018 at 5:52 PM Paul Menzel wrote: > > Dear GCC folks, > > > Some scientists in our organization still want to use the Intel > compiler, as they say, it produces faster code, which is then executed > on clusters. Some resources on the Web [1][2] confirm this. (I am aware, > that it’

Re: How to get GCC on par with ICC?

2018-06-07 Thread Richard Biener
On Wed, Jun 6, 2018 at 8:31 PM Ryan Burn wrote: > > One case where ICC can generate much faster code sometimes is by using > the nontemporal pragma [https://software.intel.com/en-us/node/524559] > with loops. > > AFAIK, there's no such equivalent pragma in gcc > [https://gcc.gnu.org/ml/gcc/2012-01

Re: How to get GCC on par with ICC?

2018-06-07 Thread Richard Biener
On Wed, Jun 6, 2018 at 11:10 PM Zan Lynx wrote: > > On 06/06/2018 10:22 AM, Dmitry Mikushin wrote: > > The opinion you've mentioned is common in scientific community. However, in > > more detail it often surfaces that the used set of GCC compiler options > > simply does not correspond to that "fas

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Richard Biener
On Thu, Jun 7, 2018 at 11:45 AM Ard Biesheuvel wrote: > > On 7 June 2018 at 11:35, Richard Biener wrote: > > On Thu, Jun 7, 2018 at 10:45 AM Ard Biesheuvel > > wrote: > >> > >> On 7 June 2018 at 10:21, Christoffer Dall wrote: > >> > On Thu, Jun 07, 2018 at 09:56:18AM +0200, Ard Biesheuvel wrote

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Ramana Radhakrishnan
On Thu, Jun 7, 2018 at 10:35 AM, Richard Biener wrote: > On Thu, Jun 7, 2018 at 10:45 AM Ard Biesheuvel > wrote: >> >> On 7 June 2018 at 10:21, Christoffer Dall wrote: >> > On Thu, Jun 07, 2018 at 09:56:18AM +0200, Ard Biesheuvel wrote: >> >> On 7 June 2018 at 09:48, Christoffer Dall >> >> wro

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Richard Biener
On Thu, Jun 7, 2018 at 10:45 AM Ard Biesheuvel wrote: > > On 7 June 2018 at 10:21, Christoffer Dall wrote: > > On Thu, Jun 07, 2018 at 09:56:18AM +0200, Ard Biesheuvel wrote: > >> On 7 June 2018 at 09:48, Christoffer Dall wrote: > >> > [+Will] > >> > > >> > On Tue, Jun 05, 2018 at 03:07:14PM +02

Re: ABS_EXPR anti range handling in extract_range_from_unary_expr() useless?

2018-06-07 Thread Richard Biener
On Thu, Jun 7, 2018 at 9:06 AM Aldy Hernandez wrote: > > Howdy. > > I'm looking at the ABS_EXPR code in extract_range_from_unary_expr() and > have noticed that by the time we get here: > >/* If a VR_ANTI_RANGEs contains zero, then we have > ~[-INF, min(MIN, MAX)]. */ >if

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Christoffer Dall
On Thu, Jun 07, 2018 at 10:45:13AM +0200, Ard Biesheuvel wrote: > On 7 June 2018 at 10:21, Christoffer Dall wrote: > > On Thu, Jun 07, 2018 at 09:56:18AM +0200, Ard Biesheuvel wrote: > >> On 7 June 2018 at 09:48, Christoffer Dall wrote: > >> > [+Will] > >> > > >> > On Tue, Jun 05, 2018 at 03:07:1

Re: code-gen options for disabling multi-operand AArch64 and ARM instructions

2018-06-07 Thread Christoffer Dall
On Thu, Jun 07, 2018 at 09:56:18AM +0200, Ard Biesheuvel wrote: > On 7 June 2018 at 09:48, Christoffer Dall wrote: > > [+Will] > > > > On Tue, Jun 05, 2018 at 03:07:14PM +0200, Laszlo Ersek wrote: > >> On 06/05/18 13:30, Richard Biener wrote: > >> > On Mon, Jun 4, 2018 at 8:11 PM Laszlo Ersek wro

ABS_EXPR anti range handling in extract_range_from_unary_expr() useless?

2018-06-07 Thread Aldy Hernandez
Howdy. I'm looking at the ABS_EXPR code in extract_range_from_unary_expr() and have noticed that by the time we get here: /* If a VR_ANTI_RANGEs contains zero, then we have ~[-INF, min(MIN, MAX)]. */ if (vr0.type == VR_ANTI_RANGE) ...we have already handled VR_VARYING, V