So that zcmp can be enabled in -Os where
shrink-wrap-separate is not effective.
To force enabling zcmp multi push/pop in speed perfered case,
fno-shrink-wrap-separate has to be explictly given.
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_avoid_shrink_wrapping_separate): wrap
No functional changes but restructure and expose use_shrink_wrapping_separate
to the TARGETs.
gcc/ChangeLog:
* shrink-wrap.cc (try_shrink_wrapping_separate):call
use_shrink_wrapping_separate.
(use_shrink_wrapping_separate): wrap the condition
check in
Enable muti push and pop for Zcmp when shrink-wrap-separate is ineffective.
Fei Gao (2):
allow targets to check shrink-wrap-separate enabled or not
[V2][RISC-V] enable muti push and pop for Zcmp when shrink-wrap-separate is
ineffective
gcc/config/riscv/riscv.cc | 21
Following the similar support for C++, here is the C implementation for
the OpenMP 5.0 array-shaping operator, and for strided and rectangular
updates for "target update".
Much of the implementation is shared with the C++ support added by the
previous patch. Some details of parsing necessarily
This patch implements noncontiguous "target update" for Fortran.
The existing middle end/runtime bits relating to C and C++ support are
reused, with some small adjustments, e.g.:
1. The node used to map the OMP "array descriptor" (from omp-low.cc
onwards) now uses the OMP_CLAUSE_SIZE field
At present, map/to/from clauses on OpenMP "target" directives may be
expanded into several mapping nodes if they describe array sections with
pointer or reference bases, or similar. This patch allows the original
clause to be replaced during that expansion, mostly by passing the list
pointer to
This patch series provides support for the OpenMP 5.0+ array-shaping
operator and for strided/rectangular updates for 'target update'
directives. Each of C, C++ and Fortran is supported (using existing
base language syntax for the last).
This series applies on top of the "infrastructure" support
This patch works around behaviour of the 2D and 3D memcpy operations in
the CUDA driver runtime. Particularly in Fortran, the "base pointer"
of an array (used for either source or destination of a host/device copy)
may lie outside of data that is actually stored on the device. The fix
is to make
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111303
Shaohua Li changed:
What|Removed |Added
CC||guojiufu at gcc dot gnu.org
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111295
JuzheZhong changed:
What|Removed |Added
CC||juzhe.zhong at rivai dot ai
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111296
JuzheZhong changed:
What|Removed |Added
CC||juzhe.zhong at rivai dot ai
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111238
--- Comment #3 from Christophe Lyon ---
The original problem is fixed by
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628998.html, and it seems
better not to call GLIBCXX_CHECK_LINKER_FEATURES and silently hide a potential
problem.
Thanks for explaining, LGTM :)
On Mon, Sep 4, 2023 at 11:39 PM Lehua Ding wrote:
>
> Hi Kito,
>
> > Can those intermediate patterns be used for intrinsic? I would prefer
> > to keep those stuff *IF* possible used for intrinsics.
>
> I think we don't need those patterns for intrinisc. First, the
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111303
Bug ID: 111303
Summary: ICE: in type, at value-range.h:869
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Pushed to trunk with few testcase modifications, e.g. adding { target
{ riscv_vector } } to dg-run and adding -march / -mabi for compile
tests.
On Tue, Sep 5, 2023 at 4:18 PM Kito Cheng wrote:
>
> Thanks for fixing the issue! I guess I could find time tonight to do
> the final round review and
Okay, I'll take a look at it right away. Thanks reporting.
On 2023/9/6 16:17, Kito Cheng via Gcc-patches wrote:
Got failed on the trunk, could you take a look?
=== gcc: Unexpected fails for rv32imafdc ilp32d medlow ===
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c
Got failed on the trunk, could you take a look?
=== gcc: Unexpected fails for rv32imafdc ilp32d medlow ===
FAIL: gcc.target/riscv/rvv/autovec/cond/cond_sqrt-1.c scan-assembler
\\tvsetvli\\t[a-z0-9]+,[a-z0-9]+,e[0-9]+,m[f0-9]+,t[au],mu
FAIL:
On Wed, Sep 6, 2023 at 9:47 AM Fei Gao wrote:
>
> On 2023-09-05 20:02 Kito Cheng wrote:
> >
> >> @@ -5569,7 +5571,9 @@ riscv_avoid_multi_push (const struct
> >> riscv_frame_info *frame)
> >> {
> >>if (!TARGET_ZCMP || crtl->calls_eh_return || frame_pointer_needed
> >>||
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83077
--- Comment #12 from Iain Sandoe ---
(In reply to Iain Sandoe from comment #11)
> (In reply to François Dumont from comment #10)
> > This is because you are facing the PR65762 issue. I just attached a path
> > proposal to it that you need to
I saw RVC has MASK_RVC and TARGET_RVC in options.h?
On Wed, Sep 6, 2023 at 2:39 PM Feng Wang wrote:
>
> According to the doc, take“Mask(VECTOR_ELEN_32)
> Var(riscv_vector_elen_flags)”as example,
> it just generates the OPTION_MASK_VECTOR_ELEN_32, will not generate
> MASK_VECTOR_ELEN_32
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83077
--- Comment #11 from Iain Sandoe ---
(In reply to François Dumont from comment #10)
> This is because you are facing the PR65762 issue. I just attached a path
> proposal to it that you need to apply too to be able to run your test.
> You'll be
On Wed, Sep 06, 2023 at 07:43:26AM +0100, Richard Sandiford wrote:
> Yang Yujie writes:
> > @@ -5171,25 +5213,21 @@ case "${target}" in
> > # ${with_multilib_list} should not contain whitespaces,
> > # consecutive commas or slashes.
> > if echo
Yang Yujie writes:
> @@ -5171,25 +5213,21 @@ case "${target}" in
> # ${with_multilib_list} should not contain whitespaces,
> # consecutive commas or slashes.
> if echo "${with_multilib_list}" \
> - | grep -E -e "[[:space:]]" -e '[,/][,/]' -e
According to the doc, take“Mask(VECTOR_ELEN_32)
Var(riscv_vector_elen_flags)”as example,
it just generates the OPTION_MASK_VECTOR_ELEN_32, will not generate
MASK_VECTOR_ELEN_32
and TARGET_VECTOR_ELEN_32.
Do you want to use "MASK(name) Var(other_flags)" to generate the MASK and
TARGET
On Tue, Sep 05, 2023 at 03:07:15PM -0700, Andrew Pinski wrote:
> Note I notice another all to build_nonstandard_integer_type in this
> match pattern which might also need to be fixed:
> /* For (x << c) >> c, optimize into x & ((unsigned)-1 >> c) for
>unsigned x OR truncate into the
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111302
Matthias Kretz (Vir) changed:
What|Removed |Added
Target Milestone|--- |14.0
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111302
Bug ID: 111302
Summary: aligned std::experimental::simd loads and stores are
not constant expressions
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110643
--- Comment #12 from Mathieu Malaterre ---
regression started today
% cvise check.sh math_test.cc
00:00:27 INFO ===< 3971165 >===
00:00:27 INFO running 4 interestingness tests in parallel
00:00:27 INFO INITIAL
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83028
Gayathri Gottumukkala changed:
What|Removed |Added
CC||gayathri.gottumukkala.27@gm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52953
Gayathri Gottumukkala changed:
What|Removed |Added
CC||gayathri.gottumukkala.27@gm
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107198
Gayathri Gottumukkala changed:
What|Removed |Added
CC||gayathri.gottumukkala.27@gm
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