[PATCH PR85720/partial]Support runtime loop versioning if loop can be distributed into builtin functions

on x86_64. Is it OK? Thanks, bin 2018-05-22 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (break_alias_scc_partitions): Don't merge SCC if all partitions are builtins. (version_loop_by_alias_check): New parameter. Generate cancelable runtime

[PATCH PR85804]Fix wrong code by correcting bump step computation in vector(1) load of single-element group access

Bin Cheng <bin.ch...@arm.com> PR tree-optimization/85804 * tree-vect-stmts.c (vectorizable_load): Compute correct bump step for vector(1) load in single-element group access. gcc/testsuite 2018-05-17 Bin Cheng <bin.ch...@arm.com> PR tree-optimi

[PATCH PR85793]Fix ICE by loading vector(1) scalara_type for 1 element-wise case

Hi, This patch fixes ICE by loading vector(1) scalar_type if it's 1 element-wise for VMAT_ELEMENTWISE. Bootstrap and test on x86_64 and AArch64 ongoing. Is it OK? Thanks, bin 2018-05-16 Bin Cheng <bin.ch...@arm.com> Richard Biener <rguent...@suse.de> PR tree-

[PATCH GCC][6/6]Restrict predcom using register pressure information

2018-04-27 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c (stor-layout.h, tree-ssa-live.h): Include. (REG_RELAX_RATIO, prune_chains): New. (tree_predictive_commoning_loop): Compute reg pressure using class region. Prune chains based on reg pressure.

[PATCH GCC][5/6]implement live range, reg pressure computation class

and coalesce data structures and algorithms in the future. Bootstrap and test on x86_64 and AArch64 ongoing. Any comments? Thanks, bin 2018-04-27 Bin Cheng <bin.ch...@arm.com> * tree-ssa-live.c (memmodel.h, ira.h, tree-ssa-coalesce.h): Include. (struct stmt_lr_info, free_stmt_l

[PATCH GCC][4/6]Support regional coalesce and live range computation

2018-04-27 Bin Cheng <bin.ch...@arm.com> * tree-outof-ssa.c (remove_ssa_form): Update use. * tree-ssa-coalesce.c (build_ssa_conflict_graph): Support regional coalesce. (coalesce_with_default): Update comment. (create_outofssa_var_map): Support re

[PATCH GCC][3/6]Delete unnecessary function live_merge_and_clear

HI, This is an obvious patch removing the unnecessary function. Bootstrap and test on x86_64 and AArch64 ongoing. Is it OK? Thanks, bin 2018-04-27 Bin Cheng <bin.ch...@arm.com> * tree-ssa-live.h (live_merge_and_clear): Delete.From ba6e47da7faba9a31c776a6d06ef052b1ed392a8 Mon

[PATCH GCC][2/6]Compute available register for each register classes

Hi, This is the second patch computing available/clobber registers for register classes. It's the same as the original patch posted @https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01022.html Bootstrap and test on x86_64 and AArch64 ongoing. Any comments? Thanks, bin 2017-04-27 Bin Cheng

[PATCH GCC][1/6]Compute type mode and register class mapping

at https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01021.html Bootstrap and test on x86_64 and AArch64 ongoing. Any comments? Thanks, bin 2018-04-27 Bin Cheng <bin.ch...@arm.com> * ira.c (setup_mode_classes): New function. (find_reg_classes): Call above function. *

[PATCH PR85190]Adjust pointer for aligned access

Bin Cheng <bin.ch...@arm.com> PR testsuite/85190 * gcc.dg/vect/pr81196.c: Adjust pointer for aligned access.diff --git a/gcc/testsuite/gcc.dg/vect/pr81196.c b/gcc/testsuite/gcc.dg/vect/pr81196.c index 46d7a9e..15320ae 100644 --- a/gcc/testsuite/gcc.dg/vect/pr81196.c +++

[wwwdocs]Mention -ftree-loop-distribution

Hi, Option -ftree-loop-distribution is improved and enabled by default at -O3 for GCC8. This patch describes the change, is it OK? Thanks, binIndex: htdocs/gcc-8/changes.html === RCS file:

[PATCH testsuite]Fix pr83126.c failure for bare-metal toolchains

Hi, The new test pr83126.c requires pthread for compiling, this simple patch skips it for bare-metal toolchains. Test checked. Is it OK? Thanks, bin gcc/testsuite 2018-03-22 Bin Cheng <bin.ch...@arm.com> * gcc.dg/graphite/pr83126.c: Require pthread for the test.diff --git

[PATCH PR84969]Don't reorder builtin memsets if they set different rhs values

solved in a more general way maximizing parallelism as well as merging opportunities when sorting partitions into topological order from dependence graph, which isn't GCC8 task. Bootstrap and test on x86_64 and AArch64 ongoing. Okay if no failures? Thanks, bin 2018-03-20 Bin Cheng <bin.ch..

[PATCH AArch64]Fix test failure for pr84682-2.c

Hi, This simple patch fixes test case failure for pr84682-2.c by returning false on wrong mode rtx in aarch64_classify_address, rather than assert. Bootstrap and test on aarch64. Is it OK? Thanks, bin 2018-03-16 Bin Cheng <bin.ch...@arm.com> * config/aarch64/aar

[PATCH PR82965/PR83991]Fix invalid profile count in vectorization peeling

on x86_64 and AArch64. gcc.dg/vect/pr79347.c is fixed for both PR82965 and PR83991. Is this OK? Thanks, bin 2018-01-30 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82965 PR tree-optimization/83991 * cfgloopmanip.c (scale_loop_profile): Further scale loop's p

[PATCH PR82604]Fix regression in ftree-parallelize-loops

can parallelize as before. Bootstrap and test on x86_64 and AArch64 ongoing. Is it OK if no errors? Thanks, bin 2018-01-19 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82604 * tree-loop-distribution.c (enum partition_kind): New enum item PKIND_PARTI

[PATCH PR83695]Fix ICE by resetting cached scev info after interchange.

only interchange in limited cases. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2018-01-11 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/83695 * gimple-loop-linterchange.cc (tree_loop_interchange::interchange_loops): Call scev_rese

[PATCH BACKPORT]Backport r254778 and test case in r244815 to GCC6

HI, This patch backports r254778 and test case in r244815 to GCC6. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2017-12-18 Bin Cheng <bin.ch...@arm.com> Backport from mainline 2017-11-15 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/8272

[GCC BACKPORT]Backport revision 254777 and 254778 to GCC 7 branch

Hi, This patch backports revision 254777 and 254778 to GCC 7 branch. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2017-12-18 Bin Cheng <bin.ch...@arm.com> Backport from mainline 2017-11-15 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/8272

[PATCH PR81740]Enforce dependence check for outer loop vectorization

rcing dependence check. It also adds two tests with one shouldn't be vectorized and the other should. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-12-15 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81740 * tree-vect-data-refs.c (vect_analyze

[PATCH PR83320]Fix new/free mismatch issue

Hi, While I am still trying to reproduce and verify the issue (valgrind checking runs very slow for me), It's clear I made stupid mistake using free for newed vector. This simple patch fixes it. Bootstrap and test ongoing. Is it OK? Thanks, bin 2017-12-06 Bin Cheng <bin.ch...@arm.

[PATCH GCC]More conservative interchanging small loops with const initialized simple reduction

with this patch. Is it OK if test passes? Thanks, bin 2017-12-08 Bin Cheng <bin.ch...@arm.com> * gimple-loop-interchange.cc (struct loop_cand): New field. (loop_cand::loop_cand): Init new field in constructor. (loop_cand::classify_simple_reduction): Record simple red

[PATCH GCC]Introduce loop interchange pass and enable it at -O3

is it OK? Thanks, bin 2017-12-07 Bin Cheng <bin.ch...@arm.com> Richard Biener <rguent...@suse.de> PR tree-optimization/81303 * Makefile.in (gimple-loop-interchange.o): New object file. * common.opt (floop-interchange): Reuse the option f

[PATCH TEST]Adjust GRAPHITE tests in preparation for loop interchange

Hi, The loop interchange pass reuses option -floop-interchange from GRAPHITE, this patch adjusts all affected GRAPHITE tests by changing the option to -floop-nest-optimize. Test result checked with/without loop interchange. Is it OK? Thanks, bin gcc/testsuite 2017-12-06 Bin Cheng <bin

[PATCH branch/gimple-interchange]obvious cleanup

Hi, This is an obvious cleanup patch doing variable renaming, function inlining. Is it OK? Thanks, bin 2017-12-05 Bin Cheng <bin.ch...@arm.com> * gimple-loop-interchange.cc (struct induction): Rename fields. (dump_induction, loop_cand::analyze_induction_var): Updat

[PATCH branch/gimple-linterchange]Use dyn_cast instread of is_a<> and as_a<>

Hi, This is a simple patch using dyn_cast instead of is_a<> and as_a<> as suggested by review. This is for branches/gimple-linterchange, bootstrap and test as when the branch is created. Is it OK? Thanks, bin 2017-11-30 Bin Cheng <bin.ch...@arm.com> * gimple-l

[PATCH GCC]Rename and make remove_dead_inserted_code a simple dce interface

to branch: gcc.gnu.org/svn/gcc/branches/gimple-linterchange. Thanks, bin 2017-11-27 Bin Cheng <bin.ch...@arm.com> * tree-ssa-dce.c (simple_dce_from_worklist): Move and rename from tree-ssa-pre.c::remove_dead_inserted_code. * tree-ssa-dce.h: New file. * tree-ssa

[PATCH GCC]Support load in CT_STORE_STORE chain if dominated by store in the same loop iteration

chain. That would need fundamental rewrite of the pass and not sure how useful it would be. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-11-15 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c: Add general comment on Store-

[PATCH Obvious]Remove redundant check on component distance

Hi, This is an obvious patch removing redundant check on component distance in tree-predcom.c Bootstrap and test along with next patch. Is it OK? Thanks, bin 2017-11-15 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c (add_ref_to_chain): Remove check on distanc

[PATCH PR82726/PR70754][2/2]New fix by finding correct root reference in combined chains

. This should be more efficient because we avoid function call to stmt_dominates_stmt_p. Bootstrap and test on x86_64 and AArch64 in patch set. Is it OK? Thanks, bin 2017-11-02 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82726 PR tree-optimization/70754

[PATCH PR82726][1/2]Revert previous fixes for PR70754 and PR79663

because we avoid function call to stmt_dominates_stmt_p. This is the first patch reverting r244815 and r245689. Bootstrap and test on x86_64 and AArch64 in patch set. Is it OK? Thanks, bin 2017-11-02 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82726 Revert 2017

[PATCH OBVIOUS]Fix memory leak in tree-predcom.c

Hi, I ran into this memory leak issue in tree-predcom.c when investigating other PRs. This is the obvious fix by freeing reference of trivial component. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2017-11-02 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c (determine_root

[PATCH PR82776]Exploit more undefined pointer overflow behavior in loop niter analysis

ition: (size_t (p2 - p1) >= n) in function B::append. So, any comment? Thanks, bin 2017-11-02 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82776 * tree-ssa-loop-niter.c (infer_loop_bounds_from_pointer_arith): Handle POINTER_PLUS_EXPR

Re: [PATCH GCC][3/3]Refine CFG and bound information for split loops

From: Richard Biener <richard.guent...@gmail.com> Sent: 20 October 2017 12:24 To: Bin Cheng Cc: gcc-patches@gcc.gnu.org; nd Subject: Re: [PATCH GCC][3/3]Refine CFG and bound information for split loops   On Thu, Oct 19, 2017 at 3:26 PM, Bin Cheng <bin.ch...@arm.com>

[PATCH GCC][3/3]Refine CFG and bound information for split loops

and AArch64. Comments? Thanks, bin 2017-10-16 Bin Cheng <bin.ch...@arm.com> * tree-ssa-loop-split.c (compute_new_first_bound): New parameter. Compute and return bound information for the second split loop. (adjust_loop_split): New function. (split_loop): Upda

[PATCH GCC][2/3]Simplify ((A +- CST1 CMP A +- CST2)) for undefined overflow type

Hi, This patch adds pattern simplifying (A +- CST1 CMP A +- CST2) for undefined overflow types. Bootstrap and test for patch set on x86_64 and AArch64. Comments? Thanks, bin 2017-10-16 Bin Cheng <bin.ch...@arm.com> * match.pd (A +- CST1 CMP A +- CST2): New patter

[PATCH GCC][1/3]Simplify (A + CST cmp A -> CST cmp zero) for undefined overflow type

simplifies (A + CST cmp A -> CST cmp zero) for types with undefined overflow behavior. Bootstrap and test for patch set on x86_64 and AArch64. Comments? Thanks, bin 2017-10-16 Bin Cheng <bin.ch...@arm.com> * match.pd (A + CST cmp A -> CST cmp zero): New simplification f

[PATCH PR82574]Check that datref must be executed exactly once per iteration against outermost loop in nest

only need to check against the outermost loop for perfect nest. Bootstrap and test on x86_64. Is it OK? Thanks, bin 2017-10-17 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82574 * tree-loop-distribution.c (find_single_drs): New parameter. Check that data ref

[PATCH GCC]Introduce qsort_range interface for GCC vector

on x86_64 and AArch64 with other patches. Is it OK? Thanks, bin 2017-10-13 Bin Cheng <bin.ch...@arm.com> * vec.h (struct GTY((user)) vec<T, A, vl_embed>::qsort_range): New member function. (struct vec<T, va_heap, vl_ptr>): New me

[PATCH GCC]Try harder to find base object by expanding base address

happened during the expansion. And it's good to have base object for address type iv_uses. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-10-12 Bin Cheng <bin.ch...@arm.com> * tree-scalar-evolution.c (alloc_iv): New parameter controlling base exp

[PATCH GCC]Refine comment and set type for partition merged from SCC

. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-10-10 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (break_alias_scc_partitions): Add comment and set PTYPE_SEQUENTIAL for merged partition.diff --git a/gcc/tree-loop-distribution.c b/gcc/tre

[PATCH PR82472]Update postorder number for merged partition.

? Thanks, bin 2017-10-10 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82472 * tree-loop-distribution.c (sort_partitions_by_post_order): Refine comment. (break_alias_scc_partitions): Update postorder number. gcc/testsuite 2017-10-10 Bin Cheng &

[PATCH GCC][7/7]Merge adjacent memset builtin partitions

_64 and AArch64, is it OK? Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (tree-ssa-loop-ivopts.h): New header file. (struct builtin_info): New fields. (classify_builtin_1): Compute and record base and offset parts for mem

[PATCH GCC][6/7]Support loop nest distribution for builtin partition

single memset, rather than a loop of memset. Bootstrap and test in patch set on x86_64 and AArch64, is it OK? Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (struct builtin_info): New struct. (struct partition): Refactor fields into struct

[PATCH GCC][5/7]Extend loop distribution for two-level innermost loop nest

on x86_64 and AArch64, is it OK? Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c: Adjust the general comment. (NUM_PARTITION_THRESHOLD): New macro. (ssa_name_has_uses_outside_loop_p): Support loop nest distribution. (classify_par

[PATCH GCC][4/7]Choose exit edge/path when removing inner loop's exit statement

for inner loop's exit condition, otherwise an infinite empty loop will be generated. Test case added. Bootstrap and test in patch set on x86_64 and AArch64, is it OK? Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (generate_loops_for_partition):

[PATCH GCC][3/7]Don't skip renaming PHIs in loop nest with only one inner loop

it is only triggered in building spec2006/416.gamess with loop nest distribution, but I failed to reduce a test from it. Bootstrap and test in patch set on x86_64 and AArch64, is it OK? Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-vect-loop-manip.c (rename_variables

[PATCH GCC][2/7]Don't rename variables for deleted new preheader

? Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg): Skip renaming variables in new preheader if it's deleted.From 9c7719402c9528b517d8408419c2e9b930708772 Mon Sep 17 00:00:00 2001 From: Bin Cheng <binch..

[PATCH GCC][1/7]Delete unused field of struct partition in loop distribution

. This is the first simple patch deleting unused field of struct partition in loop distribution. It's an obvious change. Bootstrap and test in patch set on x86_64 and AArch64. Thanks, bin 2017-10-04 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (struct partition):

[PATCH PR82163/V2]New interface checking LCSSA for single loop

. Bootstrap and test on x86_64, is it OK? Thanks, bin 2017-09-21 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/82163 * tree-ssa-loop-manip.h (verify_loop_closed_ssa): New parameter. (checking_verify_loop_closed_ssa): New parameter. * tree-ssa-loop-m

[PATCH PR82163]Rewrite loop into lcssa form instantly

it doesn't affect compilation time since rewrite_into_loop_closed_ssa_1 is only called for store-store chain transformation and only the transformed loop is rewritten. Bootstrap and test ongoing on x86_64. is it OK if no failures? Thanks, bin 2017-09-14 Bin Cheng <bin.ch...@arm.com>

[PATCH GCC]A simple implementation of loop interchange

Various benchmarks built and run successfully. Note this pass is disabled in patch, while the code is exercised by bootstrap/building programs with it enabled by default. Any comments? Thanks, bin 2017-08-29 Bin Cheng <bin.ch...@arm.com> * Makefile.in (tree-ssa-loop-inter

[PATCH PR81913]Skip niter analysis if either IV in exit condition can wrap

ter case as reported in PR81196, but unsigned type needs more work. The patch also includes two XFAIL tests showing what shall be improved here. Bootstrap and test on AArch64. Is it OK? Thanks, bin 2017-08-24 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81913

[GCC RFC]Expensive internal function calls.

this if not appropriate. Thanks, bin 2017-08-16 Bin Cheng <bin.ch...@arm.com> * gimple.c (gimple_inexpensive_call_p): Consider IFN_LOOP_DIST_ALIAS and IFN_LOOP_VECTORIZED as expensive calls.diff --git a/gcc/gimple.c b/gcc/gimple.c index c4e6f81..6d4e376 100644 --- a/gcc/gimple.c +++

[PATCH PR81832]Skip copying loop header if inner loop is distributed

, but the patch only checks loop's header for simplicity/efficiency's purpose. Any comment? Bootstrap and test on x86_64. Thanks, bin 2017-08-15 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81832 * tree-ssa-loop-ch.c (inner_loop_distributed_p): New function. (pass_c

[PATCH PR81799]Fix ICE by forcing to is_gimple_val

Hi, This patch fixes ICE reported in PR81799. It simply uses is_gimple_val rather than is_gimple_condexpr. Bootstap and test on x86_64. Is it OK? Thanks, bin 2017-08-11 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81799 * tree-loop-distribu

[PATCH GCC][02/06]New field in struct dependence_info indicating fixed length access

we need to differentiate dependence_info derived from runtime alias check with others derived from restrict pointer. Bootstrap and test in series. any comment? Thanks, bin 2017-08-10 Bin Cheng <bin.ch...@arm.com> * tree-core.h (struct tree_base.dependence_info): New

[PATCH GCC][01/06]New interface returning all adjacent vertices in graph

Hi, This simple patch adds new interface returning adjacent vertices for a vertex in graph. Bootstrap and test in series. Is it OK? Thanks, bin 2017-08-10 Bin Cheng <bin.ch...@arm.com> * graphds.c (adjacent_vertices): New function. * graphds.h (adjacent_vertices

[PATCH GCC][06/06]Record runtime alias info in struct dependence_info and pass it along

Thanks, bin 2017-08-10 Bin Cheng <bin.ch...@arm.com> * tree-vectorizer.h (struct rt_alias_clique): New. (free_rt_alias_clique): New declaration. (struct _loop_vec_info): New member rt_alias_clique_map. (LOOP_VINFO_RT_ALIAS_CLIQUE_MAP): New macro.

[PATCH GCC][03/06]Dump dependence information

Hi, This simple patch adds code dumping struct dependence_info. Bootstrap and test in series. Is it OK? Thanks, bin 2017-08-10 Bin Cheng <bin.ch...@arm.com> * tree-pretty-print.c (dump_generic_node): Dump fixed length tag in MEM_REF. Dump dependenc

[PATCH GCC][05/06]An interface clear all dependence_info with fixed access length tag

before expanding, but for now it is done in loopdone given predcom is the only motivation pass that I know. Bootstrap and test in series. Is it OK? Thanks, bin 2017-08-10 Bin Cheng <bin.ch...@arm.com> * tree-ssa-address.c (clear_dependence_info): New fu

[PATCH GCC][04/06]Add copying interface for dependence_info

. Is it OK? Thanks, bin 2017-08-10 Bin Cheng <bin.ch...@arm.com> * tree-ssa-address.c (copy_dependence_info): New function. * tree-ssa-address.h (copy_dependence_info): New declaration. * tree-ssa-loop-ivopts.c (rewrite_use_address): Call above fun

[PATCH GCC][OBVIOUS]Handle boundary case for last iv candidate

Hi, When investigate issues, I ran into this obvious issue that the last candidate is not related to compare type iv_use. This patch fixes it. Will apply later. Thanks, bin 2017-08-08 Bin Cheng <bin.ch...@arm.com> * tree-ssa-loop-ivopts.c (relate_compare_use_with_all_cands):

[PATCH PR81744]Fix ICE by deep copying expression of loop's number of iterations

Hi, This is an obvious patch. It fixes ICE in PR81744 by deep copying expression of loop's number of iterations. Test result checked. Is it OK? Thanks, bin 2017-08-07 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81744 * tree-predcom.c (prepare_finalizers_chain)

[PATCH PR81267]Rewrite into loop closed ssa form in case of any store-store chain

on x86_64 and AArch64 ongoing. Is it OK? Thanks, bin 2017-07-31 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81627 * tree-predcom.c (prepare_finalizers): Always rewrite into loop closed ssa form for store-store chain. gcc/testsuite/ChangeLog 2017-07-31 Bin

[PATCH PR81620]Don't set has_max_use_after flag for store-store chain

Hi, This simple patch fixes the ICE by not setting has_max_use_after flag for store-store chain because there is no use at all. Bootstrap and test on x86_64 and AArch64 ongoing. Is it OK if no failure? Thanks, bin 2017-07-31 Bin Cheng <bin.ch...@arm.com> PR tree-optimization

[PATCH PR81228]Fixes ICE by adding LTGT in vec_cmp.

it to gcc-7-branch. Thanks, bin 2017-07-27 Bin Cheng <bin.ch...@arm.com> PR target/81228 * config/aarch64/aarch64-simd.md (vec_cmp): Add LTGT. gcc/testsuite/ChangeLog 2017-07-27 Bin Cheng <bin.ch...@arm.com> PR target/81228 * gcc.dg/pr81228

[PATCH TEST]Require vect_perm in gcc.dg/vect/pr80815-3.c

Hi, The test has negative step in memory access, thus can't be vectorized on target like sparc-sun-solaris2.12. This patch adds vect_perm requirement for it. Test result checked. Is it OK? Thanks, bin gcc/testsuite/ChangeLog 2017-07-20 Bin Cheng <bin.ch...@arm.com> * gcc.d

[PATCH GCC]Make pointer overflow always undefined and remove the macro

, as in nowrap_type_p. This patch makes it always true thus removes definition/usage of the macro. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-07-20 Bin Cheng <bin.ch...@arm.com> * tree.h (POINTER_TYPE_OVERFLOW_UNDEFINED): Delete. * fold-const.c (fold_comp

[PATCH PR81388]Revert change in revision 238585

self, any fix would require may_be_zero to be computed, which basically leads to patch revert. Bootstrap and test on x86_64 and AArch64, is it OK? Thanks, bin 2017-07-20 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81388 Revert r238585: 2016-07-21 Bin Cheng

[GCC ARM]Remove unused variable in arm

Hi, This leftover unused variable breaks arm bootstrap. Simply remove it. Thanks, bin 2017-07-18 Bin Cheng <bin.ch...@arm.com> * config/arm/arm.c (arm_emit_store_exclusive): Remove unused var.diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 1b7b382..139ab70

[PATCH PR81408]Turn TREE level unsafe loop optimizations warning to missed optimization message

ssages. I didn't change when this will be dumped, for now it is when called from ivopts. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-07-13 Bin Cheng <bin.ch...@arm.com> PR target/81408 * tree-ssa-loop-niter.c (number_of_iterations_ex

[PATCH PR81369/02]Conservatively not distribute loop with unknown niters

, is it OK? Thanks, bin 2017-07-12 Bin Cheng <bin.ch...@arm.com> PR target/81369 * tree-loop-distribution.c (classify_partition): Only assert on numer of iterations. (merge_dep_scc_partitions): Delete prameter. Update function call. (distribute_loop):

[PATCH PR81369/01]Sort partitions by post order for all cases

Hi, This patch fixes ICE reported by PR81369. It simply sinks call to sort_partitions_by_post_order so that it's executed for all cases. This is necessary to schedule reduction partition as the last one. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-07-12 Bin Cheng

[PATCH AArch64]Fix ICE in cortex-a57 fma steering pass

tch fixes the issue by skipping such instructions if no du chain is found. Bootstrap and test on AArch64/cortex-a57. Is it OK? If it's fine, I would also need to backport it to 7/6 branches. Thanks, bin 2017-07-12 Bin Cheng <bin.ch...@arm.com> PR target/81414 * config/aarch64

[PATCH PR81374]Record the max index of basic block, rather than # of basic blocks

. Is it OK? Thanks, bin 2017-07-10 Bin Cheng <bin.ch...@arm.com> PR tree-optimization/81374 * tree-loop-distribution.c (pass_loop_distribution::execute): Record the max index of basic blocks, rather than number of basic blocks.diff --git a/gcc/tree-loop-distributi

[PATCH PR81196]Analyze ntiers for loop with exit condition comparing induction variables

Hi, This patch picks up a missed-optimization case in loop niter analysis. With this patch, niters information for loop as in added test can be analyzed. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-27 Bin Cheng <bin.ch...@arm.com> PR tree-optimi

[PATCH GCC][4/4]Better handle store-stores chain if eliminated stores only store loop invariant

i < n; i++) { a[i] = 1; } a[n] = 2; a[n+1] = 2; Bootstrap(O2/O3) in patch series on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-21 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c: (struct chain): Handle store-store chain in which stores for eliminati

[PATCH GCC][3/4]Generalize dead store elimination (or store motion) across loop iterations in predcom

Bootstrap(O2/O3) in patch series on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-21 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c: Revise general description of pass. (enum chain_type): New enum type for store elimination. (struct chain): New field s

[PATCH GCC][1/4]Extend interface ref_at_iteration to compute ref @ (NITERS + ITERS)-th iteration

/O3) in patch series on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-21 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c (ref_at_iteration): Add parameter NITERS. Compute memory reference to DR at (NITERS + ITERS)-th iteration of loo

[PATCH GCC][2/4]Remove interface initialize_root in predcom

Hi, This simple patch removes interface initialize_root. It's simple enough and called only once. Bootstrap(O2/O3) in patch series on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-21 Bin Cheng <bin.ch...@arm.com> * tree-predcom.c (initialize_root):

[PATCH GCC][2/2]Refine CFG and bound information for split loops

by later passes. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-12 Bin Cheng <bin.ch...@arm.com> * tree-ssa-loop-split.c (compute_new_first_bound): Compute and return bound information for the second split loop. (adjust_loop_split): New function

[PATCH GCC][1/2]Feed bound computation to folder in loop split

and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-12 Bin Cheng <bin.ch...@arm.com> * tree-ssa-loop-split.c (compute_new_first_bound): Feed bound computation to folder, rather than force to gimple operands too early.From 372dc98aa91fd495c98c2326f854eb5f2c7650

[PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

ion algorithm is desired to minimize loop overhead, maximize parallelism and maximize Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c: Add general explanantion on the pass. (pg

[PATCH GCC][12/13]Workaround reduction statements for distribution

that, this patch simply workarounds reduction issue by checking if the statement belongs to all partitions. If yes, the reduction must be computed in the last partition no matter how the loop is distributed. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin

[PATCH GCC][08/13]Refactoring structure partition for distribution

? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (struct partition): New fields recording its data references. (partition_alloc, partition_free): Init and release data refs. (partition_merge_into): Merge dat

[PATCH GCC][10/13]Compute and cache data dependence relation

Hi, This patch computes and caches data dependence relation in a hash table so that it can be queried multiple times later for partition dependence check. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tre

[PATCH GCC][11/13]Annotate partition by its parallelism execution type

work very well because it does blind distribution/fusion. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (alias.h): Include header file. (enum partition_type): New. (struct partition

[PATCH GCC][09/13]Simply cost model merges partitions with the same references

merge partitions with the same references. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (ref_base_address): Delete. (similar_memory_accesses): Rename ... (share_memory_ac

[PATCH GCC][06/13]Preserve loop nest in whole distribution life time

Hi, This simple patch computes and preserves loop nest vector for whole distribution life time. The loop nest will be used multiple times in on-demand data dependence computation. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.

[PATCH GCC][04/13]Sort statements in topological order for loop distribution

by sorting in topological order. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (bb_top_order_index): New. (bb_top_order_index_size, bb_top_order_cmp): New. (stmts_from_loop

[PATCH GCC][07/13]Preserve data references for whole distribution life time

Hi, This patch collects and preserves all data references in loop for whole distribution life time. It will be used afterwards. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (datare

[PATCH GCC][05/13]Refactoring partition merge

Hi, This simple patch refactors partition merge code and dump information. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (enum fuse_type, fuse_message): New. (partition_merge_into

[PATCH GCC][02/13]Skip distribution if there is no loop

Hi, this is a simple patch skipping distribution if there is no loop at all. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * cfgloop.h (pass_loop_distribution::execute): Skip if no loop

[PATCH GCC][03/13]Mark and skip distributed loops

Hi, This simple patch marks distributed loops and skips it in following distribution. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * tree-loop-distribution.c (generate_loops_for_partition): Mark distributed

[PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

. Bootstrap and test on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-07 Bin Cheng <bin.ch...@arm.com> * cfgloop.h (struct loop): New field ldist_alias_id. * cfgloopmanip.c (lv_adjust_loop_entry_edge): Comment change. * internal-fn.c (expand_LOOP_DIST_ALIAS): New fu

[PATCH GCC][5/5]Enable tree loop distribution at -O3 and above optimization levels.

Hi, This patch enables -ftree-loop-distribution by default at -O3 and above optimization levels. Bootstrap and test at O2/O3 on x86_64 and AArch64. is it OK? Note I don't have strong opinion here and am fine with either it's accepted or rejected. Thanks, bin 2017-05-31 Bin Cheng <bin

[PATCH GCC][4/5]Improve loop distribution to handle hmmer

s still inefficient code generation issue which I will try to fix in loop split. Apart from this, the next opportunity in hmmer is to eliminate number of dead stores under proper alias information. Bootstrap and test at O2/O3 on x86_64 and AArch64. is it OK? Thanks, bin 2017-05-31 Bin Cheng

[PATCH GCC][2/5]Extend graph data structure

edges skipped. Bootstrap and test at O2/O3 on x86_64 and AArch64. is it OK? Thanks, bin 2017-05-31 Bin Cheng <bin.ch...@arm.com> * graphds.c (add_edge): Intitialize edge's attached data. (foll_in_subgraph, dfs_fst_edge, dfs_next_edge): New function pointer par

[PATCH GCC][3/5]Move pass ivcanon upward in compilation process

Bin Cheng <bin.ch...@arm.com> * passes.def (pass_iv_canon): Move before pass_loop_distribution.From 1698cc3e552a17e84719dba1ff2fbe4a8890e6be Mon Sep 17 00:00:00 2001 From: Bin Cheng <binch...@e108451-lin.cambridge.arm.com> Date: Tue, 30 May 2017 17:56:05 +0100 Subject: [PAT

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