2011/12/4 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
http://gcc.gnu.org/ml/gcc-patches/2011-11/msg02574.html
As this is a blocker and I am blocked myself by a collect2 issue:
Eric, Denis, could one of you test the patch and apply it if it is okay?
It is PR51409.
I'm sorry,
2011/11/29 Georg-Johann Lay a...@gjlay.de:
Ian Lance Taylor wrote:
Georg-Johann Lay a...@gjlay.de writes:
So if a frontend can define address spaces and it is a generic feature, the
question is how to get the name of an address space in a generic, language
independent way.
We could decide
2011/11/29 Georg-Johann Lay a...@gjlay.de:
For devices with 8-bit SP reading the high byte SP_H of SP will get garbage.
The patch uses CLR instead of IN SP_H to read the high part of SP.
There are two issues with this patch:
== 1 ==
I cannot really test it because for devices that small
2011/11/30 Weddington, Eric eric.wedding...@atmel.com:
-Original Message-
From: Richard Henderson
Sent: Tuesday, November 29, 2011 11:30 AM
To: Georg-Johann Lay
Cc: gcc-patches@gcc.gnu.org; Denis Chertykov; Weddington, Eric;
Anatoly
Sokolov
Subject: Re: [Patch,AVR] Light-weight
2011/11/29 Georg-Johann Lay a...@gjlay.de:
Ian Lance Taylor wrote:
Georg-Johann Lay a...@gjlay.de writes:
So if a frontend can define address spaces and it is a generic feature, the
question is how to get the name of an address space in a generic, language
independent way.
We could decide
2011/11/28 Georg-Johann Lay a...@gjlay.de:
This adds two built-in functions that facilitate moving bits.
The two built-ins work the same way; there is a 16-bit version and a 8-bit
version.
The first operand specifies a mapping to apply to the second operand:
The n-th nibble of the mapping
2011/11/25 Georg-Johann Lay a...@gjlay.de
Georg-Johann Lay wrote:
Denis Chertykov wrote:
2011/11/20 Georg-Johann Lay .:
Subtracting 0x20 to get the SFR address from a RAM address is scattered
all
over the backend. The patch makes - PRINT_OPERAND_PUNCT_VALID_P and uses
2011/11/25 Georg-Johann Lay a...@gjlay.de:
This is a small extension to -mlog
* Print double_int with %D or %X
* Print supported sub-options with ?
* Fix thinko in avr_log_set_avr_log that ignored -mdeb.
Ok for trunk?
Johann
PR target/50566
* config/avr/avr-protos.h
2011/11/21 Georg-Johann Lay a...@gjlay.de:
After updating my local copy I get new runtime FAILs in the test suite because
of the following sequence, e.g. from gcc.c-torture/execute/990527-1.c:
sbiw r28,1 ; 12 addhi3_clobber/1 [length = 1]
ldi r24,lo8(9) ; 24
2011/11/20 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
2011/11/20 Georg-Johann Lay .:
Subtracting 0x20 to get the SFR address from a RAM address is scattered all
over the backend. The patch makes - PRINT_OPERAND_PUNCT_VALID_P and uses
%- to
subtract the SFR offset instead
2011/11/20 Georg-Johann Lay a...@gjlay.de:
This implements assembler drop-in replacement for 64-bit division/remainder.
The original libgcc implementation is extremely resource gulping because it
uses inline in several places and DImode is resource gulping, anyway.
With the patch the sizes
2011/11/20 Georg-Johann Lay a...@gjlay.de:
Subtracting 0x20 to get the SFR address from a RAM address is scattered all
over the backend. The patch makes - PRINT_OPERAND_PUNCT_VALID_P and uses %-
to
subtract the SFR offset instead of hard coded magic number 0x20 all over the
place. The
2011/11/17 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
Let's wait for
http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01874.html
Denis.
This are yet more intrinsic named address spaces:
* __pgm1, ... __pgm5 are 16-bit address spaces that refer to
the n-th 64k chunk of flash
Let's wait for
http://gcc.gnu.org/ml/gcc-patches/2011-10/msg01874.html
Denis.
2011/11/3 Georg-Johann Lay a...@gjlay.de:
This is a tweak for signed 16- and 32-bit division routines.
The old code called subroutine __divmod{si|hi}4_neg1 and returned if T-flag is
not set. This is costly. By shuffling the instructions the test can be moved
up without increasing the code
2011/11/2 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
To support the upcoming named address space support in avr, a 24-bit pointer
type is needed. This patch adds respective support of a 24-bit integer mode
called PSI.
The patch supports more than is actually needed for a
2011/10/31 Georg-Johann Lay a...@gjlay.de:
This is a fix for optimization flaw when dividing int by 2.
There is really no need for a library call. Costs of [U]DIV/[U]MOD are
adjusted
to take into account the costs of CONST_INT operands that must be loaded for
division by means of libgcc
2011/11/1 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/10/31 Georg-Johann Lay:
Since beginning of time, BRANCH_COST was set to 0 so that some
optimization
passes make code happily jumping around. The patch introduces a new
command
line option for that; mainly because I
2011/10/25 Georg-Johann Lay a...@gjlay.de:
With the following, small C test program
typedef struct
{
unsigned char a, b, c, d;
} s_t;
unsigned char func1 (s_t *x, s_t *y, s_t *z)
{
unsigned char s = 0;
s += x-a;
s += y-a;
s += z-a;
s += x-b;
s += y-b;
s +=
2011/10/27 Georg-Johann Lay a...@gjlay.de:
This is support of a new option -maccumulate-args that implements
ACCUMULATE_OUTGOING_ARGS as proposed by Richard.
As 4.7 will be released very soon, I'd like to supply the documentation part
later and use the remaining stage I time for
2011/10/28 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
This patch adds named address space support to read data from flash (aka.
progmem) to target AVR.
The patch has two parts:
The first part is a repost of Ulrich's work from
2011/10/28 Georg-Johann Lay a...@gjlay.de:
This is minor tweak to support 8-bit parity.
Otherwise, the input operand of 8-bit values will be extended before parity
computation.
The final representation as libgcc call is not generated in split1 and no more
in expand. Notice that
- combine
2011/10/24 Georg-Johann Lay a...@gjlay.de:
This patch adds description of EIND usage.
This is needed because users are confused about it and some undocumented
caveats and even developers might get confused if there is no clear statement
about EIND usage and limitations.
The patch adds the
2011/10/24 Georg-Johann Lay a...@gjlay.de:
This adds missing documentation for OS_task and OS_main function attributes.
The subsection with progmem documentation is moved up for alphabetical order
(AVR typically appears between ARM and Blackfin).
Ok for 4.6?
Johann
PR target/49824
2011/10/24 Georg-Johann Lay a...@gjlay.de:
This is the same explanation as aleady approved for 4.6.
Ok for trunk?
Johann
PR target/50820
* doc/invoke.texi (AVR Options): New subsubsection to explain EIND
handling and indirect jump/calls on devices 128k.
Ok.
Denis.
2011/10/24 Georg-Johann Lay a...@gjlay.de:
This is the same documentation extension as proposed for 4.6.
Ok for trunk?
Johann
PR target/49824
* doc/extend.texi (Declaring Attributes of Functions):
Document OS_main and OS_task attributes.
(Specifying Attributes
2011/10/21 Georg-Johann Lay a...@gjlay.de:
This patch adds support to consistently use EIND.
The compiler never sets this SFR but uses it in table jumps and EIJMP/EICALL
instructions.
Custom startup code could set EIND to an other value than 0 and the compiler
should use EIND consistently
2011/10/21 Georg-Johann Lay a...@gjlay.de:
This fixes avr_legitimize_reload_address:
Since breaking out the code from LEGITIMIZE_RELOAD_ADDRESS, protiype of above
is
avr_legitimize_reload_address (rtx x, ...
but must be
avr_legitimize_reload_address (rtx *px, ...
because at one place
2011/10/19 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
Denis Chertykov schrieb:
What difference in size of avr-libc ?
I have no tool for smart size analysis, so here is just a diff:
After rebuilding avr-libc with respective compiler version, did
respectively:
$ find
2011/10/18 Georg-Johann Lay a...@gjlay.de:
This patch do some tweaks to addhi3 like adding QI scratch register.
The original *addhi3 insn is still there and located prior to new
addhi3_clobber insn because addhi3 is special to reload (thanks Danis for this
note) so that there is a version
2011/10/18 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/10/18 Georg-Johann Lay a...@gjlay.de:
This patch do some tweaks to addhi3 like adding QI scratch register.
The original *addhi3 insn is still there and located prior to new
addhi3_clobber insn because addhi3 is special
2011/10/18 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/10/18 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/10/18 Georg-Johann Lay a...@gjlay.de:
This patch do some tweaks to addhi3 like adding QI scratch register.
The original *addhi3 insn is still
Just a note.
Instead of `!reload_completed !reload_in_progress'you can use
`can_create_pseudo_p()' declared in rtl.h
Denis.
2011/10/17 Georg-Johann Lay a...@gjlay.de:
This is more code clean-up for insn attributes.
It removes mcu_have_movw, mcu_mega and defines enabled and isa
attributes instead.
The isa attribute which triggers enabled is a replacement for
AVR_HAVE_MOVW
assembler dialect. We don't actually
2011/10/14 Georg-Johann Lay a...@gjlay.de:
Weddington, Eric schrieb:
This is yet another attempt to fix PR46278 (fake X addressing).
After the previous clean-ups it is just a small change.
caller-saves.c tries to eliminate call-clobbered hard-regs allocated to
pseudos around function calls
2011/10/12 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/10/11 Georg-Johann Lay a...@gjlay.de:
This patch teaches avr-gcc to skip 2-word instructions like STS and LDS.
It's just about looking into an 2-word insn and check if it's a 2-word
instruction or not.
Passes without
2011/10/11 Georg-Johann Lay a...@gjlay.de:
This is bit of code cleanup and move macro code from avr.h to functions in
avr.c.
There's no change in functionality. Passed without regressions.
Ok?
Johann
* config/avr/avr-protos.h (avr_mode_code_base_reg_class): New
prototype.
2011/10/11 Georg-Johann Lay a...@gjlay.de:
This is a small addendum to PR50447.
It's a change to addsi3 insn; the actual insn sequence printed is still the
same (except for adding +/-1 to l-reg) but the effect on cc0 is worked out so
that it can be used to cancel out comparisons like in long
2011/10/10 Georg-Johann Lay a...@gjlay.de:
toplev.c complains about unwind tables currently require a frame pointer for
correctness.
This patchlet supplies a fix to avoid build warnings/test fails in that it
sets
flag_omit_frame_pointer to 0 if unwind needs FP.
toplev.c:process_options
2011/10/7 Georg-Johann Lay a...@gjlay.de:
Fix of wrong data_section_start for ATmega164A.
Ok?
Johann
PR target/50652
* config/avr/avr-mcus.def (AVR_MCU): Set .data_section_start of
atmega164a to 0x100.
Approved.
Denis.
2011/10/5 Georg-Johann Lay a...@gjlay.de:
Ping #1: http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01690.html
Georg-Johann Lay wrote:
This is just a code clean-up.
The bulky code from *addhi3_sp_R_pc2 and *addhi3_sp_R_pc3 is done by a small
C
function that does the same (except that it
2011/9/29 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
This is a tentative patch for better support of logging information for avr
BE
developers.
There are situations where it is more convenient to let the compiler produce
information than to debug into the compiler. One example
2011/9/29 Georg-Johann Lay a...@gjlay.de:
This is the second patch in this series.
Functions that formerly used fprintf/debug_rtx now use avr_edump and the use
sites of TARGET_ALL_DEBUG are mapped to respective flags of avr_log.
avr_log_vadump uses %b to print bool.
The patch adds outputs
2011/9/28 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
This is a tentative patch for better support of logging information for avr
BE
developers.
[...]
* config/avr/avr-protos.h (avr_edump, avr_fdump): New macros.
(avr__set_caller_e, avr__set_caller_f): New
2011/9/26 Georg-Johann Lay a...@gjlay.de:
This patch is housekeeping to clean up avr.c:adjust_insn_length i.e. replace
digging in RTXes by using insn attribute adjust_len.
There's nothing special about it, it's just mechanical change.
As alternative yes is no more needed, I removed it and
2011/9/26 Georg-Johann Lay a...@gjlay.de:
This patchlet represents the impact of insn ashrqi3 on CC by means of
attribute
cc instead of hard-coding it in notice_update_cc.
Testsuite passes fine. Moreover, tested against code like
char c;
void func_1 (char a)
{
a = a 7;
if (a)
2011/9/25 Georg-Johann Lay a...@gjlay.de:
This is just a code clean-up that deals with loading 16-bit constants
(HImode).
o Length adjustment is triggered by insn attribute adjust_len
o To print the constant output_movhi can use output_reload_inhi
o output_reload_inhi can use the same
2011/9/23 Georg-Johann Lay a...@gjlay.de:
This is the compare part to fix PR50447.
Just like the preceding changes to fix PR50447 it's a micro-optimization to
smarter print-out of instructions.
The patch covers comparisons against HI and SI integers.
The byte-wide comparison allows reusing
2011/9/21 Georg-Johann Lay a...@gjlay.de:
This patch improves IOR, XOR, AND for HI and SI.
There is room for improvement in the current implementation:
- better analysis if a scratch is actually needed
- add clobber operands to some insns
- use 8-bit scratch instead of reload the constant
2011/9/22 Georg-Johann Lay a...@gjlay.de:
This adds rotate left/right by 1 for HI and SI and rotates by QI.
It's all straight forward. The test case in the PR leads to generation of the
new rotate patterns.
Passed without regressions.
Ok?
Ok.
Denis.
2011/9/22 Georg-Johann Lay a...@gjlay.de:
This patch adds the PLUS part to fix the PR.
addsi3 has a 8-bit scratch register now so that constants that are not covered
by the constraints won't force a reload of the constant.
The output routine tries adding the constant and subtracting the
2011/9/16 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
Denis Chertykov schrieb:
2011/9/12 Georg-Johann Lay a...@gjlay.de:
This patch introduces patterns for multiply-add and multiply-sub.
On the enhanced core, these operations can be performed with the product
in R0
2011/9/12 Georg-Johann Lay a...@gjlay.de:
This patch introduces patterns for multiply-add and multiply-sub.
On the enhanced core, these operations can be performed with the product in
R0;
there is no need to MOVW it out of that register. The code is smaller and
faster and has lower
2011/9/8 Georg-Johann Lay a...@gjlay.de:
This patch adds support for named progmem sections.
The problem with the current implementation is that all progmem stuff is put
into .progmem.data and thus no -gc-sections will have effect or constant
merging cannot merge constants/strings in progmem.
2011/8/26 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
progmem_section is a section to put jump tables in.
This patch puts jump tables in individual sections if
-ffunction-section is on and does some more cleanup around
that, i.e. implement TARGET_ASM_FUNCTION_RODATA_SECTION hook.
2011/8/11 Georg-Johann Lay a...@gjlay.de:
This is an optimization in machine dependent reorg to
remove redundant comparisons like in
cc0 = compare (Reg, Num)
if (cc0 == 0)
goto L1
cc0 = compare (Reg, Num)
if (cc0 0)
goto L2
The second comparison is redundant an can be
2011/8/10 Georg-Johann Lay a...@gjlay.de:
This patch is still pending review:
http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02376.html
Georg-Johann Lay a écrit:
[...]
So here is a cleaned up version that maps to QI shifts.
Tested without regressions.
Ok?
Ok.
Denis.
2011/8/4 Xinliang David Li davi...@google.com:
+Mark who has done size optimization tuning with FDO.
On Thu, Aug 4, 2011 at 7:05 AM, Mike Hommey mhom...@mozilla.com wrote:
Hi,
We (Mozilla) are trying to get the best of the ARM toolchain for our
Android build. I recently built an Android
2011/8/4 Richard Henderson r...@redhat.com:
When a frame pointer is in use, we can optimize popping all
queued parameters via a simple move from the frame pointer
instead of an addition to the stack pointer.
The new sequence is 4 insns, the old sequence was 9 insns.
Committed.
It seems
2011/8/4 Richard Henderson r...@redhat.com:
On 08/03/2011 11:09 PM, Denis Chertykov wrote:
2011/8/4 Richard Henderson r...@redhat.com:
When a frame pointer is in use, we can optimize popping all
queued parameters via a simple move from the frame pointer
instead of an addition to the stack
2011/8/4 Richard Henderson r...@redhat.com:
On 08/04/2011 09:04 AM, Denis Chertykov wrote:
Thank you for explanation.
I have a very clean understanding of whole picture.
May be better to use define_peephole2 with 3 insns as input and 1 as
output for easy understanding.
*shrug* Maybe
2011/8/2 Georg-Johann Lay a...@gjlay.de:
This patch fixes RCALL/RJMP instructions to other modules by replacing them
with XCALL resp. XJMP.
Moreover, now each function (except _cleanup) is enclosed in DEFUN/ENDF pairs
so that size information is available for each function.
Ok?
Approved.
2011/8/1 Richard Henderson r...@redhat.com:
On 08/01/2011 11:42 AM, Georg-Johann Lay wrote:
Is there a specific reason not to define
ACCUMULATE_OUTGOING_ARGS on AVR?
I havn't define ACCUMULATE_OUTGOING_ARGS because AVR have a very small
displacement for memory addressing (63 bytes) and I think
2011/7/28 Georg-Johann Lay a...@gjlay.de:
Richard Henderson wrote:
On 07/27/2011 06:21 AM, Georg-Johann Lay wrote:
+(define_insn_and_split *mulsi3
+ [(set (match_operand:SI 0 pseudo_register_operand
=r)
+ (mult:SI (match_operand:SI 1 pseudo_register_operand
2011/7/11 Georg-Johann Lay a...@gjlay.de:
char 7 is compiled to
LSL reg
SBC reg,reg
which leaves cc0 in a mess because Z-flag is not set by SBC, it's
propagated from LSL.
Patch as obvious, new testcase pass and contains *cmpqi.
Ok to commit?
Please, commit.
Denis.
2011/7/8 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
2011/7/7 Georg-Johann Lay:
Hi Denis.
I think that it's a good question to discuss inside gcc mailing list.
May be somebody more qualified person give a better suggestion than me.
...bringing this over to gcc mailing list
I
2011/7/8 Georg-Johann Lay a...@gjlay.de:
CCed Eric and Bernd.
Denis Chertykov wrote:
Did you decide about the fix for PR46779?
http://gcc.gnu.org/ml/gcc-patches/2011-06/msg00810.html
Is it ok to commit?
I forgot about testsuite regressions for this patch.
Denis.
There were no new
2011/7/6 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
I have asked about example of *d instead of !d.
Just svn GCC with *d vs svn GCC !d.
Denis.
Is the patch ok with the original !d instead of *d ?
Ok.
Denis.
2011/7/7 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
2011/6/27 Georg-Johann Lay:
Denis Chertykov wrote:
The main problem for me is that the new addressing mode produce a
worse code in many tests.
You have an example source?
In attachment.
Denis.
Hi Denis.
I had a look
2011/7/6 Georg-Johann Lay a...@gjlay.de:
For loading a 32-bit constant in a register, there is room for
improvement:
* SF can be handled the same way as SI and therefore the patch
adds a peep2 to produce a *reload_insf analogon to *reload_insi.
* If the destination register overlaps
2011/7/6 Rainer Orth r...@cebitec.uni-bielefeld.de:
Georg-Johann Lay a...@gjlay.de writes:
Here is a revised patch.
Ok?
I'd like to defer to the target maintainers here: they know their port,
while I don't.
Approved.
Denis.
2011/7/6 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
2011/7/6 Georg-Johann Lay a...@gjlay.de:
For loading a 32-bit constant in a register, there is room for
improvement:
* SF can be handled the same way as SI and therefore the patch
adds a peep2 to produce a *reload_insf
2011/7/4 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
Some runtime and checks for error/warning for C/C++.
Note that some tests fail because of pending
http://gcc.gnu.org/ml/gcc-patches/2011-06/msg02318.html
Johann
testsuite/
* gcc.target/avr/avr.exp: Run over cpp
2011/7/4 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
http://gcc.gnu.org/ml/gcc-patches/2011-06/msg02318.html
avr_insert_attributes uses TREE_READONLY on get readonlyness of node.
That does not work for C++ arrays: it gives false error
variable must be const in order to be put
2011/7/4 Georg-Johann Lay a...@gjlay.de:
The current implementation of __builtin_avr_fmul/fmuls/fmulsu has a
gap if no hardware multiplier is available.
This patch closes that gap by providing libgcc implementations named
__fmul, __fmuls resp. __fmulsu.
The implementations yield the same
2011/6/30 Georg-Johann Lay a...@gjlay.de:
The new count leading signs is not implemented for HI:
builtin-bitops-1.c:(.text+0xd1e): undefined reference to `__clrsbhi2'
FAIL: gcc.c-torture/execute/builtin-bitops-1.c compilation, -O0
Extended clz/ctz support in longlong.h
With the patch
2011/6/28 Georg-Johann Lay a...@gjlay.de:
This implements mulhisi3 and umulhisi3 widening multiplication
insns if AVR_HAVE_MUL.
I chose the interface as r25:r22 = r19:r18 * r21:r20 which is ok
because only avr-gcc BE will call respective __* support functions in
libgcc.
Tested without
2011/6/27 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
2011/6/26 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/6/24 Richard Henderson r...@redhat.com:
On 06/23/2011 01:15 PM, Denis Chertykov wrote:
text data bss dec hex filename
10032 25
2011/6/27 Georg-Johann Lay a...@gjlay.de:
This patch removes ELF dependencies from avr.h and redundancies from
avr.h and avr.c
The AVR BE defines many things that are readily available in elfos.h.
ELF is the only target supported by avr-gcc.
The patch includes elfos.h in config.gcc for all
2011/6/27 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov wrote:
2011/6/27 Georg-Johann Lay a...@gjlay.de:
This patch removes ELF dependencies from avr.h and redundancies from
avr.h and avr.c
The AVR BE defines many things that are readily available in elfos.h.
ELF is the only target
2011/6/27 Georg-Johann Lay a...@gjlay.de:
or
[ ] Remove the undefs so that we have .ident.
There's nothing terrific about it, it just adds
some text to .comment section. I guess it's missing
because noone ever added it.
This one.
Denis.
2011/6/24 Richard Henderson r...@redhat.com:
On 06/23/2011 01:15 PM, Denis Chertykov wrote:
text data bss dec hex filename
10032 25 0 10057 2749 bld-avr-orig/gcc/z.o
5816 25 0 5841 16d1 bld-avr-new/gcc/z.o
Richard, can you send me this z.c
2011/6/26 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/6/24 Richard Henderson r...@redhat.com:
On 06/23/2011 01:15 PM, Denis Chertykov wrote:
text data bss dec hex filename
10032 25 0 10057 2749 bld-avr-orig/gcc/z.o
5816 25 0
2011/6/16 Richard Henderson r...@redhat.com:
On 06/15/2011 02:58 PM, Richard Henderson wrote:
Indeed, I can work around this particular crash by either
hacking Z to be call-saved, or hacking the frame pointer to
not be required. The former of course changes the abi, and
the second produces
2011/6/20 Georg-Johann Lay a...@gjlay.de:
This is an optimization patch that implements extzv for 1-bit extracts.
+(define_insn_and_split *extzv
+ [(set (match_operand:QI 0 register_operand
=*d,*d,*d,r)
+(zero_extract:QI (match_operand:QI 1 register_operand
2011/6/21 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
I'm vote for 'C'.
Denis.
So it's C :-)
Johann
PR target/33049
* config/avr/avr.md (extzv): New expander.
(*extzv): New insn.
(*extzv.qihi1, *extzv.qihi2): New insn-and-split
2011/6/20 Weddington, Eric eric.wedding...@atmel.com:
-Original Message-
From: Joseph Myers [mailto:jos...@codesourcery.com]
Sent: Monday, June 20, 2011 9:47 AM
To: gcc-patches@gcc.gnu.org
Cc: cherty...@gmail.com; ae...@post.ru; Weddington, Eric
Subject: Remove TARGET_HELP hook
2011/6/16 Richard Henderson r...@redhat.com:
On 06/15/2011 02:58 PM, Richard Henderson wrote:
Indeed, I can work around this particular crash by either
hacking Z to be call-saved, or hacking the frame pointer to
not be required. The former of course changes the abi, and
the second produces
2011/6/16 Denis Chertykov cherty...@gmail.com:
2011/6/16 Richard Henderson r...@redhat.com:
On 06/15/2011 02:58 PM, Richard Henderson wrote:
Indeed, I can work around this particular crash by either
hacking Z to be call-saved, or hacking the frame pointer to
not be required. The former
2011/6/16 Richard Henderson r...@redhat.com:
On 06/16/2011 04:34 AM, Denis Chertykov wrote:
@rth (while you are diving into AVR microworld ;-)
May be you can give a suggestion to change the AVR abi.
I have tuned the abi for code size almost 13 years ago.
The register pressure to r18-r31
2011/6/15 Georg-Johann Lay a...@gjlay.de:
This is a patch that implements some libgcc functions in assembler.
The functions are used only very seldom but if, they lead to an
unpleasant waste of resource. For example, some SF functions
eventually lead to __clz_tab being dragged in (PR29524).
2011/6/13 Georg-Johann Lay a...@gjlay.de:
So you think is is pointless/discouraged to give a more realistic
description of AVR addressing be means of MODE_CODE_BASE_REG_CLASS (instead
of BASE_REG_CLASS) resp. REGNO_MODE_CODE_OK_FOR_BASE_P?
Look carefully at `out_movqi_r_mr'.
There are even
2011/6/10 Georg-Johann Lay a...@gjlay.de:
Then I have a question on spill failures:
There is PR46278, an optimization flaw that goes as follows:
The avr BE defines fake addressing mode X+const that has to be written
down in asm as
X += const
a = *X
X -= const
The comment says that
2011/6/9 Georg-Johann Lay a...@gjlay.de:
This is a tentative patch to fix PR46779 and hopefully also related
issues like PR45291.
- /* Disallow QImode in stack pointer regs. */
- if ((regno == REG_SP || regno == (REG_SP + 1)) mode == QImode)
+ /* Don't allocate data to non-GENERAL_REGS
2011/6/9 Georg-Johann Lay a...@gjlay.de:
This patch fixes a thinko in avr_function_arg_advance.
Without the patch, following code will report false positive for
passing args in fixed regs like:
error: Register r0 is needed to pass a parameter but is fixed
error: Register r1 is needed to
2011/6/9 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/6/9 Georg-Johann Lay a...@gjlay.de:
This is a tentative patch to fix PR46779 and hopefully also related
issues like PR45291.
- /* Disallow QImode in stack pointer regs. */
- if ((regno == REG_SP || regno == (REG_SP
2011/5/28 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay wrote:
Georg-Johann Lay wrote:
Richard Henderson wrote:
Why are you adding optimize to all these insns? None of them will
be matched unless combine is run, which implies optimization.
Here is a patch without optimize in the
-patches@gcc.gnu.org; Denis Chertykov; Anatoly Sokolov;
Weddington,
Eric
Subject: Re: [Patch,AVR]: Fix PR45263
This is a better fix that does not need push/pop and does not increase
numer of instructions.
r16 takes the role of r20, and the value formerly in r16,
i.e. hh8(__dtors_end resp
2011/5/16 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/5/6 Georg-Johann Lay a...@gjlay.de:
Nathan Froyd schrieb:
On Mon, May 02, 2011 at 05:23:48PM +0200, Georg-Johann Lay wrote:
PR45099 is an extension that gives an error when a fixed register is
needed to pass a parameter
2011/5/11 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/5/2 Georg-Johann Lay a...@gjlay.de:
This is a fix for an optimization flaw when a long value is composed
from byte values.
For -fsplit-wide-types (which is still default for avr) the code is
worse than with -fno-split
201 - 300 of 352 matches
Mail list logo
