2011/5/9 Georg-Johann Lay a...@gjlay.de:
Fixed the build warnings mentioned in PR48896.
Johann
--
2011-05-09 Georg-Johann Lay a...@gjlay.de
PR target/48896
* config/avr/avr.c (avr_ret_register): Return unsigned int
instead of int.
(avr_function_value):
2011/5/8 Eric Botcazou ebotca...@adacore.com:
Have you run the regression test suite for the AVR for this patch?
The compiler doesn't even build without the print_operand_address hunk...
Which compiler ?
Denis.
2011/5/6 Georg-Johann Lay a...@gjlay.de:
Nathan Froyd schrieb:
On Mon, May 02, 2011 at 05:23:48PM +0200, Georg-Johann Lay wrote:
PR45099 is an extension that gives an error when a fixed register is
needed to pass a parameter to a function.
Because the program will show malfunction when such
2011/5/2 Georg-Johann Lay a...@gjlay.de:
This is a fix for an optimization flaw when a long value is composed
from byte values.
For -fsplit-wide-types (which is still default for avr) the code is
worse than with -fno-split-wide-types. The code for the test case is
better in either
2011/4/20 Nathan Froyd froy...@codesourcery.com:
As $SUBJECT suggests. Tested with cross to avr-elf. OK to commit?
-Nathan
* config/avr/avr.c (avr_init_builtins): Call
build_function_type_list instead of build_function_type.
Please, commit.
Denis.
2011/4/20 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/4/17 Denis Chertykov cherty...@gmail.com:
2011/4/15 Georg-Johann Lay a...@gjlay.de:
Finally, I exposed alternative #3 of the insns to the register
allocator, because it is not possible to distinguish between
overlapping
2011/4/19 Georg-Johann Lay a...@gjlay.de:
How can add, sub etc. be split? This would need an explicit
representation of carry.
Yes.
Look at http://gcc.gnu.org/ml/gcc/2005-03/msg00871.html
Denis.
2011/4/19 Anatoly Sokolov ae...@post.ru:
Please use
ASM_OUTPUT_ALIGNED_DECL_COMMON and ASM_OUTPUT_ALIGNED_DECL_LOCAL macros
here.
Confused. These macros are used.
Johann
Sorry... Im look on function name not on macro definition.
I agree with the patch. Please wait day or two if
2011/4/18 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/4/17 Denis Chertykov cherty...@gmail.com:
2011/4/15 Georg-Johann Lay a...@gjlay.de:
Finally, I exposed alternative #3 of the insns to the register
allocator, because it is not possible to distinguish between
overlapping
2011/4/18 Denis Chertykov cherty...@gmail.com:
2011/4/18 Georg-Johann Lay a...@gjlay.de:
Few years ago I have played with early splitting of anything possible
(move,add,sub,and,...). The results was very bad.
It's happened because flow of splitted insns (8bits insns) becomes
unreadable
2011/4/17 Denis Chertykov cherty...@gmail.com:
2011/4/15 Georg-Johann Lay a...@gjlay.de:
Finally, I exposed alternative #3 of the insns to the register
allocator, because it is not possible to distinguish between
overlapping or non-overlapping regs, and #3 does not need a scratch.
Ran C
2011/4/14 Georg-Johann Lay a...@gjlay.de:
These test cases
gcc.target/avr/trivial.c
gcc.target/avr/torture/trivial.c
put non-const variables in read-only section .progmem.data which
causes an error. The patch rewrites the files to make respective
variables real-only (and besides that fixes
2011/4/14 Georg-Johann Lay a...@gjlay.de:
This tests are intended to reveal the respective PRs because the test
case is more stable under slight variations in code (both of
application or compiler).
This test case migh also be helpful for older versions of avr-gcc, in
particular if PR41894
2011/4/14 Georg-Johann Lay a...@gjlay.de:
This patchlet adds -finline-limit=0 to dg-options in
testsuite/gcc.target/avr/torture/pr41885.c
because otherwise optimizers will fold all tests and actually no test
function is called when optimization is on. The test case still passes
all tests.
2011/4/11 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
Tested patch v2 from 2010-04-02 now for atmega2560 on avrtest
simulator. In main, var1 and var2 are initialized as expected and
anObject.getVal() is 30.
Without patch the program hangs.
2011-04-11 Georg-Johann Lay
2011/4/11 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
This patch adds builtin support for some RTL builtins to avr backend.
One builtin implements loop for delay of specific number of ticks
(under the assumption IRQs are off), others simply map to machine
instructions like SEI,
2011/4/11 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
This is fix of PR44643 which is triggered by
http://savannah.nongnu.org/bugs/?32988
i.e. include/avr/pgmspace.h:PSTR has to be changed, too: PSTR has to
generate __c as static const char[], not as static char[]. Note
that
2011/4/4 Georg-Johann Lay a...@gjlay.de:
avr-gcc bar.c -da -S -Os -dp
== configuration
Target: avr
Configured with: ../../gcc.gnu.org/trunk/configure --target=avr
--prefix=some-prefix --enable-languages=c,c++ --disable-libssp
--disable-libada --disable-nls --disable-shared
Thread model:
2011/3/21 Richard Henderson r...@redhat.com:
This is a slightly tidied patch from sometime last month, which was
buried in a thread about dwarf2 unwind info for gas. This fixes
some totally incorrect unwind markings in the avr backend, and adds
support in the dwarf2 middle-end for handling
2011/3/20 Georg-Johann Lay a...@gjlay.de:
The AVR controller basically has two kinds of hard registers:
* LD_REGS (constraint d) that can move immediates
* NO_LD_REGS (constraint l) that cannot move immediates
movsi insn of avr backend does not supply an l,i constraint alternative,
so that
2011/3/21 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/3/20 Georg-Johann Lay a...@gjlay.de:
The AVR controller basically has two kinds of hard registers:
* LD_REGS (constraint d) that can move immediates
* NO_LD_REGS (constraint l) that cannot move immediates
movsi insn
2011/3/18 Georg-Johann Lay a...@gjlay.de:
Is it tested for regressions ?
Denis.
I ran tests against svn 170942 (latest 4.7.0 snapshot). Besides
timestamps, the diff looks like this:
1435a1436,1437
XPASS: gcc.dg/sibcall-3.c execution test
XPASS: gcc.dg/sibcall-4.c execution test
2011/2/28 Georg-Johann Lay a...@gjlay.de:
Denis Chertykov schrieb:
2011/2/26 Georg-Johann Lay a...@gjlay.de:
Ok, this is the patch I meant:
http://gcc.gnu.org/viewcvs?view=revisionrevision=86842
it allows just Pmode in r29:r28 because of some spill failures in PR15417
and PR12017
2011/2/26 Georg-Johann Lay a...@gjlay.de:
Georg-Johann Lay schrieb:
Denis Chertykov schrieb:
2011/2/26 Georg Johann Lay a...@gjlay.de
Eric Botcazou schrieb:
What does word mean here? Is it a 32-bit entity or is it according
to
word_mode which is QImode for avr?
The latter
2011/2/26 Georg Johann Lay a...@gjlay.de
Eric Botcazou schrieb:
What does word mean here? Is it a 32-bit entity or is it according to
word_mode which is QImode for avr?
The latter, it is machine-dependent.
So the same should be true for QI-subregs of scalar modes if
UNITS_PER_WORT = 1.
2011/2/7 Joel Sherrill joel.sherr...@oarcorp.com:
There are two targets which cannot build C -- avr and lm32:
+ avr - http://gcc.gnu.org/PR47534
I have committed the fix r169896
Please somebody close the bug.
I can't login to bugzilla. (Probably I forgot my login and password)
Denis.
2010/7/31 redriver jiang jiang.redri...@gmail.com:
Hi,
Seems there are still some exceptions.
During my testing, the compiler complains:
./os_core.c: In function 'OS_EventTaskWait':
./os_core.c:747: error: unable to find a register to spill in class
'POINTER_REGS'
./os_core.c:747: error:
2010/8/1 redriver jiang jiang.redri...@gmail.com:
Hi Denis,
I read the out_movqi_r_mr code of the AVR port. I see that following
exception are
handled:
1. REG_X+offset, which is not supported by AVR.
2. REGY+offset, with offset larger than 63, which is not supported by AVR.
Seems reload
2009/12/31 Weddington, Eric eric.wedding...@atmel.com:
-Original Message-
From: Andrew Hutchinson [mailto:andrewhutchin...@cox.net]
Sent: Wednesday, December 30, 2009 4:34 PM
To: Richard Guenther
Cc: Dave Korn; Rafael Espindola; GCC Development; Weddington,
Eric; Denis Chertykov
2009/6/16 Ian Lance Taylor i...@google.com:
Tomasz Francuz tfran...@mp.pl writes:
I would like to change gcc so AVR C++ port will use FLASH memory
instead of SRAM to store virtual function pointers. Does anyone try to
do it? I have no experience as gcc developer, so can you head me to
2009/3/13 Paolo Bonzini bonz...@gnu.org:
These are all the !SHIFT_COUNT_TRUNCATED targets.
For 4.5 I would like to improve our RTL canonicalization so that no
out-of-range shifts are ever in the RTL representation.
This in turn means that the description given by SHIFT_COUNT_TRUNCATED
must
2009/2/17 Ian Lance Taylor i...@google.com:
The problem with reload is that it interferes with register allocation.
Even if gcc had a perfect register allocator, we would still generate
suboptimal code because reload would mess up the allocation. The key to
solving that problem is that we
2009/1/9 Sean D'Epagnier geckosena...@gmail.com:
Hi,
I am currently working on adding native fixed-point support to the avr
backend. A lot of stuff is working, but there are a few things left,
one of them is conversions from fixed point to floating point.
I have conversions between all
2008/12/16 Georg-Johann Lay georgjoh...@web.de:
Hi,
./gcc/config/avr/avr.md
defines andsi3 as follows:
[...]
For alternative 1 d,0,i the effect on cc_status is described as set_n.
However, if the high byte of [2] is 0xff, then the PSW (i.e. SREG.N)
does not contain the MSB of the result.
2008/5/29 Jeff Law [EMAIL PROTECTED]:
Richard Sandiford wrote:
Andy H [EMAIL PROTECTED] writes:
If L_R_A does nothing with it,
the normal reload handling will first try:
(const:HI (plus:HI (symbol_ref:HI (chk_fail_buf) (const_int 2
This worked just as your described after I added
2008/5/29 [EMAIL PROTECTED]:
Again thank you and Denis for your comment.
Here is what I deduce from code and Denis comments - I am sure he (and
others) will correct me if wrong :-)
The main issue is that we have one pointer register that cannot take offset
and two base pointers with
2008/5/20 Ian Lance Taylor [EMAIL PROTECTED]:
Mohamed Shafi [EMAIL PROTECTED] writes:
For the 16 bit target that i am currently porting can have only
positive offsets less than 0x100. (unsigned 8 bit) for offset
addressing mode.
I would expect reload to be able to handle this kind of thing
Hi All.
Right now the AVR port have two maintainers Denis Chertykov
and Marek Michalkiewicz.
The AVR community ask me to add Anatoly Sokolov [EMAIL PROTECTED] as avr
maintainer and Marek asked to remove him.
How to do that ?
Denis.
Hi Ulrich.
Few months ago I has analyzed PR19636 (avr specific bug) and found
that it's a reload related problem. I has started the thread
http://gcc.gnu.org/ml/gcc/2006-02/msg00213.html but nobody commented the
problem.
Can you comment the problem as reload maintainer ?
Denis.
Denis Chertykov [EMAIL PROTECTED] writes:
Ian Lance Taylor ian@airs.com writes:
Denis Chertykov [EMAIL PROTECTED] writes:
I think that better to call update_eliminables() somewhere after
setup_save_areas()
Exactly. We do that. About 15 lines after the lines you quoted
Ian Lance Taylor ian@airs.com writes:
[...]
I think that better to call update_eliminables() somewhere after
setup_save_areas()
Exactly. We do that. About 15 lines after the lines you quoted
above.
What am I missing?
I'm (exactly AVR port) need in call to update_eliminables()
Hi All.
While I have debugging AVR target bug I found that something wrong in
port code or in reload.
Is it right to use of get_frame_size() inside CAN_ELIMINATE macro valid ?
If yes then reload have a bug.
If no then AVR and probably MIPS ports have invalid definitions of
CAN_ELIMINATE.
Denis.
Eric Christopher [EMAIL PROTECTED] writes:
On Feb 13, 2006, at 7:43 AM, Denis Chertykov wrote:
Hi All.
While I have debugging AVR target bug I found that something wrong in
port code or in reload.
Is it right to use of get_frame_size() inside CAN_ELIMINATE macro
valid ?
If yes
Anatoly Sokolov [EMAIL PROTECTED] writes:
Hello.
I am the member of the project 'avr-libc' (AVR C Runtime Library). As
a result of this work there were patches with additions of support of
new Atmel devices in gcc the toolchain. I have a desire to add them in
official GCC sources,
Ian Lance Taylor ian@airs.com writes:
The current reload pass includes general heuristics to handle
reloading memory addresses. This code knows things like if stack
pointer plus displacement is not a valid memory address, try loading
the displacement into a register. Many targets currently
Joel Sherrill [EMAIL PROTECTED] [EMAIL PROTECTED] writes:
[...]
../../../../../../gcc-head-test/newlib/libc/misc/init.c
../../../../../../gcc-head-test/newlib/libc/misc/init.c: In function
'__libc_fini_array':
../../../../../../gcc-head-test/newlib/libc/misc/init.c:59: error:
unable to
Richard Henderson [EMAIL PROTECTED] writes:
On Sun, Mar 20, 2005 at 01:59:44PM +0300, Denis Chertykov wrote:
The reload will generate addhi3 and reload will have a problem with
two modified regs (ZCMP_FLAGS, CARRY_FLAGS) which will be a bad
surprise for reload. :( As I remember
Paul Schlie [EMAIL PROTECTED] writes:
From: Denis Chertykov [EMAIL PROTECTED]
- possibly something like: ?
(define_insn *addhi3
[(set (match_operand:HI 0 ...)
(plus:HI (match_operand:HI 1 ...)
(match_operand:HI 2 ...)))
(set (reg ZCMP_FLAGS
Paul Schlie [EMAIL PROTECTED] writes:
[...]
I think that better to support
cmpHI, cbranch - cmpQI1_set_CC, cmpQI2_use_CC, cbranch. because
AVR is a microcontroller and code size more important than code speed.
- I fully agree that code-size tends to be most important, which is why
Paul Schlie [EMAIL PROTECTED] writes:
From: Denis Chertykov [EMAIL PROTECTED]
Paul Schlie [EMAIL PROTECTED] writes:
Denis wrote:
I have converted the AVR port from CC0 to CCmode.
But may be I have converted the port in wrong way.
(It's because I was interested in *this* way.)
I
Hi All!
I have converted the AVR port from CC0 to CCmode.
But may be I have converted the port in wrong way.
(It's because I was interested in *this* way.)
I have used CCmode register and havn't added the
'(clobber (reg:QI CC_REGNUM))' to any insn that really clobber the
CC_REGNUM just because
Paul Schlie [EMAIL PROTECTED] writes:
Denis wrote:
I have converted the AVR port from CC0 to CCmode.
But may be I have converted the port in wrong way.
(It's because I was interested in *this* way.)
I have used CCmode register and havn't added the
'(clobber (reg:QI CC_REGNUM))' to
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