It appears that this is not an issue that this version of GCC is
architected to be able to solve.
The first 64-bit PC processor, the AMD opteron series, was launched on
April 22, 2003.
GCC 3.2.3 was released on April 25, 2003.
"*Opteron* is AMD
"A 24-bit or 31-bit virtual address is expanded to 64 bits by appending 40
or 33 zeros, respectively, on the left before it is translated by means of
the DAT process, and a 24-bit or 31-bit real address is similarly expanded
to 64 bits before it is transformed by prefixing. A 24-bit or 31-bit
"Simply switching off optimization made the negative
indexes go away, allowing more than 2 GiB to be
addressed in standard z/Arch, with "-m31".
Prove it on real hardware, not hercules. Hercules doesnt count.
Joe
On Wed, Sep 29, 2021 at 7:09 PM Paul Edwards via Gcc
wrote:
> We have fait
It is unclear how this would even work.
For instance, the LA instruction clears the top bit.
Also, instructions like LPR, LNR, BXLE, BXH all treat the value in the
register as signed, so the top bit is not available.
Joe