Hi Richard,
Thanks for the review.
On Tue, 5 Nov 2019 at 23:08, Richard Biener wrote:
>
> On Tue, Nov 5, 2019 at 12:17 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi,
> > Thanks for the review.
> >
> > On Tue, 5 Nov 2019 at 03:57, H.J. Lu wrote:
> >
Hi,
Thanks for the review.
On Tue, 5 Nov 2019 at 03:57, H.J. Lu wrote:
>
> On Sun, Nov 3, 2019 at 6:45 PM Kugan Vivekanandarajah
> wrote:
> >
> > Thanks for the reviews.
> >
> >
> > On Sat, 2 Nov 2019 at 02:49, H.J. Lu wrote:
> > >
> > &g
Thanks for the reviews.
On Sat, 2 Nov 2019 at 02:49, H.J. Lu wrote:
>
> On Thu, Oct 31, 2019 at 6:33 PM Kugan Vivekanandarajah
> wrote:
> >
> > On Wed, 30 Oct 2019 at 03:11, H.J. Lu wrote:
> > >
> > > On Sun, Oct 27, 2019 at 6:33 PM Kugan Vivekanand
On Wed, 30 Oct 2019 at 03:11, H.J. Lu wrote:
>
> On Sun, Oct 27, 2019 at 6:33 PM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard,
> >
> > Thanks for the review.
> >
> > On Wed, 23 Oct 2019 at 23:07, Richard Biener
> > wrote:
Hi Bernhard,
Thanks for the review.
On Tue, 29 Oct 2019 at 08:52, Bernhard Reutner-Fischer
wrote:
>
> On Mon, 28 Oct 2019 11:53:06 +1100
> Kugan Vivekanandarajah wrote:
>
> > On Wed, 23 Oct 2019 at 23:07, Richard Biener
> > wrote:
>
> > > Did you try this
Hi Richard,
Thanks for the pointers.
On Fri, 11 Oct 2019 at 22:33, Richard Biener wrote:
>
> On Fri, Oct 11, 2019 at 6:15 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard,
> > Thanks for the review.
> >
> > On Wed, 2 Oct 2019 at 20:41, Richard Bien
Hi Richard,
Thanks for the review.
On Wed, 2 Oct 2019 at 20:41, Richard Biener wrote:
>
> On Wed, Oct 2, 2019 at 10:39 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi,
> >
> > As mentioned in the PR, attached patch adds COLLECT_AS_OPTIONS for
> > passi
As reported in Linaro bug report
(https://bugs.linaro.org/show_bug.cgi?id=4636 ; there is no
reproducible testcase provided), for some applications, we see
(insn 126 125 127 9 (set (reg:DF 189)
(fma:DF (reg:DF 126 [ _74 ])
(reg:DF 190)
(reg:DF 191))) "ops.c":30 -1
Hi,
As mentioned in the PR, attached patch adds COLLECT_AS_OPTIONS for
passing assembler options specified with -Wa, to the link-time driver.
The proposed solution only works for uniform -Wa options across all
TUs. As mentioned by Richard Biener, supporting non-uniform -Wa flags
would require
precision, the patch would be correct and used to
eliminate redundant zero/sign extensions.
Please let me know if my explanation is not clear and I will show it
with more examples.
Thanks,
Kugan
On Fri, 21 Jun 2019 at 23:27, Andrew MacLeod wrote:
>
> On 6/19/19 11:04 PM, Kugan Vivekanandarajah
behalf as rev 205891.
> >
> > On 11 December 2013 13:27, Marcus Shawcroft
> > wrote:
> > > On 10/12/13 20:23, Kugan wrote:
> > >
> > >> gcc/
> > >>
> > >> +2013-12-11 Kugan Vivekanandarajah
> > >> + * con
Hi Richard,
Thanks for your comments.
On Thu, 16 May 2019 at 18:13, Richard Sandiford
wrote:
>
> kugan.vivekanandara...@linaro.org writes:
> > From: Kugan Vivekanandarajah
> >
> > Inorder to fix this PR.
> > * We need to change the whilelo pattern in
Hi Andrew,
Thanks for working on this.
Enable elimination of zext/sext with VRP patch had to be reverted in
(https://gcc.gnu.org/ml/gcc-patches/2014-09/msg00672.html) due to the
need for value ranges in PROMOTED_MODE precision for at least 1 test
case for alpha.
Playing with ranger suggest that
believe this is the only
way we can have GET_MODE_UNIT_SIZE of 0. Otherwise, we can check for
GET_MODE_UNIT_SIZE of zero.
Bootstrapped and regression tested attached patch on x86_64-linux-gnu
with no new regressions. Is this OK for trunk?
Thanks,
Kugan
gcc/ChangeLog:
2019-06-17 Kugan Vivekanandarajah
Hi Kyrill,
Thanks for the comments. Committed as you suggested.
Thanks,
Kugan
On Wed, 12 Jun 2019 at 18:07, Kyrill Tkachov
wrote:
>
> Hi Kugan,
>
> On 6/12/19 4:59 AM, Kugan Vivekanandarajah wrote:
> > AArch64 comment for ADDSUB iterator is a typo or copy-and-paste error.
AArch64 comment for ADDSUB iterator is a typo or copy-and-paste error.
Attached patch fixes this. I believe this falls under obvious
category. I will commit it after 48hrs unless comments should be
better worded.
Thanks,
Kugan
gcc/ChangeLog:
2019-06-12 Kugan Vivekanandarajah
* config
Hi Richard,
On Thu, 6 Jun 2019 at 22:07, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > Hi Richard,
> >
> > On Thu, 6 Jun 2019 at 19:35, Richard Sandiford
> > wrote:
> >>
> >> Kugan Vivekanandarajah writes:
> >> &g
Hi Richard,
On Thu, 6 Jun 2019 at 19:35, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > Hi Richard,
> >
> > Thanks for the review. Attached is the latest patch.
> >
> > For testcase like cond_arith_1.c, with the patch, gcc ICE in fwprop. I
2019 at 19:08, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c
> > index b3fae5b..ad838dd 100644
> > --- a/gcc/tree-vect-loop-manip.c
> > +++ b/gcc/tree-vect-loo
Hi Richard,
Thanks for the review,
On Fri, 31 May 2019 at 19:43, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > @@ -609,8 +615,14 @@ vect_set_loop_masks_directly (struct loop *loop,
> > loop_vec_info loop_vinfo,
> >
> >/* Get the mas
Hi Richard,
Thanks for the review.
On Tue, 28 May 2019 at 20:44, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > [...]
> > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c
> > index b3fae5b..c15b8a2 100644
> > --- a/gcc/tree-v
Hi Richard,
Thanks for the review.
On Sat, 25 May 2019 at 19:41, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c
> > index 77d3dac..d6452a1 100644
> > --- a/gcc/tree-vect-loop-manip.c
Hi Richard,
On Fri, 17 May 2019 at 18:47, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > [...]
> >> > +{
> >> > + struct mem_address parts = {NULL_TREE, integer_one_node,
> >> > + N
4e9837ff9c0c080923f342e83574a6fdba2b3d92 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Tue, 5 Mar 2019 10:01:45 +1100
Subject: [PATCH] pr88838[v2]
As Mentioned in PR88838, this patch avoid the SXTW by using WHILELO on W
registers instead of X registers.
As mentined in PR, vect_verify_full_masking checks which IV widths
Hi,
On Fri, 17 May 2019 at 13:37, wrote:
>
> From: Kewen Lin
>
> Hi,
>
> Previous version link:
> https://gcc.gnu.org/ml/gcc-patches/2019-05/msg00654.html
>
> Comparing with the previous version, I moved the generic
> parts of rs6000 target hook to IVOPTs. But I still kept
> the target hook as
Hi Richard,
On Thu, 16 May 2019 at 21:14, Richard Biener wrote:
>
> On Wed, May 15, 2019 at 4:40 AM wrote:
> >
> > From: Kugan Vivekanandarajah
> >
> > gcc/ChangeLog:
> >
> > 2019-05-15 Kugan Vivekanandarajah
> >
> >
Hi Richard,
On Wed, 15 May 2019 at 16:57, Richard Sandiford
wrote:
>
> Thanks for doing this.
>
> kugan.vivekanandara...@linaro.org writes:
> > From: Kugan Vivekanandarajah
> >
> > gcc/ChangeLog:
> >
> > 2019-05-15 Kugan Vivekanandarajah
> >
Hi Richard,
On Wed, 15 May 2019 at 23:24, Richard Earnshaw (lists)
wrote:
>
> On 15/05/2019 13:48, Richard Earnshaw (lists) wrote:
> > On 15/05/2019 03:39, kugan.vivekanandara...@linaro.org wrote:
> >> From: Kugan Vivekanandarajah
> >>
> >
> > The subje
From: Kugan Vivekanandarajah
This patch changes cse_insn to process parallel rtx one by one such that
any destination rtx in cse list is invalidated before processing the
next.
gcc/ChangeLog:
2019-05-16 Kugan Vivekanandarajah
PR target/88834
* cse.c (safe_hash): Handle
From: Kugan Vivekanandarajah
For aarch64 sve while_ult pattern, Set CC_REGNUM instead of clobbering.
gcc/ChangeLog:
2019-05-16 Kugan Vivekanandarajah
PR target/88834
* config/aarch64/aarch64-sve.md (while_ult): Set CC_REGNUM instead
of clobbering.
Change-Id
From: Kugan Vivekanandarajah
Inorder to fix this PR.
* We need to change the whilelo pattern in backend
* Change RTL CSE such that:
- Add support for VEC_DUPLICATE
- When handling PARALLEL rtx in cse_insn, we kill CSE defined by all the
parallel rtx at the end.
For example
From: Kugan Vivekanandarajah
gcc/ChangeLog:
2019-05-15 Kugan Vivekanandarajah
PR target/88834
* config/aarch64/aarch64.c (aarch64_classify_address): Relax
allow_reg_index_p.
gcc/testsuite/ChangeLog:
2019-05-15 Kugan Vivekanandarajah
PR target/88834
From: Kugan Vivekanandarajah
In PR88834, IVOPT is not selecting the right addressing mode. Inorder to fix
thix,
we need to add support to add IV uses for IFN_MASK_LOAD_LANES and
IFN_MASK_STORE_LANES.
In addition, we also need to add IV candidate with scaled by the element or
access size
From: Kugan Vivekanandarajah
gcc/ChangeLog:
2019-05-15 Kugan Vivekanandarajah
PR target/88834
* tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
IFN_MASK_LOAD_LANES and IFN_MASK_STORE_LANES.
(find_interesting_uses_stmt): Likewise
Hi Jeff,
[...]
+ "#"
+ "&& 1"
+ [(const_int 0)]
+ "{
+ /* If we do not have an RMW operand, then copy the input
+ to the output before this insn. Also modify the existing
+ insn in-place so we can have make_field_assignment actually
+ generate a suitable extraction. */
+ if
Hi All,
LTO bootstrap for ARM fails with the commit
commit 67c18bce7054934528ff5930cca283b4ac967dca
* combine.c (record_dead_and_set_regs_1): Record the source unmodified
for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
It fails with an internal compiler error: in operator+=, at
I have committed attached patch to aarch64/sve-acle-branch branch
which implements svbic.
Thanks,
Kugan
From 182bd15334874844bef5e317f55a6497f77e12ff Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Thu, 24 Jan 2019 20:57:19 +1100
Subject: [PATCH 1/3] svbic
Change-Id
I committed the following patch which implements svdot to
aarch64/sve-acle-branch. branch
Thanks,
Kugan
From b75cd8ba8f911c137380677b85882c22a6467bf6 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Fri, 18 Jan 2019 09:07:10 +1100
Subject: [PATCH] [SVE ACLE] Implements svdot
Change
I committed the following patch which implements svmulh to
aarch64/sve-acle-branch. branch
Thanks,
Kugan
From 33b76de8ef5f370dfacba0addef2fe0b1f2a61db Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Fri, 18 Jan 2019 07:33:26 +1100
Subject: [PATCH] [SVE ACLE] Implements svmulh
Change
I committed the following patch which implements svabs, svnot, svneg
and svsqrt to aarch64/sve-acle-branch. branch
Thanks,
Kugan
From 2af9609a58cf7efbed93f15413224a2552b9696d Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Wed, 16 Jan 2019 07:45:52 +1100
Subject: [PATCH] [SVE ACLE
Hi Richard,
Thanks for the review.
On Thu, 8 Nov 2018 at 00:03, Richard Biener wrote:
>
> On Fri, Nov 2, 2018 at 10:02 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard,
> > Thanks for the review.
> > On Tue, 30 Oct 2018 at 01:25, Richard Biener
> >
Hi Richard,
Thanks for the review.
On Tue, 30 Oct 2018 at 01:25, Richard Biener wrote:
>
> On Mon, Oct 29, 2018 at 2:06 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard and Jeff,
> >
> > Thanks for your comments.
> >
> > On Fri, 26
Hi Richard and Jeff,
Thanks for your comments.
On Fri, 26 Oct 2018 at 19:40, Richard Biener wrote:
>
> On Fri, Oct 26, 2018 at 4:55 AM Jeff Law wrote:
> >
> > On 10/25/18 4:33 PM, Kugan Vivekanandarajah wrote:
> > > Hi,
> > >
> > > PR87528
. Is this OK?
Thanks,
Kugan
gcc/testsuite/ChangeLog:
2018-10-26 Kugan Vivekanandarajah
PR middle-end/87469
* g++.dg/pr87469.C: New test.
gcc/ChangeLog:
2018-10-26 Kugan Vivekanandarajah
PR middle-end/87469
* tree-ssa-loop-niter.c (number_of_iterations_popcount): Fix niter
max
gcc/testsuite/ChangeLog:
2018-10-25 Kugan Vivekanandarajah
* gcc.dg/gimplefe-30.c: New test.
* gcc.dg/gimplefe-31.c: New test.
* gcc.dg/gimplefe-32.c: New test.
* gcc.dg/gimplefe-33.c: New test.
gcc/ChangeLog:
2018-10-25 Kugan Vivekanandarajah
* doc/generic.texi
-10-25 Kugan Vivekanandarajah
* tree-scalar-evolution.c (expression_expensive_p): Make BUILTIN POPCOUNT
as expensive when backend does not define it.
gcc/testsuite/ChangeLog:
2018-10-25 Kugan Vivekanandarajah
* gcc.target/aarch64/popcount4.c: New test.
From
Hi,
Attached patch implements ACLE svdup, svindex, svqad/qsub, svabd and
svmul built-ins.
Committed to ACLE branch,
Thanks,
Kugan
0001-svdup-svindex-svqad-qsub-svabd-and-svmul.patch.gz
Description: application/gzip
Hi,
On 28 July 2018 at 01:13, Richard Biener wrote:
> On July 27, 2018 3:33:59 PM GMT+02:00, "Martin Liška" wrote:
>>On 07/11/2018 02:31 PM, Richard Biener wrote:
>>> Why not simply make popcountdi available in the kernel? They do have
>>> implementations for other libgcc functions IIRC.
>>
,
Kugan
gcc/ChangeLog:
2018-07-18 Kugan Vivekanandarajah
PR middle-end/86544
* tree-ssa-phiopt.c (cond_removal_in_popcount_pattern): Handle
comparison with EQ_EXPR
in last stmt.
gcc/testsuite/ChangeLog:
2018-07-18 Kugan Vivekanandarajah
PR middle-end/86544
* g++.dg
Hi Andrew,
On 11 July 2018 at 15:43, Andrew Pinski wrote:
> On Tue, Jul 10, 2018 at 6:35 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Andrew,
>>
>> On 11 July 2018 at 11:19, Andrew Pinski wrote:
>> > On Tue, Jul 10, 2018 at 6:14 PM Kugan Vivekanandarajah
&
Hi Andrew,
On 11 July 2018 at 11:19, Andrew Pinski wrote:
> On Tue, Jul 10, 2018 at 6:14 PM Kugan Vivekanandarajah
> wrote:
>>
>> On 10 July 2018 at 23:17, Richard Biener wrote:
>> > On Tue, Jul 10, 2018 at 3:06 PM Kugan Vivekanandarajah
>> > wrote:
>
On 10 July 2018 at 23:17, Richard Biener wrote:
> On Tue, Jul 10, 2018 at 3:06 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi,
>>
>> Jeff told me that the recent popcount built-in detection is causing
>> kernel build issues as
>> ERROR: "__popcounts
pcount?
I am testing the attached RFC patch. Is this reasonable?
Thanks,
Kugan
gcc/ChangeLog:
2018-07-10 Kugan Vivekanandarajah
* tree-ssa-loop-niter.c (number_of_iterations_popcount): Check
if libfunc for popcount is available.
diff --git a/gcc/tree-ssa-loop-niter.c b/gcc/tre
Hi Richard,
Thanks for the review.
On 6 July 2018 at 20:17, Richard Biener wrote:
> On Fri, Jul 6, 2018 at 11:45 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> > It was rewrite_to_non_trapping_overflow available in tree.h. Thus
>> &
gressions.
Thanks,
Kugan
gcc/ChangeLog:
2018-07-06 Kugan Vivekanandarajah
* tree-scalar-evolution.c (final_value_replacement_loop): Use
rewrite_to_non_trapping_overflow instead of rewrite_to_defined_overflow.
From 68a4f232f6cde68751f6785059121fe116363886 Mon Sep 17 00:00:00 2001
Fr
Hi Jeff,
Thanks for looking into it.
On 6 July 2018 at 08:03, Jeff Law wrote:
> On 06/24/2018 08:41 PM, Kugan Vivekanandarajah wrote:
>> Hi Jeff,
>>
>> Thanks for the comments.
>>
>> On 23 June 2018 at 02:06, Jeff Law wrote:
>>> On 06/22/2018 03:11 A
Hi Richard,
Thanks for the review.
On 28 June 2018 at 21:26, Richard Biener wrote:
> On Wed, Jun 27, 2018 at 7:00 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the review.
>>
>> On 25 June 2018 at 20:01, Richard Biener wrote:
&
Hi,
We noticed a difference in the code generated for aarch64 gcc 7.2
hosted in Linux vs mingw. AFIK, we are supposed to produce the same
output.
For the testacse we have (quite large and I am trying to reduce), the
difference comes from sched1 pass. If I disable sched1 the difference
is going
Hi Richard,
On 29 June 2018 at 18:45, Richard Biener wrote:
> On Wed, Jun 27, 2018 at 7:09 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the review,
>>
>> On 25 June 2018 at 20:20, Richard Biener wrote:
>> > On F
ing convert again.
>
> Where are the testcases?
I have fixed the above and added test-cases.
>
>> Bootstrap and regression testing on x86_64-linux-gnu. Is this OK if no
>> regressions.
>
>
> Does it mean you have run the tests or intend to run them in the future? It
&g
Hi,
This patch adds some of the missing patterns in match.pd for ABSU_EXPR.
Bootstrap and regression testing on x86_64-linux-gnu. Is this OK if no
regressions.
Thanks,
Kugan
gcc/ChangeLog:
2018-06-28 Kugan Vivekanandarajah
* match.pd (absu(x)*absu(x) -> x*x): Handle.
(a
Hi Richard,
Thanks for the review,
On 25 June 2018 at 20:20, Richard Biener wrote:
> On Fri, Jun 22, 2018 at 11:16 AM Kugan Vivekanandarajah
> wrote:
>>
>> gcc/ChangeLog:
>
> @@ -1516,6 +1521,114 @@ minmax_replacement (basic_block cond_bb,
> basic_block mi
Hi Richard,
Thanks for the review.
On 25 June 2018 at 20:02, Richard Biener wrote:
> On Fri, Jun 22, 2018 at 11:14 AM Kugan Vivekanandarajah
> wrote:
>>
>> gcc/ChangeLog:
>
> The canonical way is calling simplify_using_initial_conditions on the
> may_be_zero condit
Hi Richard,
Thanks for the review.
On 25 June 2018 at 20:01, Richard Biener wrote:
> On Fri, Jun 22, 2018 at 11:13 AM Kugan Vivekanandarajah
> wrote:
>>
>> [PATCH 1/3][POPCOUNT] Handle COND_EXPR in expression_expensive_p
>
> This says that COND_EXPR itself isn't expen
Hi Bin,
On 25 June 2018 at 13:56, Bin.Cheng wrote:
> On Mon, Jun 25, 2018 at 11:37 AM, Kugan Vivekanandarajah
> wrote:
>> Hi Bin,
>>
>> Thanks for your comments.
>>
>> On 25 June 2018 at 11:15, Bin.Cheng wrote:
>>> On Fri, Jun 22, 2018 at 5:11 PM,
Hi Bin,
Thanks for your comments.
On 25 June 2018 at 11:15, Bin.Cheng wrote:
> On Fri, Jun 22, 2018 at 5:11 PM, Kugan Vivekanandarajah
> wrote:
>> When we set niter with maybe_zero, currently final_value_relacement
>> will not happen due to expression_expensive_p not handlin
Hi Jeff,
Thanks for the comments.
On 23 June 2018 at 02:06, Jeff Law wrote:
> On 06/22/2018 03:11 AM, Kugan Vivekanandarajah wrote:
>> When we set niter with maybe_zero, currently final_value_relacement
>> will not happen due to expression_expensive_p not handling.
gcc/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* tree-ssa-phiopt.c (cond_removal_in_popcount_pattern): New.
(tree_ssa_phiopt_worker): Call cond_removal_in_popcount_pattern.
gcc/testsuite/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* gcc.dg/tree-ssa/popcount3.c: New test
gcc/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* tree-ssa-loop-niter.c (number_of_iterations_popcount): If popcount
argument is checked for zero before entering loop, avoid checking again.
From 4f2a6ad5a49eec0a1cae15e033329f889f9137b9 Mon Sep 17 00:00:00 2001
From: Kugan
[PATCH 1/3][POPCOUNT] Handle COND_EXPR in expression_expensive_p
gcc/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* tree-scalar-evolution.c (expression_expensive_p): Handle COND_EXPR.
From aa38b98dd97567c6032c261f19b3705abc2233b0 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
When we set niter with maybe_zero, currently final_value_relacement
will not happen due to expression_expensive_p not handling. Patch 1
adds this.
With that we have the following optimized gimple.
[local count: 118111601]:
if (b_4(D) != 0)
goto ; [89.00%]
else
goto ; [11.00%]
Hi Richard,
Thanks for the review and sorry for getting back to you late.
On 4 June 2018 at 18:38, Richard Biener wrote:
> On Mon, Jun 4, 2018 at 10:18 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the review.
>>
>> On 1
Hi Richard,
Thanks for the review.
On 1 June 2018 at 22:20, Richard Biener wrote:
> On Fri, Jun 1, 2018 at 4:12 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> This is the revised patch based on the review and the discussion in
>> https://gcc.
Hi Bin,
Thanks a lo for the review.
On 1 June 2018 at 03:45, Bin.Cheng wrote:
> On Thu, May 31, 2018 at 3:51 AM, Kugan Vivekanandarajah
> wrote:
>> Hi Bin,
>>
>> Thanks for the review. Please find the revised patch based on the
>> review comments.
>>
>
36, Kugan Vivekanandarajah
wrote:
> Hi Richard,
>
> Thanks for the review. I am revising the patch based on Andrew's comments too.
>
> On 17 May 2018 at 20:36, Richard Biener wrote:
>> On Thu, May 17, 2018 at 4:56 AM Andrew Pinski wrote:
>>
>>> On Wed, May 16, 2018
Hi Bin,
Thanks for the review. Please find the revised patch based on the
review comments.
Thanks,
Kugan
On 17 May 2018 at 19:56, Bin.Cheng wrote:
> On Thu, May 17, 2018 at 2:39 AM, Kugan Vivekanandarajah
> wrote:
>> Hi Richard,
>>
>> On 6 March 2018 at 02:2
Hi Jeff,
Thanks for the prompt reply.
On 22 May 2018 at 09:10, Jeff Law <l...@redhat.com> wrote:
> On 05/21/2018 04:50 PM, Kugan Vivekanandarajah wrote:
>> Hi,
>>
>> I am looking to introduce ABSU_EXPR and that would create:
>>
>> unsigned sh
Hi,
I am looking to introduce ABSU_EXPR and that would create:
unsigned short res = ABSU_EXPR (short);
Note that the argument is signed and result is unsigned. As per the
review, I have a match.pd entry to generate this as:
(simplify (abs (convert @0))
(if (ANY_INTEGRAL_TYPE_P (TREE_TYPE
he whole gcc/ tree doesn't reveal too many
> cases of ABS_EXPR so I think it's reasonable to audit all of them.
>
> I also miss some trivial absu simplifications in match.pd. There are not
> a lot of abs cases but similar ones would be good to have initially.
I will add them in
in the correct way. I am not sure I am not doing
all that is needed. I will clean up and add more test-cases based on
the feedback.
Thanks,
Kugan
gcc/ChangeLog:
2018-05-13 Kugan Vivekanandarajah <kugan.vivekanandara...@linaro.org>
* expr.c (expand_expr_real_2): Handle ABSU_EXPR.
* fold-c
Hi Richard,
On 6 March 2018 at 02:24, Richard Biener <richard.guent...@gmail.com> wrote:
> On Thu, Feb 8, 2018 at 1:41 AM, Kugan Vivekanandarajah
> <kugan.vivekanandara...@linaro.org> wrote:
>> Hi Richard,
>>
>> On 1 February 2018 at 23:21, Richard Biener &l
Hi Richard,
On 15 May 2018 at 19:20, Richard Biener <rguent...@suse.de> wrote:
> On Tue, 15 May 2018, Richard Biener wrote:
>
>> On Mon, 14 May 2018, Kugan Vivekanandarajah wrote:
>>
>> > Hi,
>> >
>> > Attached patch handles PR63185 when we reac
Vivekanandarajah <kug...@linaro.org>
* tree-ssa-dse.c (phi_dosent_define_nor_use_p): New.
(dse_classify_store): Use phi_dosent_define_nor_use_p.
gcc/testsuite/ChangeLog:
2018-05-14 Kugan Vivekanandarajah <kug...@linaro.org>
* gcc.dg/tree-ssa/ssa-dse-33.c: Ne
gt;> tests
>> for the store being redundant and simplify the patch considerably.
Tried implementing above in the attached patch. Bootstrapped on
x86_64-linux-gnu. Full testing is ongoing.
Thanks,
Kugan
gcc/ChangeLog:
2018-05-14 Kugan Vivekanandarajah <kug...@linaro.org>
Hi Jeff,
Thanks for the review.
On 2 May 2018 at 01:43, Jeff Law <l...@redhat.com> wrote:
> On 04/09/2018 06:52 PM, Kugan Vivekanandarajah wrote:
>> I would like to queue this patch for stage1 review.
>>
>> In DSE, while in dse_classify_store, as soon as we
with no new regressions.
Is this OK for next stage1?
Thanks,
Kugan
gcc/ChangeLog:
2018-04-10 Kugan Vivekanandarajah <kug...@linaro.org>
* tree-ssa-dse.c (dse_classify_store): Handle recursive PHI.
(dse_dom_walker::dse_optimize_stmt): Update call dse_classify_store.
gcc/testsuite/Cha
On Tue, Mar 6, 2018 at 5:20 PM, Bin.Cheng <amker.ch...@gmail.com> wrote:
>>> On Mon, Mar 5, 2018 at 3:24 PM, Richard Biener
>>> <richard.guent...@gmail.com> wrote:
>>>> On Thu, Feb 8, 2018 at 1:41 AM, Kugan Vivekanandarajah
>>>> <kugan.viv
Vivekanandarajah
<kugan.vivekanandara...@linaro.org> wrote:
> Hi James,
>
> On 29 August 2017 at 21:31, James Greenhalgh <james.greenha...@arm.com> wrote:
>> On Tue, Jun 27, 2017 at 11:20:02AM +1000, Kugan Vivekanandarajah wrote:
>>> https://gcc.gnu.org/ml/gcc-
Hi Richard,
On 16 February 2018 at 22:56, Richard Biener <richard.guent...@gmail.com> wrote:
> On Thu, Feb 15, 2018 at 11:30 PM, Kugan Vivekanandarajah
> <kugan.vivekanandara...@linaro.org> wrote:
>> Hi Wilko,
>>
>> Thanks for your comments.
>>
>&
Hi Wilko,
Thanks for your comments.
On 14 February 2018 at 00:05, Wilco Dijkstra wrote:
> Hi Kugan,
>
>> Based on the previous discussions, I tried to implement a tree loop
>> unroller for partial unrolling. I would like to queue this RFC patches
>> for next stage1
Hi,
On 14 February 2018 at 09:47, Kugan Vivekanandarajah
<kugan.vivekanandara...@linaro.org> wrote:
> Hi Kyrill,
>
> On 13 February 2018 at 20:47, Kyrill Tkachov
> <kyrylo.tkac...@foss.arm.com> wrote:
>> Hi Kugan,
>>
>> On 12/02/18 23:58, Kugan
Hi Kyrill,
On 13 February 2018 at 20:47, Kyrill Tkachov
<kyrylo.tkac...@foss.arm.com> wrote:
> Hi Kugan,
>
> On 12/02/18 23:58, Kugan Vivekanandarajah wrote:
>>
>> Implements a machine reorg pass for aarch64/Falkor to handle
>> prefetcher tag collision. This
Hi Kyrill,
Thanks for the review.
On 13 February 2018 at 20:58, Kyrill Tkachov
<kyrylo.tkac...@foss.arm.com> wrote:
> Hi Kugan,
>
> On 12/02/18 23:53, Kugan Vivekanandarajah wrote:
>>
>> Adds a target hook TARGET_HW_MAX_MEM_READ_STREAMS. Loop unroller, if
&g
-10/msg00178.html.
gcc/ChangeLog:
2018-02-12 Kugan Vivekanandarajah <kug...@linaro.org>
* config/aarch64/aarch64.c (iv_p): New.
(strided_load_p): Likwise.
(make_tag): Likesie.
(get_load_info): Likewise.
(aarch64_reorg): Likewise.
(TARGET_MACHINE_DEPENDENT
Implements target hook TARGET_HW_MAX_MEM_READ_STREAMS for aarch64
gcc/ChangeLog:
2018-02-12 Kugan Vivekanandarajah <kug...@linaro.org>
* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune): Add
new entry hw_prefetchers_avail.
* config/aarch64/aar
Implements tree loop unroller using the infrastructure provided.
gcc/ChangeLog:
2018-02-12 Kugan Vivekanandarajah <kug...@linaro.org>
* Makefile.in (OBJS): Add tree-ssa-loop-unroll.o.
* common.opt (ftree-loop-unroll): New option.
* passes.def: Add pass_tree_loop
Adds a target hook TARGET_HW_MAX_MEM_READ_STREAMS. Loop unroller, if
defined, will try to limit the unrolling factor based on this.
gcc/ChangeLog:
2018-02-12 Kugan Vivekanandarajah <kug...@linaro.org>
* doc/tm.texi.in (TARGET_HW_MAX_MEM_READ_STREAMS): Dcoument.
* doc/t
Hi All,
Based on the previous discussions, I tried to implement a tree loop
unroller for partial unrolling. I would like to queue this RFC patches
for next stage1 review.
In summary:
* Cost-model for selecting the loop uses the same params used
elsewhere in related optimizations. I was told
Hi,
On 9 February 2018 at 09:08, Steve Ellcey wrote:
> I have a question about the poly_uint64 type and the TYPE_VECTOR_SUBPARTS
> macro. I am trying to copy some code from i386.c into my aarch64 build
> that is basically:
>
> int n;
> n = TYPE_VECTOR_SUBPARTS (type_out);
>
Hi Richard,
On 1 February 2018 at 23:21, Richard Biener <richard.guent...@gmail.com> wrote:
> On Thu, Feb 1, 2018 at 5:07 AM, Kugan Vivekanandarajah
> <kugan.vivekanandara...@linaro.org> wrote:
>> Hi Richard,
>>
>> On 31 January 2018 at 21:39, Richard Biener &l
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