Re: [PATCH] Fix PR82396: qsort comparator non-negative on sorted output

2017-10-05 Thread Steve Ellcey
t on this email to see if one on them can review/approve Wilco's patch which was applied and then reverted.  If not, can one of the global maintainers revert the original patch that broke the bootstrap? Steve Ellcey sell...@cavium.com

Re: [PATCH][AArch64] Add BIC-imm and ORR-imm SIMD pattern

2017-10-04 Thread Steve Ellcey
On Wed, 2017-10-04 at 16:41 +0100, Richard Earnshaw (lists) wrote: > On 02/10/17 10:05, Sudi Das wrote: > >  > > 2017-10-02 Sudakshina Das   > > > > * config/aarch64/aarch64-protos.h (enum simd_immediate_check): New > > check type > > for aarch64_simd_valid_immediate. >

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-10-03 Thread Steve Ellcey
s been fixed but it involved a change to libatomic/ibatomic_i.h that conflicted with this patch so I am including an updated version that will apply cleanly to the top of tree.  Only libatomic_i.h changed. Steve Ellcey sell...@cavium.com 2017-10-03  Steve Ellcey  <sell...@cavium.com>

Re: [PATCH] avoid ifunc warnings in libatomic configure

2017-10-02 Thread Steve Ellcey
anges I can take > mine out. > > Martin I haven't submitted anything for this problem.  This patch fixed things for my aarch64 build.  I definitely needed the libatomic_i.h changes as well as the configure change. Steve Ellcey sell...@cavium.com

Re: [PATCH] detect incompatible aliases (PR c/81854)

2017-10-02 Thread Steve Ellcey
On Wed, 2017-09-20 at 08:37 -0700, Steve Ellcey wrote: > On Tue, 2017-09-19 at 09:16 -0600, Martin Sebor wrote: > > On 09/18/2017 03:44 PM, Joseph Myers wrote: > > > On Mon, 18 Sep 2017, Martin Sebor wrote: > > > > It's meant as an escape hatch.  It allows d

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-09-29 Thread Steve Ellcey
rences, and changed HWCAP_TYPE to IFUNC_RESOLVER_ARGS. Here is the new patch, tested with no regressions. Steve Ellcey sell...@cavium.com 2017-09-29  Steve Ellcey  <sell...@cavium.com> * Makefile.am (ARCH_AARCH64_LINUX): Add IFUNC_OPTIONS and libatomic_la_LIBADD. * config/l

Re: [reviewed] qsort comparator consistency checking

2017-09-29 Thread Steve Ellcey
On Fri, 2017-09-29 at 21:43 +0200, Christophe Lyon wrote: > On 29 September 2017 at 21:39, Steve Ellcey <sell...@cavium.com> > wrote: > > > > On Fri, 2017-09-29 at 21:14 +0300, Alexander Monakov wrote: > > > > > >

Re: [reviewed] qsort comparator consistency checking

2017-09-29 Thread Steve Ellcey
tch ranking heuristic is still wrong if > multi_mem_insn_p > may be true; please try this patch. > > * haifa-sched.c (autopref_rank_data): Remove. > (autopref_rank_for_schedule): Only use min_offset difference. This fixed the build for me on aarch64.  I am still running the testsuite. Steve Ellcey sell...@cavium.com

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-09-27 Thread Steve Ellcey
Ping. Steve Ellcey sell...@cavium.com On Thu, 2017-08-31 at 10:24 -0700, Steve Ellcey wrote: > On Tue, 2017-08-29 at 12:25 +0100, Szabolcs Nagy wrote: > > > >   > > in glibc the hwcap is not used, because it has accesses to > > cached dispatch info, but in libatomic u

[PATCH PR79868 ][aarch64] Fix error calls in aarch64 code so they can be translated (version 2)

2017-09-25 Thread Steve Ellcey
and with other GCC errors.  This was worked out with help from Martin Sebor.  I also had to fix some tests to match the new error string formats. Tested on Aarch64 with no regressions, OK to checkin? Steve Ellcey sell...@cavium.com 2017-09-25  Steve Ellcey  <sell...@cavium.com> PR target

Re: [PATCH][aarch64] Fix pr81356 - copy empty string with wrz, not a ldrb/strb

2017-09-25 Thread Steve Ellcey
Ping. Steve Ellcey sell...@cavium.com On Fri, 2017-09-15 at 11:22 -0700, Steve Ellcey wrote: > PR 81356 points out that doing a __builtin_strcpy of an empty string on > aarch64 does a copy from memory instead of just writing out a zero byte. > In looking at this I found that it wa

Re: [PATCH][aarch64] Enable ifunc resolver attribute by default

2017-09-22 Thread Steve Ellcey
On Thu, 2017-09-21 at 12:37 +, Joseph Myers wrote: > On Tue, 5 Sep 2017, Steve Ellcey wrote: > > > > > 2017-09-05  Steve Ellcey  <sell...@cavium.com> > > > > * config.gcc: Add new case statement to set > > default_gnu_indirec

Re: [PATCH][aarch64] Fix error calls in aarch64 code so they can be tranlated

2017-09-22 Thread Steve Ellcey
64/target_attr_12.c gcc.target/aarch64/target_attr_17.c But I thought we should try and get some agreement on the format of the messages before updating the tests.  If we think these changes look good I can submit a final patch that includes the testsuite changes. Steve Ellcey sell...@cavium.com 201

Re: [PATCH][aarch64] Fix error calls in aarch64 code so they can be tranlated

2017-09-20 Thread Steve Ellcey
On Tue, 2017-09-19 at 10:49 -0600, Martin Sebor wrote: > On 09/19/2017 09:54 AM, Steve Ellcey wrote: > > On Tue, 2017-09-19 at 09:50 +0200, Frédéric Marchal wrote: > > >  > > > > > > > >    error (is_pragma > > > >

Re: [PATCH] detect incompatible aliases (PR c/81854)

2017-09-20 Thread Steve Ellcey
7-09/msg00285.html Steve Ellcey sell...@cavium.com

Re: [PATCH] detect incompatible aliases (PR c/81854)

2017-09-20 Thread Steve Ellcey
unction" != xyes &&    test x"$multi_arch" = xyes; then   AC_MSG_WARN([--enable-multi-arch support recommends a gcc with gnu- indirect-function support. Please use a gcc which supports it by default or configure gcc with -- enable-gnu-indirect-function]) fi Steve Ellcey sell...@cavium.com

Re: [PATCH] detect incompatible aliases (PR c/81854)

2017-09-20 Thread Steve Ellcey
Interesting new data point.  aarch64 GCC does not enable the resolver/indirect function feature by default (--enable-gnu-indirect- function is not set by default).  If I enable this on the GCC build then GCC can build glibc.  Without it, the glibc build fails. Steve Ellcey sell...@cavium.com

Re: [PATCH] detect incompatible aliases (PR c/81854)

2017-09-20 Thread Steve Ellcey
On Wed, 2017-09-20 at 10:17 -0600, Martin Sebor wrote: >  > The comment copied below from sysdeps/aarch64/multiarch/memmove.c > suggests this might be deliberate: > > /* Redefine memmove so that the compiler won't complain about the > type > mismatch with the IFUNC selector in strong_alias,

Re: [PATCH] detect incompatible aliases (PR c/81854)

2017-09-20 Thread Steve Ellcey
ne in r252976. > > Thanks > Martin This patch is causing my gcc/glibc ToT build to fail on aarch64.  I am not sure if everything should be working at this point or not or if there is more that needs to be done.  The problem is with the memcpy, memmove, etc. ifuncs on aarch64. Steve Ellcey se

Re: [PATCH][aarch64] Fix error calls in aarch64 code so they can be tranlated

2017-09-19 Thread Steve Ellcey
t; Frederic Are '%<...%>' described somewhere?  These aren't normal printf options are they?  I don't think I have ever used them before.  I am also not sure why you have '%s=' means vs. '%s'.  Is it even worth breaking the word 'arch' out of the string vs. having something like: error (is_pragma ? G_("missing name in %<#pragma target \"arch\"%>) : G_("missing name in % attribute")); Steve Ellcey sell...@cavium.com

Re: [RFC] type promotion pass

2017-09-19 Thread Steve Ellcey
hose upper bits have already been zeroed out somehow.  In my test case the only way to know that is to know that the load byte instruction zeroed them out. Steve Ellcey sell...@cavium.com

Re: [RFC] type promotion pass

2017-09-18 Thread Steve Ellcey
tps://gcc.gnu.org/ml/gcc-patches/2017-09/msg00929.html Steve Ellcey sell...@cavium.com

[PATCH][aarch64] Fix error calls in aarch64 code so they can be tranlated

2017-09-18 Thread Steve Ellcey
patch. OK to checkin? Steve Ellcey sell...@cavium.com 2017-09-18  Steve Ellcey  <sell...@cavium.com> PR target/79868 * config/aarch64/aarch64-c.c (aarch64_pragma_target_parse): Change argument type on aarch64_process_target_attr call. * config/aarch64/a

Re: [RFC] type promotion pass

2017-09-18 Thread Steve Ellcey
), MODE_INT, 0).require (); /* This did not work */ Steve Ellcey sell...@cavium.com

[PATCH][aarch64] Fix pr81356 - copy empty string with wrz, not a ldrb/strb

2017-09-15 Thread Steve Ellcey
as well. Bootstrapped and tested without regressions, OK to checkin? Steve Ellcey sell...@cavium.com 2017-09-15  Steve Ellcey  <sell...@cavium.com> PR target/81356 * config/aarch64/aarch64.c (aarch64_use_by_pieces_infrastructure_p):

Re: [PATCH][aarch64] Fix target/pr77729 - missed optimization related to zero extension

2017-09-14 Thread Steve Ellcey
t I thought it helped make it clear what we were doing and the compiler should optimize it away anyway. OK to checkin this fix while we consider longer term options? Steve Ellcey sell...@cavium.com 2017-09-14  Steve Ellcey  <sell...@cavium.com> PR target/77729 *

Re: [PATCH][aarch64] Fix target/pr77729 - missed optimization related to zero extension

2017-09-14 Thread Steve Ellcey
On Thu, 2017-09-14 at 09:03 -0600, Jeff Law wrote: > On 09/13/2017 03:46 PM, Steve Ellcey wrote: > >  > > In arm32 rtl expansion, when reading the QI memory location, I see > > these instructions get generated: > > > > (insn 10 3 11 2 (set (reg:SI 119) > >

Re: [PATCH][aarch64] Fix target/pr77729 - missed optimization related to zero extension

2017-09-13 Thread Steve Ellcey
On Wed, 2017-09-13 at 22:39 +, Wilco Dijkstra wrote: > Steve Ellcey wrote: > > > And in aarch64 rtl expansion I see: > > > > (insn 10 9 11 (set (reg:QI 81) > > (mem:QI (reg/v/f:DI 80 [ string ]) [0 *string_9(D)+0 S1 > A8])) "pr77729.c":3

Re: [PATCH][aarch64] Fix target/pr77729 - missed optimization related to zero extension

2017-09-13 Thread Steve Ellcey
rch64 I only know that I set the bottom 8 bits and I don't know anything about the higher bits, meaning I have to keep the AND instruction to mask out the upper bits on aarch64. I think we should change the movqi/movhi expansions on aarch64 to recognize that the ldrb/ldrh instructions zero out the up

[PATCH] Fix PR target/82066 - target pragma and attribute documentation for ARM, AArch64, and S/390

2017-09-13 Thread Steve Ellcey
This patch fixes the documentation issues pointed out in PR target/82066. It may be considered obvious enough to just check in but I'd rather have someone look it over to make sure I didn't mess something up. Steve Ellcey sell...@cavium.com 2017-09-13  Steve Ellcey  <sell...@cavium.

[PATCH][aarch64] Fix target/pr77729 - missed optimization related to zero extension

2017-09-13 Thread Steve Ellcey
and testsuite run that had no regressions. OK to checkin? 2017-09-13  Steve Ellcey  <sell...@cavium.com> PR target/77729 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle cost of *iorqi3_uxtw instruction. * config/aarch64/aarch64.md (*iorqi3_uxtw

Re: [PATCH] Fix fortran vector tests on powerpc and aarch64, PR tree-optimization/80925

2017-09-12 Thread Steve Ellcey
Ping,  also adding fort...@gcc.gnu.org which I seem to left out when sending this to gcc-patches@gcc.gnu.org. Steve On Fri, 2017-08-25 at 09:46 -0700, Steve Ellcey wrote: > My earlier patch to update tests and resolve PR tree- > optimization/80925 > did not include FORTRAN, jus

Re: [PATCH] Fix PR 81096 (ttest failures)

2017-09-12 Thread Steve Ellcey
On Tue, 2017-09-12 at 09:39 -0700, Ian Lance Taylor wrote: > On Tue, Sep 12, 2017 at 3:59 AM, Wilco Dijkstra <Wilco.Dijkstra@arm.c > om> wrote: > > > > Steve Ellcey wrote: > > > > > > This patch fixes the ttest failures on aarch64 by adding > > &

Re: [PATCH] Fix PR 81096 (ttest failures)

2017-09-12 Thread Steve Ellcey
On Tue, 2017-09-12 at 09:39 -0700, Ian Lance Taylor wrote: > On Tue, Sep 12, 2017 at 3:59 AM, Wilco Dijkstra <Wilco.Dijkstra@arm.c > om> wrote: > > > > Steve Ellcey wrote: > > > > > > This patch fixes the ttest failures on aarch64 by adding > > &

[PATCH] Fix PR 81096 (ttest failures)

2017-09-11 Thread Steve Ellcey
This patch fixes the ttest failures on aarch64 by adding AM_CFLAGS to the test options, like btest already does and as Wilco says works for him in Comment #4 of the bug report. Tested by me on aarch64.  Ok to checkin? Steve Ellcey sell...@cavium.com 2017-09-11  Steve Ellcey  <s

Re: [PATCH][aarch64] Enable ifunc resolver attribute by default

2017-09-05 Thread Steve Ellcey
ting of default_gnu_indirect_function, but I don't think I changed any defaults. Steve Ellcey sell...@cavium.com 2017-09-05  Steve Ellcey  <sell...@cavium.com> * config.gcc: Add new case statement to set default_gnu_indirect_function.  Remove it from x86_64-*-linux*,

Ping on three small aarch64 patches

2017-08-31 Thread Steve Ellcey
) Steve Ellcey sell...@cavium.com

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-08-31 Thread Steve Ellcey
it they can change the type if necessary. Steve Ellcey sell...@cavium.com 2017-08-31  Steve Ellcey  <sell...@cavium.com> * Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and libatomic_la_LIBADD. * config/linux/aarch64/host-config.h: New file. * config

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-08-30 Thread Steve Ellcey
batomic configure.tgt script as well to set the resolver arg type when I resbumit the gcc libatomic patch so that we can have the correct prototype in libatomic_i.h. Steve Ellcey sell...@cavium.com

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-08-28 Thread Steve Ellcey
asm__ (".type " "__libc_memcpy" ", %gnu_indirect_function"); extern __typeof (__libc_memcpy) memcpy __attribute__ ((alias ("__libc_memcpy"))); Steve Ellcey sell...@cavium.com

[PATCH] Fix fortran tests to not print out non-ascii characters

2017-08-25 Thread Steve Ellcey
the problem to these 3 tests that are printing out 0 valued character variables.  The variables are supposed to be 0, because that is what the test is checking for, so my fix is to print out the ichar value of the character variable instead of the variable itself. Steve Ellcey sell...@cavium.com

[PATCH] Fix fortran vector tests on powerpc and aarch64, PR tree-optimization/80925

2017-08-25 Thread Steve Ellcey
My earlier patch to update tests and resolve PR tree-optimization/80925 did not include FORTRAN, just C and C++.  This patch makes the same changes as the earlier patches but for FORTRAN.  Tested on aarch64. OK to checkin? Steve Ellcey sell...@cavium.com Orginal patches/discussion is at: https

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-08-24 Thread Steve Ellcey
Ping. > 2017-08-07  Steve Ellcey  <sell...@cavium.com> > > * Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and > libatomic_la_LIBADD. > * config/linux/aarch64/host-config.h: New file. > * config/linux/aarch64/init.c: New file

[Patch][AARCH64] Fix PR 81643 by modifying test case.

2017-08-10 Thread Steve Ellcey
think it is worth the time to find it and so I would like to just remove the check so that the testcase no longer fails. OK for checkin? Tested on aarch64. Steve Ellcey sell...@cavium.com 2017-08-10 Steve Ellcey <sell...@cavium.com> PR target/81643 * gcc.target/a

What to do about all the gcc.dg/guality test failures?

2017-08-08 Thread Steve Ellcey
of questions: Are these tests worth runnning? Do they make sense with -O3 and/or -O2 -flto? If they make sense and should be run do we need to fix GCC to clean up the failures? Or should we continue to just ignore them? Steve Ellcey sell...@cavium.com

Re: [Patch] Testsuite fixes for failures caused by patch for PR 80925 - loop peeling and alignment

2017-08-07 Thread Steve Ellcey
the error using that.  I am not sure why. Steve Ellcey sell...@cavium.com On Fri, 2017-08-04 at 16:27 +0200, Rainer Orth wrote: > Richard Biener <richard.guent...@gmail.com> writes: > > > > > On Fri, Jul 28, 2017 at 8:22 PM, Steve Ellcey <sell...@cavium.com> > >

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-08-07 Thread Steve Ellcey
It would probably help if I included the patch. Steve Ellcey sell...@cavium.com 2017-08-07  Steve Ellcey  <sell...@cavium.com> * Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and libatomic_la_LIBADD. * config/linux/aarch64/host-config.h: Ne

[Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

2017-08-07 Thread Steve Ellcey
it is useful, both for testing and for end users. Tested on aarch64, OK for checkin? Steve Ellcey sell...@cavium.com 2017-08-07  Steve Ellcey  <sell...@cavium.com> * Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and libatomic_la_LIBADD. * config/linux/aarch6

Re: c-family PATCH to improve and simplify -Wmultistatement-macros (PR c/81448, c/81306)

2017-08-02 Thread Steve Ellcey
problem may still be present). I have built and tested the latest glibc with the latest gcc and after removing the warnings from the Makefile, everything ran fine.  There were no build problems. Since the mainline is now open I will go ahead and check in this patch. Steve Ellcey sell...@cavium.com

[Patch] Testsuite fixes for failures caused by patch for PR 80925 (part deux)

2017-07-31 Thread Steve Ellcey
Here is a second set of patches to fix tests that started failing with the patch for PR 80925.  It uses the same testsuite changes I did for no-section-anchors-vect-69.c and section-anchors-vect-69.c on new set of gcc.dg/vect/vect-* tests. 2017-07-31  Steve Ellcey  <sell...@cavium.

Re: [Patch] Testsuite fixes for failures caused by patch for PR 80925 - loop peeling and alignment

2017-07-28 Thread Steve Ellcey
On Fri, 2017-07-28 at 09:47 +0200, Richard Biener wrote: > On Fri, Jul 28, 2017 at 12:16 AM, Steve Ellcey <sell...@cavium.com> wrote: > >  > > Any comments from the power and/or vectorizer folks? > On one side I'm inclined to simplify the testsuite by adding &g

[Patch] Testsuite fixes for failures caused by patch for PR 80925 - loop peeling and alignment

2017-07-27 Thread Steve Ellcey
not mention peeling, but it was affected by the same checkins as the others. Any comments from the power and/or vectorizer folks? Steve Ellcey sell...@cavium.com 2017-07-27  Steve Ellcey  <sell...@cavium.com> PR tree-optimization/80925 * gcc.dg/vect/no-section-anchors-vect-69.

[PING][PATCH][aarch64] Enable ifunc resolver attribute by default

2017-07-21 Thread Steve Ellcey
This is a ping for my patch to enable the ifunc resolver by default for aarch64. https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00806.html Steve Ellcey sell...@cavium.com

ToT build failure?

2017-07-06 Thread Steve Ellcey
--disable-decimal-float --disable-libsanitizer --disable-bootstrap This is an x86 to aarch64 cross compiler. Steve Ellcey sell...@cavium.com

Re: [PATCH/AARCH64] Improve aarch64 conditional compare usage

2017-06-29 Thread Steve Ellcey
hecked this in.  I hadn't considered integers with a restricted range but it might be worth adding.  I will look into that. Steve Ellcey sell...@cavium.com

Re: [PATCH/AARCH64] Improve aarch64 conditional compare usage

2017-06-20 Thread Steve Ellcey
On Tue, 2017-06-20 at 14:58 +0100, James Greenhalgh wrote: > On Fri, Jun 16, 2017 at 10:06:51AM -0700, Steve Ellcey wrote: > > > > > > https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00021.html > > > > Ping. > Hi Steve, > > These changes all look

[PATCH] Ping of ccmp.c (conditional compare) patch

2017-06-19 Thread Steve Ellcey
, aarch64 is currently the only architecture that uses this code because it is the only architecture that sets targetm.gen_ccmp_first and targetm.gen_ccmp_next. Steve Ellcey

Re: [PATCH/AARCH64] Improve aarch64 conditional compare usage

2017-06-16 Thread Steve Ellcey
https://gcc.gnu.org/ml/gcc-patches/2017-05/msg00021.html Ping. Steve Ellcey sell...@cavium.com

[PATCH][aarch64] Enable ifunc resolver attribute by default

2017-06-12 Thread Steve Ellcey
do not see any reason not to have it enabled by default. Tested with no regressions, OK to check in? Steve Ellcey sell...@cavium.com 2017-06-12 Steve Ellcey <sell...@cavium.com> * config.gcc (aarch64*-*-linux*): Enable IFUNC by default. diff --git a/gcc/config.gcc b/gcc/conf

Re: libatomic IFUNC question (arm & libat_have_strexbhd)

2017-06-07 Thread Steve Ellcey
the IFUNC resolvers instead of checking the libat_have_strexbhd variable. Steve Ellcey sell...@cavium.com

Re: libatomic IFUNC question (arm & libat_have_strexbhd)

2017-06-06 Thread Steve Ellcey
On Tue, 2017-06-06 at 07:50 +0200, Florian Weimer wrote: > * Steve Ellcey: > > > > > I have a question about the use of IFUNCs in libatomic.  I was > > looking at the > > arm implementation and in gcc/libatomic/config/linux/arm/host- > > conf

libatomic IFUNC question (arm & libat_have_strexbhd)

2017-06-05 Thread Steve Ellcey
when libatomic is first loaded since it is a constructor but it doesn't seem to do anything and it isn't going to set libat_have_strexbhd as far as I can see. Steve Ellcey sell...@cavium.com

Re: Duplicating loops and virtual phis

2017-05-17 Thread Steve Ellcey
ear you are looking into that.  You are obviously more knowledgable about the GCC loop infrastructure then I am so I look forward to what you come up with. Steve Ellcey sell...@cavium.com

Re: Duplicating loops and virtual phis

2017-05-15 Thread Steve Ellcey
On Sat, 2017-05-13 at 08:18 +0200, Richard Biener wrote: > On May 12, 2017 10:42:34 PM GMT+02:00, Steve Ellcey <sellcey@cavium.c > om> wrote: > > > > (Short version of this email, is there a way to recalculate/rebuild > > virtual > > phi nodes after modifying

Duplicating loops and virtual phis

2017-05-12 Thread Steve Ellcey
ual PHI nodes seem to be OK, it is just the virtual ones that seem wrong after I duplicate the loop into two consecutive loops. Steve Ellcey sell...@cavium.com

Question about dump_printf/dump_printf_loc

2017-05-05 Thread Steve Ellcey
would have some performance advantage since dump_enabled_p is an inlined function, but is that enough of a reason to do it? The second version seems like it would look cleaner in the code where we are making these calls. Steve Ellcey sell...@cavium.com

Re: [PATCH] Fix -fopt-info documentation in invoke.texi

2017-05-04 Thread Steve Ellcey
were) I will go ahead and check this in tomorrow unless there are objections. Steve Ellcey sell...@cavium.com 2017-05-05  Steve Ellcey  <sell...@cavium.com> * doc/invoke.texi (-fopt-info): Explicitly say order of options included in -fopt-info does not matter. * d

[PATCH] Fix -fopt-info documentation in invoke.texi

2017-05-03 Thread Steve Ellcey
Ellcey sell...@cavium.com 2017-05-03  Steve Ellcey  <sell...@cavium.com> * doc/invoke.texi (-fopt-info): Fix description of default behavour. Explicitly say order of options included in -fopt-info does not matter. diff --git a/gcc/doc/optinfo.texi b/gcc/doc/optinf

Question about -fopt-info output (-fopt-info vs. -fopt-info-all)

2017-05-02 Thread Steve Ellcey
hat the documentation is saying wrong? Steve Ellcey sell...@cavium.com

[PATCH/AARCH64] Improve aarch64 conditional compare usage

2017-05-01 Thread Steve Ellcey
instruction with the change.  I ran the SPEC2006 int tests and got a .02 increase in the SPECmark on a ThunderX box. The biggest increases were in mcf and astar.  One test, xlancbmk, did slow down but the overall SPEC result was a speedup. OK for checkin? Steve Ellcey sell...@cavium.com GCC

GCC loop structure question

2017-04-27 Thread Steve Ellcey
d to look at the loop header and latch and see what the header sets and what the latch checks to identify the variable? Steve Ellcey sell...@cavium.com

Re: [PATCH] Alias analysis of zero sized arrays

2017-04-26 Thread Steve Ellcey
s -fschedule-insns to trigger. > > Richard. I created bug 80533.  The problem was found on the gcc-5 branch and is also on the gcc-6 and gcc-7 branches. Steve Ellcey

Re: [PATCH] Alias analysis of zero sized arrays

2017-04-26 Thread Steve Ellcey
ent code though both versions worked OK. I did a full bootstrap and gcc testsuite run on aarch64 with no regressions.  Will you check this in or do you want me to do a submission and checkin? Steve Ellcey sell...@cavium.com

[PATCH] Alias analysis of zero sized arrays

2017-04-25 Thread Steve Ellcey
and that was working.  With this patch, both versions (-UFLEX and -DFLEX) generate the load, store, load, store sequence. OK for checkin? Steve Ellcey sell...@cavium.com 2017-04-25  Steve Ellcey  <sell...@cavium.com> * tree-dfa.c (get_ref_base_and_extent): Treat zero size arra

Re: Alias analysis and zero-sized arrays vs. flexible arrays

2017-04-25 Thread Steve Ellcey
uggy even if it works in one case. > > Richard. Should this work if I use -fno-strict-alias?  Even with that option I get different code with a zero-sized array vs. a flexible array. I have a patch to get_ref_base_and_extent that changes the behaviour for zero-length arrays and I will submit it after I have tested it. Steve Ellcey sell...@cavium.com

Alias analysis and zero-sized arrays vs. flexible arrays

2017-04-24 Thread Steve Ellcey
if it should be different and, if the difference is OK, should that affect how get_ref_base_and_extent behaves, as it apparently does. Steve Ellcey sell...@cavium.com Test case, compiling with '-O2 -DFLEX' generates different code than '-O2 -UFLEX' on aarch64 using ToT GCC. A cross compiler built on x86

Machine problems at gcc.gnu.org?

2017-04-21 Thread Steve Ellcey
not get anywhere Steve Ellcey sell...@cavium.com

Re: SPEC 456.hmmer vectorization question

2017-03-08 Thread Steve Ellcey
On Tue, 2017-03-07 at 14:45 +0100, Michael Matz wrote: > Hi Steve, > > On Mon, 6 Mar 2017, Steve Ellcey wrote: > > > > > I was looking at the spec 456.hmmer benchmark and this email string > > from Jeff Law and Micheal Matz: > > > >   https://gcc.gn

SPEC 456.hmmer vectorization question

2017-03-06 Thread Steve Ellcey
performance win to be had here if it can be done but the alias checking needed seems rather extensive. Steve Ellcey sell...@cavium.com

[PATCH] Fix exception handling for ILP32 aarch64

2017-02-07 Thread Steve Ellcey
ASSUME_EXTENDED_UNWIND_CONTEXT is changed so that change could be left out out by setting it to 0 in the new aarch64 value-unwind.h header file if we thought there was a reason to do that. Steve Ellcey sell...@cavium.com 2017-02-07  Andrew Pinski  <apin...@cavium.com> * config/aarch64/value-unwind.h: Ne

[PATCH] Improve aarch64 conditional compare usage

2017-02-02 Thread Steve Ellcey
and TARGET_GEN_CCMP_FIRST is only set for aarch64 this change will only affect aarch64. Tested with no regressions and a new test is added to verify that we generate a ccmp instruction with the change. OK for checkin after 7.0? Steve Ellcey sell...@cavium.com GCC ChangeLog: 2017-02-02  Steve Ellcey  <s

Question about PR preprocessor/60723

2016-11-30 Thread Steve Ellcey
operator= ( bool bit); operator bool() const; }; GCC 5.4 breaks up the operator delcarations with line markers and GCC 6.2 does not. Steve Ellcey sell...@caviumnetworks.com

Re: glibc test tst-thread_local1.cc fails to compile with latest GCC

2016-10-21 Thread Steve Ellcey
 Once I rebuilt GCC with threads I could build GLIBC and not get this error. Steve Ellcey

RE: [Patch, MIPS] Patch for PR 68273 (user aligned variable arguments)

2016-02-24 Thread Steve Ellcey
e affected? The explicit test cases do not > cover an under aligned long long case which would be good to cover. Yes, the under alignment of long long's is affected. I have added a new testcase (pr68273-3.c) to check that. Here is a new version of the patch with the invoke.texi text, the ne

[Patch, MIPS] Patch for PR 68273 (user aligned variable arguments)

2016-02-24 Thread Steve Ellcey
want to see it (-mno-warn-aligned-args). I did not add an option to make GCC pass arguments in the old manner as I consider that method of passing arguments to be a bug and I don't think we want to have an option to propogate that incorrect behavior. Steve Ellcey sell...@imgtec.com 2016-02-24

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-04 Thread Steve Ellcey
foo (alignedint a); extern void bar (int); int a; alignedint b; int main() { foo(a); bar(b); } Steve Ellcey sell...@imgtec.com

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-03 Thread Steve Ellcey
) and TYPE_ALIGN (TYPE_MAIN_VARIANT (type) and if they are different, issue a warning during compilation about a possible incompatibility with older objects. Steve Ellcey sell...@imgtec.com 2016-02-03 Steve Ellcey <sell...@imgtec.com> PR target/68273 * config/mips/

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-02 Thread Steve Ellcey
nals cause us to get SCmode instead of BLKmode for the example with _Complex? I don't understand that. It seems wrong to me and I don't understand where it is coming from. Steve Ellcey sell...@imgtec.com

GCC compat testing and simulator question

2016-02-01 Thread Steve Ellcey
like the second compiler is ever run to compile anything. I am using the multi-sim dejagnu board. Steve Ellcey sell...@imgtec.com

Re: [Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-02-01 Thread Steve Ellcey
would get extended to 4 bytes in mips_function_arg_boundary by: if (alignment < PARM_BOUNDARY) alignment = PARM_BOUNDARY; But it still seemed a bit 'wrong' to me. Maybe something in the front/middle ends should be updating the type to match any argument promotion that is being done? Steve Ellcey sell...@imgtec.com

[Patch, MIPS] Fix PR target/68273, passing args in wrong regs

2016-01-29 Thread Steve Ellcey
in where arguments were passed and which now work with this patch. Tested with mips-mti-linux-gnu and no regressions. OK to checkin? Steve Ellcey sell...@imgtec.com 2016-01-29 Steve Ellcey <sell...@imgtec.com> PR target/68273 * config/mips/mips.c (mips_function_arg_boundary

Re: [PATCH] libcpp: use better locations for _Pragma tokens (preprocessor/69126)

2016-01-28 Thread Steve Ellcey
diagnostic ignored "-Wmaybe-uninitialized" *++yyvsp = __gettextlval; #pragma GCC diagnostic pop Steve Ellcey sell...@imgtec.com plural.c: In function '__gettextparse': plural.c:1767:12: error: '__gettextlval.num' may be used uninitialized in this function [-Werror=maybe-uninitialized]

Re: [PATCH] libcpp: use better locations for _Pragma tokens (preprocessor/69126)

2016-01-28 Thread Steve Ellcey
On Thu, 2016-01-28 at 14:59 -0500, David Malcolm wrote: > On Thu, 2016-01-28 at 14:48 -0500, David Malcolm wrote: > > On Thu, 2016-01-28 at 11:12 -0800, Steve Ellcey wrote: > > > David, > > > > > > This patch has broken the top-of-tree glibc build > >

[Patch, MIPS] Patch for PR 68400, a mips16 bug

2016-01-26 Thread Steve Ellcey
a more complete mips16 addressing check and reject operands that do not meet the more restrictive requirements. I ran the GCC testsuite with no regressions and have included a test case as part of this patch. OK to checkin? Steve Ellcey sell...@imgtec.com 2016-01-26 Steve Ellcey <s

Re: __builtin_memcpy and alignment assumptions

2016-01-08 Thread Steve Ellcey
ems to match what happens with: int a[256]; int main() { int *p = (int *)((char *)a + 1); int *q = (int *)((char *)a + 5); *p = *q; return 0; } When I optimize it, GCC does unaligned accesses and when unoptimized GCC does aligned accesses which will not work on MIPS. Steve Ellcey sell...@imgtec.com

Re: [Patch] Fix libstdc++ build when using uclibc instead of glibc

2016-01-07 Thread Steve Ellcey
> >>>On 06/01/16 12:45 -0800, Steve Ellcey wrote: > >>>>On Wed, 2016-01-06 at 20:34 +0000, Jonathan Wakely wrote: > >>>>>On 05/01/16 14:43 -0800, Steve Ellcey wrote: > >>>>>>While trying to build GCC with uclibc instead of glibc I

Re: [Patch] Fix libstdc++ build when using uclibc instead of glibc

2016-01-06 Thread Steve Ellcey
On Wed, 2016-01-06 at 20:34 +, Jonathan Wakely wrote: > On 05/01/16 14:43 -0800, Steve Ellcey wrote: > >While trying to build GCC with uclibc instead of glibc I ran into a build > >failure in libstdc++. uclibc doesn't seem to provide the isfinite function > >like gli

[Patch] Fix libstdc++ build when using uclibc instead of glibc

2016-01-05 Thread Steve Ellcey
. OK to checkin? Steve Ellcey sell...@imgtec.com 2016-01-05 Steve Ellcey <sell...@imgtec.com> * include/ext/random.tcc: Use __builtin_finite instead of std::isfinite. diff --git a/libstdc++-v3/include/ext/random.tcc b/libstdc++-v3/include/ext/random.tcc index a9c5a2b..3

libstdc++ / uclibc question

2015-12-21 Thread Steve Ellcey
ed problem. I could not find any uses of isfinite in other C++ files (except cmath) and the tests that use it are the same ones that are xfailed for uclibc. Steve Ellcey sell...@imgtec.com

RE: [Patch] Fix for MIPS PR target/65604

2015-12-15 Thread Steve Ellcey
On Tue, 2015-12-15 at 15:13 +, Moore, Catherine wrote: > > HI Steve, The patch is OK. Will you please add a test case and repost? > Thanks, > Catherine Here is the patch with a test case. 2015-12-15 Steve Ellcey <sell...@imgtec.com> PR target/65604 *

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