[Bug tree-optimization/44328] switch/case optimization produces an invalid lookup table index

2010-08-03 Thread ian dot bolton at arm dot com
--- Comment #26 from ian dot bolton at arm dot com 2010-08-03 17:09 --- (In reply to comment #25) (In reply to comment #24) (In reply to comment #23) I can confirm this fails with GCC 4.4.4 and that GCC 4.3.2 works. I get no warning and correct code in latest 4.4 branch

[Bug target/45070] Miscompiled c++ class with packed attribute on ARM with -Os optimizations (Qt 4.6.2)

2010-08-03 Thread ian dot bolton at arm dot com
--- Comment #11 from ian dot bolton at arm dot com 2010-08-03 17:13 --- I have regression-tested the patch for gcc and g++ with target=arm-eabi and created a regression testsuite case for it, so I expect to be able to submit both to the mailing list for review in the next day or so

[Bug tree-optimization/44328] switch/case optimization produces an invalid lookup table index

2010-08-02 Thread ian dot bolton at arm dot com
--- Comment #24 from ian dot bolton at arm dot com 2010-08-02 12:23 --- (In reply to comment #23) I can confirm this fails with GCC 4.4.4 and that GCC 4.3.2 works. I get no warning and correct code in latest 4.4 branch (4.4.5 - 20100727), but I do get the warning and incorrect code

[Bug tree-optimization/44328] switch/case optimization produces an invalid lookup table index

2010-08-02 Thread ian dot bolton at arm dot com
--- Comment #25 from ian dot bolton at arm dot com 2010-08-02 13:33 --- (In reply to comment #24) (In reply to comment #23) I can confirm this fails with GCC 4.4.4 and that GCC 4.3.2 works. I get no warning and correct code in latest 4.4 branch (4.4.5 - 20100727), but I do get

[Bug target/40836] ICE: insn does not satisfy its constraints (iwmmxt_movsi_insn)

2010-07-09 Thread ian dot bolton at arm dot com
--- Comment #29 from ian dot bolton at arm dot com 2010-07-09 17:02 --- (In reply to comment #7) When I read the RTL dumps correctly, gcc tries to assign SP to wCGR0. SP is actually the destination here, not the source. This can be done by the tmrc sp, wCGR0 assembly