[Bug target/114741] New: [14 regression] aarch64 sve: unnecessary fmov for scalar int bit operations

2024-04-16 Thread nsz at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- void foo(unsigned i, unsigned *p) { *p = i & 1; } with gcc -march=armv8-a+sve -O2 compiles to foo: fmov

[Bug target/113874] GNU2 TLS descriptor calls do not follow psABI on x86_64-linux-gnu

2024-02-13 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113874 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/112987] [14 Regression][aarch64] ICE in aarch64_do_track_speculation, at config/aarch64/aarch64-speculation.cc:214 since r14-5886-g426fddcbdad674

2024-02-01 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112987 nsz at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED Resolution

[Bug tree-optimization/113552] [11/12/13/14 Regression] vectorizer generates calls to vector math routines with 1 simd lane.

2024-01-23 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113552 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/112987] [14 Regression][aarch64] ICE in aarch64_do_track_speculation, at config/aarch64/aarch64-speculation.cc:214 since r14-5886-g426fddcbdad674

2024-01-17 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112987 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug tree-optimization/111478] [12/13/14 regression] aarch64 SVE ICE: in compute_live_loop_exits, at tree-ssa-loop-manip.cc:250

2023-09-19 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111478 --- Comment #1 from nsz at gcc dot gnu.org --- see also bug 111479

[Bug tree-optimization/111479] New: [12/13 regression] aarch64 SVE ICE: in compute_live_loop_exits, at tree-ssa-loop-manip.cc:248

2023-09-19 Thread nsz at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- maybe related to bug 111478 $ cat bug.c float a, b, c; void *d; int e, f, g; void p

[Bug tree-optimization/111478] New: [12/13/14 regression] aarch64 SVE ICE: in compute_live_loop_exits, at tree-ssa-loop-manip.cc:250

2023-09-19 Thread nsz at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- $ cat bug.c float a, d, e, f, g; int b, c; void h() { for (; b; b++) { for (; c

[Bug target/106671] aarch64: BTI instruction are not inserted for cross-section direct calls

2023-08-15 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671 --- Comment #12 from nsz at gcc dot gnu.org --- (In reply to Jiangning Liu from comment #11) > Hi Wilco, > > > "it means we will need a linker optimization to remove those redundant BTIs > > (eg. by

[Bug target/106671] aarch64: BTI instruction are not inserted for cross-section direct calls

2023-03-23 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/104689] aarch64: libgcc: DW_CFA_val_expression is not supported for RA_SIGN_SATE register

2022-05-25 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104689 nsz at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |13.0 Resolution

[Bug ipa/105160] New: [12 regression] ipa modref marks functions with asm volatile as const or pure

2022-04-05 Thread nsz at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: ipa Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org CC: marxin at gcc dot gnu.org Target Milestone: --- the following code is miscompiled with gcc -O1 #define sysreg_read(regname

[Bug target/104689] New: aarch64: libgcc: DW_CFA_val_expression is not supported for RA_SIGN_SATE register

2022-02-25 Thread nsz at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- gcc emits DW_CFA_AARCH64_negate_ra_state (DW_CFA_window_save) for pac-ret but it's valid to set the RA_SIGN_STATE

[Bug target/102768] [feature request] Add compiler support for aarch64 shadow call stack

2022-02-22 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102768 nsz at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |FIXED Status

[Bug middle-end/104504] New: spurious -Wswitch-unreachable warning with -ftrivial-auto-var-init=zero

2022-02-11 Thread nsz at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- reduced from linux code on which gcc-12 warns now: int foo(int x) { switch(x) { int y; /* spuriously

[Bug target/102768] [feature request] Add support for aarch64 shadow call stack

2021-10-18 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102768 --- Comment #3 from nsz at gcc dot gnu.org --- well, protection mechanisms are rarely equivalent. neither scs nor traditional stack protector are perfect. to me compiler support for freestanding environments such as linux makes sense. i cannot

[Bug target/102768] [feature request] Add support for aarch64 shadow call stack

2021-10-15 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102768 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/100354] New: [9 regression] aarch64: non-deligitimized UNSPEC UNSPEC_TLS (76) found in variable location

2021-04-30 Thread nsz at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- i see this note/warning a lot during an aarch64 glibc build since gcc-9, it seems to require -O -g, and seems

[Bug target/99551] New: aarch64: csel is used for cold scalar computation which affects performance

2021-03-11 Thread nsz at gcc dot gnu.org via Gcc-bugs
: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- this is an optimization bug, i don't know which layer it should be fixed so i report it as target bug. cold path affects

[Bug target/98747] New: aarch64: __ARM_FEATURE_MEMORY_TAGGING is defined on ilp32

2021-01-19 Thread nsz at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- memory tagging intrinsics should be available when arm_acle.h is included and __ARM_FEATURE_MEMORY_TAGGING is defined. memory tagging

[Bug target/98618] aarch64: oob adrp offset causes relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21

2021-01-11 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98618 --- Comment #5 from nsz at gcc dot gnu.org --- (In reply to Wilco from comment #3) > I fixed this in GCC10: > https://gcc.gnu.org/git/?p=gcc.git=commit; > h=7d3b27ff12610fde9d6c4b56abc70c6ee9b6b3db > > So this just needs t

[Bug target/98618] aarch64: oob adrp offset causes relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21

2021-01-11 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98618 --- Comment #4 from nsz at gcc dot gnu.org --- (In reply to Florian Weimer from comment #1) > Is the test case really valid? It involves an out-of-bounds array access, > after all. sorry you are right the indexes are too far, a bette

[Bug target/98618] aarch64: oob adrp offset causes relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21

2021-01-11 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98618 --- Comment #2 from nsz at gcc dot gnu.org --- (In reply to Florian Weimer from comment #1) > Is the test case really valid? It involves an out-of-bounds array access, > after all. no it doesn't, n is signed long and its val

[Bug target/98618] New: aarch64: oob adrp offset causes relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21

2021-01-11 Thread nsz at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- gcc-8 and earlier can generate adrp with out of bounds offset for hidden and local symbols. i haven't yet found

[Bug libgcc/98251] libgcc on 32-bit soft-float ARM narrows -NaN incorrectly

2020-12-17 Thread nsz at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98251 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/97638] New: aarch64: bti c is missing at function entry with branch-protection

2020-10-30 Thread nsz at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- gcc-10 (and trunk) with -mbranch-protection=bti (or standard) fails to generate bti c at function entry in some cases: char *foo (const

[Bug c/97321] New: add warning for pointer casts that may lead to aliasing violation when dereferenced

2020-10-07 Thread nsz at gcc dot gnu.org via Gcc-bugs
Severity: normal Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- consider: int f(unsigned char **); int g(char *p) { return f((unsigned char **)); } such code is almost surely wrong

[Bug target/94891] aarch64: there is no way to strip PAC from a return address in c code

2020-07-16 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94891 nsz at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |11.0 Status

[Bug target/94791] aarch64: -pg profiling is broken with pac-ret

2020-07-16 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94791 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution

[Bug libgcc/96001] aarch64: bti is missing from lse.S when built with branch protection

2020-07-16 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96001 nsz at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |FIXED Target Milestone

[Bug libfortran/95920] Implicit declaration of function 'feenableexcept' in fpu-target.h

2020-07-06 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95920 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC

[Bug tree-optimization/95966] New: soft float operations are not tail called

2020-06-29 Thread nsz at gcc dot gnu.org
-optimization Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- i'd expect this to be a tail call into the soft float add operation on soft float targets: fp_t foo(fp_t a, fp_t b) { return a + b; } e.g. on x86 with 'typedef

[Bug target/94986] missing diagnostic on ARM thumb2 compilation with -pg when using r7 in inline asm

2020-06-03 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94986 --- Comment #5 from nsz at gcc dot gnu.org --- (In reply to Nick Desaulniers from comment #4) > (In reply to nsz from comment #2) > > ideally r7 clobber would just work with -pg -fomit-frame-pointer. > > the alloca problem is a

[Bug target/94986] missing diagnostic on ARM thumb2 compilation with -pg when using r7 in inline asm

2020-06-03 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94986 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/94748] aarch64: many unnecessary bti j emitted

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94748 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution

[Bug target/94697] aarch64: bti j at function start instead of bti c

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697 nsz at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED Resolution

[Bug target/94515] aarch64: broken unwind information for pac-ret

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94515 nsz at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |FIXED Status

[Bug target/94514] aarch64: unwinding across mixed pac-ret and non-pac-ret frames is broken

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94514 nsz at gcc dot gnu.org changed: What|Removed |Added Resolution|--- |FIXED Status

[Bug target/94515] aarch64: broken unwind information for pac-ret

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94515 Bug 94515 depends on bug 94514, which changed state. Bug 94514 Summary: aarch64: unwinding across mixed pac-ret and non-pac-ret frames is broken https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94514 What|Removed

[Bug target/95129] aarch64: make outline-atomics work on non-gnu targets

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95129 --- Comment #1 from nsz at gcc dot gnu.org --- i also opened bug 95128 to just configure the outline-atomics away.

[Bug target/95128] aarch64: configure option for outline-atomics

2020-05-14 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95128 --- Comment #2 from nsz at gcc dot gnu.org --- i also opened bug 95129 to fix the runtime detection.

[Bug target/95129] New: aarch64: make outline-atomics work on non-gnu targets

2020-05-14 Thread nsz at gcc dot gnu.org
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- the initializer in libgcc uses __getauxval which is not available on non-gnu targets so outlining atomics is ineffective. change the runtime lse check in libgcc

[Bug target/95128] New: aarch64: configure option for outline-atomics

2020-05-14 Thread nsz at gcc dot gnu.org
: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- on aarch64, non-gnu targets likely want to turn outline atomics off in their toolchain (since outlining is ineffective without the hwcap based initializer that can select lse

[Bug target/94697] aarch64: bti j at function start instead of bti c

2020-05-07 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697 --- Comment #6 from nsz at gcc dot gnu.org --- this is fixed for gcc 10.1, just not backported yet so i kept the bug open

[Bug target/94891] New: aarch64: there is no way to strip PAC from a return address in c code

2020-04-30 Thread nsz at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- Neither __builtin_return_address nor __builtin_extract_return_address strips the pointer authentication code (PAC) when compiling

[Bug target/94791] New: aarch64: -pg profiling is broken with pac-ret

2020-04-27 Thread nsz at gcc dot gnu.org
: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- int foo(int x) { return x; } gcc -pg -mbranch-protection=pac-ret gives foo: hint25 // paciasp stp x29, x30, [sp, -32]! mov x29, sp

[Bug target/94748] New: aarch64: many unnecessary bti j emitted

2020-04-24 Thread nsz at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- __attribute__((target("branch-protection=bti"))) int foo(void) { label: return 0; } compiles to foo: hint34 // bti c hint36 // bti j mov

[Bug target/94697] aarch64: bti j at function start instead of bti c

2020-04-23 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697 nsz at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |10.0

[Bug target/94729] New: aarch64: __attribute__((target("branch-protection=pac-ret"))) is accepted in ilp32

2020-04-23 Thread nsz at gcc dot gnu.org
Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- -mbranch-protection=pac-ret is not supported in ilp32 so i would expect the related

[Bug target/94697] New: aarch64: bti j at function start instead of bti c

2020-04-21 Thread nsz at gcc dot gnu.org
: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- function that may be indirectly called does not start with bti c: void bar(int *); void *addr; int foo(int x) { label: addr=& bar(); return x; } with -O2 -mbr

[Bug target/94515] aarch64: broken unwind information for pac-ret

2020-04-21 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94515 --- Comment #1 from nsz at gcc dot gnu.org --- i had a fix but it's not enough, so here is another test case: __attribute__((noreturn)) void unwind(void); int bar(void); int global; int foo(int x) { if (x==1) return 2; int y = bar

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2020-04-18 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 nsz at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 Status

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2020-04-18 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 nsz at gcc dot gnu.org changed: What|Removed |Added CC||bugdal at aerifal dot cx

[Bug target/94646] [arm] invalid codegen for conversion from 64-bit int to double hardfloat

2020-04-18 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94646 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution

[Bug target/94515] New: aarch64: broken unwind information for pac-ret

2020-04-07 Thread nsz at gcc dot gnu.org
: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- pac-ret uses the .cfi_window_save directive to toggle between signed/unsigned return address, alternatively .cfi_remember_state and .cfi_restore_state pair can be used to keep

[Bug target/94514] New: aarch64: unwinding across mixed pac-ret and non-pac-ret frames is broken

2020-04-07 Thread nsz at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- libgcc unwinder on aarch64 fails to keep track of pauth state and may try to authenticate return addresses that were not signed

[Bug libgomp/91938] libgomp (and libitm) DSOs are incorrectly built with initial-exec tls-model

2020-01-29 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91938 --- Comment #7 from nsz at gcc dot gnu.org --- (In reply to Martin Liška from comment #6) > Can we close this issue now? as far as *-musl* is concerned the bug is fixed, but e.g. now android uses elf tls too, i'm not sure what happ

[Bug target/92424] [aarch64] Broken code with -fpatchable-function-entry and BTI

2020-01-29 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 nsz at gcc dot gnu.org changed: What|Removed |Added Target|aarch64, x86|aarch64 Status|NEW

[Bug target/93492] New: Broken code with -fpatchable-function-entry and -fcf-protection=full

2020-01-29 Thread nsz at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- x86 version of bug 92424 endbr64 is not right at the function label with -fcf-protection=full -fpatchable-function-entry=1 void f

[Bug target/93455] New: aarch64: Q constraint address is recomputed

2020-01-27 Thread nsz at gcc dot gnu.org
: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- gcc may recompute the address used in a Q constraint (which may be used for atomic load and stores). static volatile int x[1]; int f() { int r; asm volatile

[Bug c/91113] add declare_simd_variant attribute support

2020-01-24 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91113 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution

[Bug target/92424] [aarch64] Broken code with -fpatchable-function-entry and BTI

2020-01-15 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 nsz at gcc dot gnu.org changed: What|Removed |Added Target|aarch64 |aarch64, x86 CC

[Bug target/92822] [10 Regression] testsuite failures on aarch64 after r278938

2019-12-10 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92822 --- Comment #3 from nsz at gcc dot gnu.org --- it seems at least the following neon intrinsics are affected: float32x2_t vmulx_laneq_f32 (float32x2_t, float32x4_t, const int); float32x2_t vmul_laneq_f32 (float32x2_t, float32x4_t, const int

[Bug target/92822] [10 Regression] testsuite failures on aarch64 after r278938

2019-12-10 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92822 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug libgomp/91938] libgomp (and libitm) DSOs are incorrectly built with initial-exec tls-model

2019-12-03 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91938 --- Comment #5 from nsz at gcc dot gnu.org --- Author: nsz Date: Tue Dec 3 11:13:38 2019 New Revision: 278932 URL: https://gcc.gnu.org/viewcvs?rev=278932=gcc=rev Log: musl: Fix invalid tls model in libgomp and libitm PR91938 Musl does

[Bug libgcc/91737] On Alpine Linux (libmusl) a statically linked C++ program which throws the first exception in two threads at the same time can busy spin on shutdown after main().

2019-11-18 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91737 nsz at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |10.0 --- Comment #6 from nsz

[Bug target/65649] gcc generates overlarge constants for microblaze-linux-gnu

2019-11-18 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65649 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org Target

[Bug target/65649] gcc generates overlarge constants for microblaze-linux-gnu

2019-11-15 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65649 --- Comment #7 from nsz at gcc dot gnu.org --- Author: nsz Date: Fri Nov 15 17:39:14 2019 New Revision: 278308 URL: https://gcc.gnu.org/viewcvs?rev=278308=gcc=rev Log: microblaze: fix PR65649 microblaze-linux-musl build fails without

[Bug target/91886] [10 regression] powerpc64 impossible constraint in asm

2019-11-08 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91886 --- Comment #31 from nsz at gcc dot gnu.org --- (In reply to Segher Boessenkool from comment #28) > [ "ws" needs at least a Power7, btw. ] powerpc64le-* implies power8 and that's where this came up.

[Bug target/91886] [10 regression] powerpc64 impossible constraint in asm

2019-11-08 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91886 --- Comment #30 from nsz at gcc dot gnu.org --- i think it is not the end of the world if the asm constraint api changes in this case: fixing musl is easy because it's not super important to optimize fmin, fminf, fmax, fmaxf in libc (if it were

[Bug target/91886] [10 regression] powerpc64 impossible constraint in asm

2019-11-06 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91886 --- Comment #6 from nsz at gcc dot gnu.org --- (In reply to Segher Boessenkool from comment #5) > -- LLVM should support "wa", since that is *the* constraint for VSX > registers. > -- musl should use the "wa"

[Bug target/91886] [10 regression] powerpc64 impossible constraint in asm

2019-10-23 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91886 --- Comment #2 from nsz at gcc dot gnu.org --- note that "ws" is now supported by clang, but "wa" is not.

[Bug target/91886] [10 regression] powerpc64 impossible constraint in asm

2019-10-23 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91886 --- Comment #1 from nsz at gcc dot gnu.org --- seems to be broken since r271916

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2019-10-08 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 --- Comment #9 from nsz at gcc dot gnu.org --- ok i was looking at the wrong code, didn't know libgcc2, i agree that's the right way to fix this.

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2019-10-07 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 --- Comment #7 from nsz at gcc dot gnu.org --- i think the code snippet i posted is more efficient and significantly smaller than using libgcc (which also sounds hard to wire up to do the right thing). the code sequence can possibly be even

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2019-10-03 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 --- Comment #5 from nsz at gcc dot gnu.org --- ok so the real problem is that libgcc does not define FP_INIT_ROUNDMODE and FP_HANDLE_EXCEPTIONS etc for hardfloat arm targets.

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2019-10-02 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 --- Comment #3 from nsz at gcc dot gnu.org --- (In reply to Andreas Schwab from comment #2) > Don't you need #pragma STDC FENV_ACCESS? yes, for iso c conformance you need it, but gcc does not handle it anyway, instead it requires -frounding-m

[Bug target/91970] arm: 64bit int to double conversion does not respect rounding mode

2019-10-02 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91970 --- Comment #1 from nsz at gcc dot gnu.org --- floating-point exceptions are also missing for the same reason.

[Bug target/91970] New: arm: 64bit int to double conversion does not respect rounding mode

2019-10-02 Thread nsz at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- on arm-* with #include #include int main() { long long x = (1LL << 60) - 1; double y; fesetround(FE_DO

[Bug libgomp/91938] libgomp (and libitm) DSOs are incorrectly built with initial-exec tls-model

2019-09-30 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91938 --- Comment #3 from nsz at gcc dot gnu.org --- i opened a glibc bug https://sourceware.org/bugzilla/show_bug.cgi?id=25051 but i think this bug should be kept open for non *-linux*-gnu* targets.

[Bug libgomp/91938] libgomp (and libitm) DSOs are incorrectly built with initial-exec tls-model

2019-09-30 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91938 --- Comment #2 from nsz at gcc dot gnu.org --- if you really want this optimization then libgomp has to do checks to guarantee that the target libc supports this usage and only enable it when it's 100% safe. (e.g. musl or bionic does not support

[Bug libgomp/91938] New: libgomp (and libitm) DSOs are incorrectly built with initial-exec tls-model

2019-09-30 Thread nsz at gcc dot gnu.org
: normal Priority: P3 Component: libgomp Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org CC: jakub at gcc dot gnu.org Target Milestone: --- initial-exec tls is only valid in a dso if there is a guarantee that the dso

[Bug c/82542] -fdump-lang-raw (formerly -fdump-translation-unit) no longer available for C

2019-09-25 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82542 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/91900] New: [10 regression] mipsisa64r6-*-* rejects lo clobber

2019-09-25 Thread nsz at gcc dot gnu.org
: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- mips64 syscall code in musl is like #define __NR_getpid 5038 static inline long __syscall0(long n) { register long r7 __asm__("$7"); register long r2 __asm__

[Bug target/91886] New: [10 regression] powerpc64 impossible register constraint in asm

2019-09-24 Thread nsz at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- this used to work for me: double fmax(double x, double y) { __asm__ ("xsmaxdp %x0, %x1, %x2" : "=ws"(

[Bug c++/91809] New: in c++ bit-field is not promoted to int in printf argument

2019-09-18 Thread nsz at gcc dot gnu.org
Priority: P3 Component: c++ Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- may be a -Wformat bug only, but the c++ front-end seems to use the wrong type: #include struct X { unsigned long long a: 1; } x; void foo

[Bug libgcc/91737] On Alpine Linux (libmusl) a statically linked C++ program which throws the first exception in two threads at the same time can busy spin on shutdown after main().

2019-09-17 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91737 nsz at gcc dot gnu.org changed: What|Removed |Added Status|RESOLVED|NEW Last reconfirmed

[Bug tree-optimization/91723] New: builtin fma is not optimized or vectorized as *+

2019-09-10 Thread nsz at gcc dot gnu.org
: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- i'd expect a*b+c to generate the same code as __builtin_fmaf(a,b,c) when hw instruction is available for fmaf, but the later generates significantly worst code

[Bug lto/91299] LTO inlines a weak definition in presence of a non-weak definition from an ELF file

2019-07-30 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91299 nsz at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed

[Bug c/91113] New: add declare_simd_variant attribute support

2019-07-08 Thread nsz at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- to declare vector functions on aarch64 for one simd architecture only, support for the openmp 5.0 declare variant syntax is required, but full support for the omp declare variant pragma

[Bug fortran/90539] [10 Regression] 481.wrf slowdown by 25% on Intel Kaby with -Ofast -march=native starting with r271377

2019-05-21 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90539 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug middle-end/90478] [10 Regression] ICE in emit_case_dispatch_table at gcc/stmt.c:796

2019-05-16 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90478 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/89628] New: aarch64_vector_pcs does not use v24-v31 as temp regs

2019-03-07 Thread nsz at gcc dot gnu.org
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: nsz at gcc dot gnu.org Target Milestone: --- consider typedef __Float32x4_t vec; __attribute__((aarch64_vector_pcs)) vec f(vec a0, vec a1, vec a2, vec a3, vec a4, vec a5, vec a6, vec a7) { vec t0, t1, t2, t3

[Bug libfortran/78314] [aarch64] ieee_support_halting does not report unsupported fpu traps correctly

2019-02-01 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78314 --- Comment #18 from nsz at gcc dot gnu.org --- (In reply to Christophe Lyon from comment #16) > I've noticed this problem on arm and aarch64 native builds too. > But my cross-compilers (using QEMU as simulator) still pass this test

[Bug libfortran/78314] [aarch64] ieee_support_halting does not report unsupported fpu traps correctly

2019-01-31 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78314 nsz at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|NEW Assignee|nsz

[Bug libfortran/78314] [aarch64] ieee_support_halting does not report unsupported fpu traps correctly

2019-01-31 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78314 --- Comment #14 from nsz at gcc dot gnu.org --- (In reply to Uroš Bizjak from comment #13) > (In reply to nsz from comment #12) > > i don't know how to change this to false for IEEE_SUPPORT_HALTING > > on aarch64 and arm targets,

[Bug libfortran/78314] [aarch64] ieee_support_halting does not report unsupported fpu traps correctly

2019-01-31 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78314 --- Comment #12 from nsz at gcc dot gnu.org --- this got reverted because of bug 88678 and because compile time and runtime support_halting are different. the compile time value is unconditionally true, which is wrong for aarch64 and arm: gcc

[Bug fortran/88678] [9 regression] Many gfortran.dg/ieee/ieee_X.f90 test cases fail starting with r267465

2019-01-31 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88678 --- Comment #21 from nsz at gcc dot gnu.org --- this fix undid the change for bug 78314 do you plan to backport it to gcc 7,8 branches ? note that in principle on targets where trapping is not supported the "immediate alternate exce

[Bug fortran/88678] [9 regression] Many gfortran.dg/ieee/ieee_X.f90 test cases fail starting with r267465

2019-01-31 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88678 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

[Bug target/88954] __attribute__((noplt)) doesn't work with function pointers

2019-01-23 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88954 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org

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