> > Thanks for installing the patch. As you mentioned in the PR, stage1 of
> > GCC 11 is going to close in a few weeks, and GCC Development Plan
> > describes the stage3 as " During this two-month period, the only
> (non-documentation) changes that may be made are changes that fix bugs or
> new
Hi,
> -Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
> Sent: Wednesday, November 4, 2020 12:15 AM
> To: yangyang (ET)
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH 1/5] [PR target/96342] Change field "simdlen" into
>
Hi,
I have revised the patch based on your suggestions. I use multiple_p instead of
!multiple_p if the eq situation is OK to make it easier to understand.
> >> > if (n->simdclone->inbranch)
> >> > this_badness += 2048;
> >> > int target_badness = targetm.simd_clone.usable (n); @@
Hi,
I have revised the patch based on your suggestions, and the following are some
points that I think is needed to be mentioned in the mail.
> > @@ -502,17 +504,18 @@ simd_clone_adjust_return_type (struct
> cgraph_node *node)
> > veclen = node->simdclone->vecsize_int;
> >else
> >
Hi,
This is the first patch for PR96698.
In order to support the generating of SVE functions for "omp declare
simd", this patch changes the type of the field "simdlen" of struct
cgraph_simd_clone from unsigned int to poly_uint64.
Although Richard mentioned in the PR that
Hi,
This is a simple fix for PR96698.
For the test case, there are two PHIs in the inner loop in pass_vect
[local count: 719407024]:
# b_26 = PHI <0(4), b_15(10)>
# c_27 = PHI <0(4), b_26(10)>
c_27 = PHI <0(4), b_26(10)>
> -Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@arm.com]
> Sent: Tuesday, July 21, 2020 2:49 AM
> To: yangyang (ET)
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH PR96195] aarch64: ICE during GIMPLE pass:vect
>
> Sorry for the slow r
Hi,
This is a simple fix for PR96195.
For the test case, GCC generates the following gimple statement in
pass_vect:
vect__21.16_58 = zp.simdclone.2 (vect_vec_iv_.15_56);
The mode of vect__21.16_58 is VNx2SI while the mode of zp.simdclone.2
> On Tue, Jun 30, 2020 at 1:31 PM yangyang (ET)
> wrote:
> >
> > > On Tue, Jun 30, 2020 at 4:29 AM yangyang (ET)
> > >
> > > wrote:
> > > >
> > > > Hi,
> > > >
> > > > > > Hi,
> >
> On Tue, Jun 30, 2020 at 4:29 AM yangyang (ET)
> wrote:
> >
> > Hi,
> >
> > > > Hi,
> > > >
> > > > This is a simple fix for pr95855.
> > > >
> > > > With this fix, pass_split_paths can recogni
Hi,
> > Hi,
> >
> > This is a simple fix for pr95855.
> >
> > With this fix, pass_split_paths can recognize the if-conversion
> opportunity of the testcase and doesn't duplicate the corresponding block.
> >
> > Added one testcase for this. Bootstrap and tested on both aarch64 and
>
Hi,
This is a simple fix for pr95855.
With this fix, pass_split_paths can recognize the if-conversion opportunity
of the testcase and doesn't duplicate the corresponding block.
Added one testcase for this. Bootstrap and tested on both aarch64 and x86
Linux platform, no new
Hi,
> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Tuesday, April 14, 2020 4:44 PM
> To: yangyang (ET)
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH PR94574] ICE during GIMPLE pass: ccp
>
> On Mon, Apr 13, 2020
Hi,
This is a simple fix for pr94574.
testcase testsuite/gcc.target/aarch64/sve/acle/general/deref_1.c ICEs when
testing GCC trunk with -O2 -msve-vector-bits=256 -march=armv8.2-a+sve.
There is a gimple statement before the ccp pass as follow:
MEM[(svuint32_t *)] = _2;
The ccp pass
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