Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-05-28 Thread Umesh Kalappa
Ok, thanks for the clarification jakub. Umesg On Mon, May 7, 2018, 2:08 PM Jakub Jelinek wrote: > On Mon, May 07, 2018 at 01:58:48PM +0530, Umesh Kalappa wrote: > > CCed Jakub, > > > > Agree that float division don't touch memory ,but fdiv result (stack > > > register ) is stored back to a

Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-05-07 Thread Jakub Jelinek
On Mon, May 07, 2018 at 01:58:48PM +0530, Umesh Kalappa wrote: > CCed Jakub, > > Agree that float division don't touch memory ,but fdiv result (stack > > register ) is stored back to a memory i.e fResult . That doesn't really matter. It is stored to a stack spill slot, something that doesn't

Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-05-07 Thread Umesh Kalappa
CCed Jakub, > Hi Alex, > Agree that float division don't touch memory ,but fdiv result (stack > register ) is stored back to a memory i.e fResult . > > So compiler barrier in the inline asm i.e ::memory should prevent the > shrinkage of instructions like "fstps fResult(%rip)"behind the

Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-05-04 Thread Umesh Kalappa
Hi Alex , Agree that float division don't touch memory ,but fdiv result (stack register ) is stored back to a memory i.e fResult . So compiler barrier in the inline asm i.e ::memory should prevent the shrinkage of instructions like "fstps fResult(%rip)"behind the fence ? BTW ,if we

Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-04-13 Thread Jakub Jelinek
On Fri, Apr 13, 2018 at 01:34:21PM +, Vivek Kinhekar wrote: > Hello Alexander, > > In the given testcase, the generated fdivrs instruction performs the > division of a symbol ref (memory value) by FPU Stack Register and stores > the value in FPU Stack Register. The stack registers are not

RE: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-04-13 Thread Vivek Kinhekar
nu.org Subject: Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction On Fri, Apr 13, 2018 at 01:34:21PM +, Vivek Kinhekar wrote: > Hello Alexander, > > In the given testcase, the generated fdivrs instruction performs the > division of a sy

RE: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-04-13 Thread Vivek Kinhekar
t; Sent: Friday, April 13, 2018 5:58 PM To: Vivek Kinhekar <vivek.kinhe...@blackfigtech.com> Cc: gcc@gcc.gnu.org Subject: Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction On Fri, 13 Apr 2018, Vivek Kinhekar wrote: > The mfence instructio

RE: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-04-13 Thread Vivek Kinhekar
GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction On Fri, 13 Apr 2018, Vivek Kinhekar wrote: > The mfence instruction with memory clobber asm instruction should > create a barrier between division and printf instructions. No, floating-point division does no

Re: GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-04-13 Thread Alexander Monakov
On Fri, 13 Apr 2018, Vivek Kinhekar wrote: > The mfence instruction with memory clobber asm instruction should create a > barrier between division and printf instructions. No, floating-point division does not touch memory, so the asm does not (and need not) restrict its motion. Alexander

GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

2018-04-13 Thread Vivek Kinhekar
Hi, We are trying to create a memory barrier with following testcase. = #include void Test() { float fDivident = 0.1f; float fResult = 0.0f; fResult = ( fDivident / fResult ); __asm volatile ("mfence" ::: "memory"); printf("\nResult: %f\n",