On Fri, Jul 29, 2016 at 11:05:13AM +0200, Georg-Johann Lay wrote:
> There might still problems linger around if hard-regs are used:
>
> Suppose we set the reg in DImode and then get_last_value is called for the
> same reg in SImode. Using the DI value might be wrong, e.g. if it is used
> to com
On 29.07.2016 09:47, Segher Boessenkool wrote:
Hi Johann,
I tested a variant of your patch, building Linux for 32 different
(sub-)architectures; surprisingly (to me) there are no regressions
at all.
I am not so surprised because most backends don't make such an intense use of
hard-regs like t
Hi Johann,
I tested a variant of your patch, building Linux for 32 different
(sub-)architectures; surprisingly (to me) there are no regressions
at all.
Do you want to send it to gcc-patches?
Segher
diff --git a/gcc/combine.c b/gcc/combine.c
index 77e0d2b..750bf83 100644
--- a/gcc/combine.c
++
On Wed, Jul 27, 2016 at 09:14:27PM +0200, Georg-Johann Lay wrote:
> >diff --git a/gcc/combine.c b/gcc/combine.c
> >index 77e0d2b..dec6226 100644
> >--- a/gcc/combine.c
> >+++ b/gcc/combine.c
> >@@ -9977,6 +9977,9 @@ reg_num_sign_bit_copies_for_combine (const_rtx x,
> >machine_mode mode,
> >
Segher Boessenkool schrieb:
On Tue, Jul 26, 2016 at 03:38:18PM +0200, Georg-Johann Lay wrote:
@@ -13206,6 +13206,13 @@ get_last_value (const_rtx x)
&& DF_INSN_LUID (rsp->last_set) >= subst_low_luid)
return 0;
+ /* If the lookup is for a hard register make sure that value contains
at
On Tue, Jul 26, 2016 at 03:38:18PM +0200, Georg-Johann Lay wrote:
> >>@@ -13206,6 +13206,13 @@ get_last_value (const_rtx x)
> >> && DF_INSN_LUID (rsp->last_set) >= subst_low_luid)
> >> return 0;
> >>
> >>+ /* If the lookup is for a hard register make sure that value contains
> >>at
> >>
On 26.07.2016 14:51, Segher Boessenkool wrote:
On Tue, Jul 26, 2016 at 02:14:49PM +0200, Georg-Johann Lay wrote:
which returns const0_rtx because reg 18 is set in insn 43 to const0_rtx.
Total outcome is that the right shift of reg:DI 18 is transformed to a
no-op move and cancelled out in the rem
On Tue, Jul 26, 2016 at 02:14:49PM +0200, Georg-Johann Lay wrote:
> >>which returns const0_rtx because reg 18 is set in insn 43 to const0_rtx.
> >>Total outcome is that the right shift of reg:DI 18 is transformed to a
> >>no-op move and cancelled out in the remainder.
> >
> >Why does num_sign_bit_c
On 25.07.2016 23:05, Segher Boessenkool wrote:
On Mon, Jul 25, 2016 at 02:28:28PM +0200, Georg-Johann Lay wrote:
(insn 43 31 44 2 (set (reg:QI 18 r18)
(const_int 0 [0])) bug-combin.c:29 56 {movqi_insn}
(nil))
(insn 51 50 52 2 (set (reg:QI 16 r16)
(const_int 40 [0x28])) bu
On Mon, Jul 25, 2016 at 02:28:28PM +0200, Georg-Johann Lay wrote:
> (insn 43 31 44 2 (set (reg:QI 18 r18)
> (const_int 0 [0])) bug-combin.c:29 56 {movqi_insn}
> (nil))
> (insn 51 50 52 2 (set (reg:QI 16 r16)
> (const_int 40 [0x28])) bug-combin.c:29 56 {movqi_insn}
> (nil)
Tracking this wrong-code bug, I ended up in combine.c::get_last_value() which
returns a wrong result. gcc generates wrong code at least with: 4.9 head, 5.2,
6.1 and trunk from today.
Before combine we have:
(insn 43 31 44 2 (set (reg:QI 18 r18)
(const_int 0 [0])) bug-combin.c:29 56 {m
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