Hello,
I have been trying to understand why IRA is marking a register to conflict with
a hard register but can't find a good explanation.
Before IRA pass I have the following insn chain in bb2:
(insn 15 16 21 2 (set (reg/v/f:SI 122 [ pdata ])
(reg:SI 0 r0 [ pdata ])) ../src/bdv258_limt_process.c:66 481 {fp_movsi}
(expr_list:REG_DEAD (reg:SI 0 r0 [ pdata ])
(nil)))
(insn 21 15 20 2 (set (reg:HI 123 [ MEM[(struct limt_state *)pdata_5(D)].lime ])
(mem:HI (plus:SI (reg/v/f:SI 122 [ pdata ])
(const_int 44 [0x2c])) [4 MEM[(struct limt_state
*)pdata_5(D)].lime+0 S2 A32])) ../src/bdv258_limt_process.c:87 484 {fp_movhi}
(nil))
(insn 20 21 22 2 (set (reg/v:SI 105 [ blk_sz ])
(mem:SI (plus:SI (reg/v/f:SI 122 [ pdata ])
(const_int 16 [0x10])) [2 MEM[(struct limt_state
*)pdata_5(D)].blk_sz+0 S4 A32])) ../src/bdv258_limt_process.c:84 481 {fp_movsi}
(nil))
(insn 22 20 23 2 (set (reg:BI 124)
(ne:BI (reg:HI 123 [ MEM[(struct limt_state *)pdata_5(D)].lime ])
(const_int 0 [0]))) ../src/bdv258_limt_process.c:87 1368
{cmp_himode}
(expr_list:REG_DEAD (reg:HI 123 [ MEM[(struct limt_state
*)pdata_5(D)].lime ])
(nil)))
(jump_insn 23 22 24 2 (set (pc)
(if_then_else (ne (reg:BI 124)
(const_int 0 [0]))
(label_ref 56)
(pc))) ../src/bdv258_limt_process.c:87 1459 {cbranchbi4}
(expr_list:REG_DEAD (reg:BI 124)
(expr_list:REG_BR_PROB (const_int 3900 [0xf3c])
(expr_list:REG_PRED_WIDTH (const_int 2 [0x2])
(nil))))
It starts by moving r0 to r122 and then using r122 as base register of address.
The problem is that IRA allocated r122 to r10 and r123 to r0. Therefore in the
postreload phase, insn 21 will have r10 changed to r0 ending up like: r0 <- mem
(r0 + 16) but r10 will still use r10.
It would be better to have r122 allocated to r0, and then the postreload could
replace r122 by r0 in the address expressions and eliminate r15.
This is what happens if I specify -fira-loop-pressure (and that's how I came to
the other thread where I mention it).
Without -fira-loop-pressure I see the following conflicts for r122:
;; a1(r122,l0) conflicts: a0(r107,l0) a2(r136,l0) a3(r135,l0) a4(r137,l0)
a6(r134,l0) a7(r133,l0) a8(r111,l0) a5(r105,l0) a9(r125,l0) a11(r124,l0)
a12(r123,l0) a21(r120,l0) a22(r119,l0) a23(r114,l0) a24(r118,l0) a25(r117,l0)
a26(r113,l0) a28(r116,l0)
;; total conflict hard regs: 0 20-25
;; conflict hard regs: 0 20-25
Why is r122 conflicting with r0? r0 is dead in insn 21, I can't see a reason
for conflict.
Is there something I am missing?
Cheers,
Paulo Matos
