2007/9/26, Jim Wilson [EMAIL PROTECTED]:
On Tue, 2007-09-25 at 15:13 +0800, 吴曦 wrote:
propagate_one_insn), I don't understand why GCC fails the computation
of liveness if there is no optimization flag :-(.
There is probably something else happening with -O that is recomputing
some liveness
On Wed, 2007-09-26 at 23:35 +0800, 吴曦 wrote:
Thanks, it's the problem of pass_stack_adjustments.
pass_stack_adjustments isn't in gcc-4.2.x; it is only on mainline. But
the flow stuff you are using isn't on mainline anymore since the
dataflow merge. Maybe you are using a month or two old
2007/9/25, Jim Wilson [EMAIL PROTECTED]:
ÎâêØ wrote:
(define_insn *shift_predicate_cmp
[(set (const_int 0)
(and:BI (and:BI (match_operand:BI 1 register_operand c)
(and:BI (match_operand:DI 2 gr_reg_or_8bit_adjusted_operand
rL)
(match_operand:DI 3
On Tue, 2007-09-25 at 15:13 +0800, 吴曦 wrote:
propagate_one_insn), I don't understand why GCC fails the computation
of liveness if there is no optimization flag :-(.
There is probably something else happening with -O that is recomputing
some liveness or CFG info. For instance, the flow2 pass
ÎâêØ wrote:
(define_insn *shift_predicate_cmp
[(set (const_int 0)
(and:BI (and:BI (match_operand:BI 1 register_operand c)
(and:BI (match_operand:DI 2 gr_reg_or_8bit_adjusted_operand rL)
(match_operand:DI 3 gr_register_operand r)))
Hi.
I am working on Itanium architecture and GCC-4.1.1.
I modify the machine description file ia64.md to support single
predicate set instruction such as:
(%0) cmp.ne %1, p0 = %2, %3
here %0 and %1 are predicates, %2 is a register or immediate, %3 is a
register operand.
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