On 9/26/18 8:00 AM, Jason Merrill wrote:
On Mon, Sep 3, 2018 at 5:04 PM, Tim van Deurzen wrote:
I must confess that in the last months I've not been able to find much time
(I do this in my spare time) to work on this. Part of the problem is also
that my new employer hasn't yet provided a
Dear GCC developers,
I would just like to say a massive thanks for the work that led to the
development of the Quadmath libraries. I have been doing my own research
project with Matlab and last Christmas I ran out of numbers. I have developed a
set of formulae that relate Planck’s constant,
Snapshot gcc-7-20180927 is now available on
ftp://gcc.gnu.org/pub/gcc/snapshots/7-20180927/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 7 SVN branch
with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-7
On Wed, Sep 26, 2018 at 11:46 AM Martin Liška wrote:
>
> On 9/25/18 12:21 AM, Alexander Monakov wrote:
> > Hello,
> >
> > Here's the promised "libgcov summary"; sorry about the delay.
>
> Thank you Alexander, I take it as productive discussion starting point.
>
> >
> > So libgcov has a bit
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87459
Bug ID: 87459
Summary: -Wunused-variable: False positive for associated
variables
Product: gcc
Version: 8.2.1
Status: UNCONFIRMED
Keywords: diagnostic
On Thu, Sep 27, 2018 at 07:08:41PM -0400, Marek Polacek wrote:
> > This patch is OK. And your suggestion for cxx_eval_call_expression
> > sounds right, too. Marek, will you follow up on that?
>
> Ok, I will (provided I can get a box that has TARGET_VTABLE_USES_DESCRIPTORS,
> I
> think ppc64 BE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86957
Martin Liška changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Andrew Stubbs writes:
> On 26/09/18 17:48, Richard Sandiford wrote:
>> Andrew Stubbs writes:
>>> + /* Nested vec_merge. */
>>> + rtx nvm = gen_rtx_VEC_MERGE (mode, vm1, vm2, mask1);
>>> + ASSERT_EQ (vm1, simplify_merge_mask (nvm, mask1, 0));
>>> + ASSERT_EQ (vm2, simplify_merge_mask (nvm,
On Wed, 26 Sep 2018, Qing Zhao wrote:
> I don’t think a -Os-like option will do the job.
>
> As Jeff already mentioned in a very previous email:
>
> “Presumably one of the cases where this capability is really helpful is
> things like ksplice. If you have a function with global scope that has
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85241
Paolo Carlini changed:
What|Removed |Added
Blocks||67491
--- Comment #3 from Paolo Carlini
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85229
Paolo Carlini changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67544
--- Comment #1 from paolo at gcc dot gnu.org ---
Author: paolo
Date: Thu Sep 27 09:53:08 2018
New Revision: 264665
URL: https://gcc.gnu.org/viewcvs?rev=264665=gcc=rev
Log:
2018-09-27 Paolo Carlini
PR c++/67544
*
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87448
--- Comment #2 from martin ---
Originally I came across this problem in a large module with a slightly more
complex function with gfortran-7.3.0 (standard version from ubuntu 18.4). I got
the same bogus error, which Janus has seen for this
Hi.
I've noticed ASAN can inform user about location of stack variables
when a stack violation is detected.
Sample example:
...
This frame has 3 object(s):
[32, 36) 'counter' (line 3) <== Memory access at offset 36 overflows this
variable
[96, 100) 'size' (line 5)
[160, 164)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87451
Bug ID: 87451
Summary: [9 Regression] FAIL: gcc.dg/debug/dwarf2/inline5.c on
aarch64 and arm
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87446
Martin Liška changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87442
--- Comment #4 from Martin Liška ---
Maybe the other way around:
-fprofile-filter-files
-fprofile-exclude-files
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87446
Richard Biener changed:
What|Removed |Added
Target Milestone|--- |7.4
--- Comment #2 from Richard Biener
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81797
--- Comment #67 from Chris Johns ---
(In reply to Jonathan Wakely from comment #66)
> Yes, I was afraid the RTEMS failures might be a different problem.
>
> Are the symptoms the same? i.e. missing C++ standard library headers?
>
Yes it seems
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84940
--- Comment #6 from paolo at gcc dot gnu.org ---
Author: paolo
Date: Thu Sep 27 08:33:41 2018
New Revision: 264664
URL: https://gcc.gnu.org/viewcvs?rev=264664=gcc=rev
Log:
/cp
2018-09-27 Paolo Carlini
PR c++/84940
*
Hi Thomas,
On 26/09/18 18:39, Thomas Preudhomme wrote:
Hi,
GCC ICEs under -mslow-flash-data and -mword-relocations because there
is no way to load an address, both literal pools and MOVW/MOVT being
forbidden. This patch gives an error message when both options are
specified by the user and
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84810
Paolo Carlini changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
Hi All,
It turns out the testsuite didn't have a case in it which would cause a
significant enough spill to enter the loop. After creating one I noticed a bug
in the loop and fixed it.
The loops are now
.cfi_startproc
mov x15, sp
cntbx16, all, mul #11
On 27/09/18 11:13, Ramana Radhakrishnan wrote:
On 27/09/2018 09:26, Kyrill Tkachov wrote:
Hi Thomas,
On 26/09/18 18:39, Thomas Preudhomme wrote:
Hi,
GCC ICEs under -mslow-flash-data and -mword-relocations because there
is no way to load an address, both literal pools and MOVW/MOVT being
On Wed, Sep 26, 2018 at 8:11 PM H.J. Lu wrote:
>
> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
> zero_caller_saved_regs("skip|used|all") function attribue:
>
> 1. -mzero-caller-saved-regs=skip and zero_caller_saved_regs("skip")
>
> Don't zero caller-saved integer
> It turns out the testsuite didn't have a case in it which would cause a
> significant enough spill to enter the loop. After creating one I noticed a
> bug
> in the loop and fixed it.
>
> The loops are now
>
> .cfi_startproc
> mov x15, sp
> cntbx16, all, mul #11
On Wed, 26 Sep 2018 10:59:02 +0200
Martin Liška wrote:
> On 9/25/18 3:34 PM, Jeff Law wrote:
> > On 9/25/18 6:19 AM, Richard Biener wrote:
> >> On Tue, Sep 25, 2018 at 9:09 AM Martin Liška
> >> wrote:
> >>>
> >>> On 9/24/18 4:42 PM, Jeff Law wrote:
> On 9/22/18 1:08 PM, marxin wrote:
Hi Steve,
On 26/09/18 15:44, Steve Ellcey wrote:
The patch for PR rtl-optimization/85160 which allowed combine to convert
two instructions into two different instructions if they had a lower cost
caused a couple of regressions on aarch64. This patch fixes one of them.
After the above patch,
Tamar Christina writes:
> The 09/27/2018 09:40, Richard Sandiford wrote:
>> Tamar Christina writes:
>> > @@ -120,22 +121,41 @@ proc check_cached_effective_target { prop args } {
>> > global et_prop_list
>> >
>> > set target [current_target_name]
>> > -if {![info exists
On 26/09/18 17:25, Richard Sandiford wrote:
OK, thanks.
Committed, thanks.
Andrew
Hi,
(this message is a part of the thread originating with
https://gcc.gnu.org/ml/gcc-patches/2018-09/msg01018.html)
On Thu, Sep 27 2018, Jan Hubicka wrote:
>> > If you make this to be INTERPOSABLE (which means it can be replaced by
>> > different
>> > implementation by linker and that is
On Mon, Sep 24, 2018 at 12:58 PM Alastair McKinstry
wrote:
>
>
> On 23/09/2018 10:46, Toon Moene wrote:
> > On 09/22/2018 01:23 AM, Jerry DeLisle wrote:
> >
> > I just installed opencoarrays on my system at home (Debian Testing):
> >
> > root@moene:~# apt-get install libcoarrays-openmpi-dev
> >
On Thu, Sep 27, 2018 at 3:52 AM, Richard Biener
wrote:
> On Wed, Sep 26, 2018 at 8:11 PM H.J. Lu wrote:
>>
>> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
>> zero_caller_saved_regs("skip|used|all") function attribue:
>>
>> 1. -mzero-caller-saved-regs=skip and
On 26/09/2018 06:03, rth7...@gmail.com wrote:
From: Richard Henderson
ARMv8.1 adds an (mandatory) Atomics extension, also known as the
Large System Extension. Deploying this extension at the OS level
has proved challenging.
The following is the result of a conversation between myself,
Alex
On 26/09/18 19:10, H.J. Lu wrote:
Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
zero_caller_saved_regs("skip|used|all") function attribue:
1. -mzero-caller-saved-regs=skip and zero_caller_saved_regs("skip")
Don't zero caller-saved integer registers upon function return.
Hi Richard,
I don't have any comment on the overall aim of the patch series, but in
this particular
patch implementing casp it looks like you doesn't ensure the register
pairs for casp are
even-odd.
This is the restriction in the Arm Arm decode for casp variants as
if Rs<0> == '1' then
On 9/27/18 12:14 PM, Martin Liška wrote:
> On 9/27/18 11:47 AM, Richard Biener wrote:
>> On Mon, Sep 24, 2018 at 9:14 PM Indu Bhagat wrote:
>>>
>>> Done. Attached is updated patch.
>>>
>>> Patch is tested on x86_64
>>
>> You obviously did _not_ properly test the patch since it causes a
>> bunch
Changelog:
For C++2a Support:
Add header in libstdc++ top level (From C++2a Working Draft)
If __cplusplus is greater than 201703L (indicates C++2a):
To namespace std, add span class.
The Definition of span used is
https://en.cppreference.com/w/cpp/container/span.
Notes:
Current Static-Extent
On Thu, Sep 27, 2018 at 6:08 AM, Szabolcs Nagy wrote:
> On 26/09/18 19:10, H.J. Lu wrote:
>>
>> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
>> zero_caller_saved_regs("skip|used|all") function attribue:
>>
>> 1. -mzero-caller-saved-regs=skip and
On Thu, Sep 27, 2018 at 3:28 AM, Richard Biener wrote:
> On Wed, 26 Sep 2018, Jason Merrill wrote:
>
>> On Wed, Sep 26, 2018 at 9:35 AM, Richard Biener wrote:
>> >
>> > We do not create a DW_AT_lexical_block for the outermost block in
>> > functions but we do for DW_AT_inlined_subroutines. That
[PATCH][GCC][AARCH64] Introduce aarch64 atomic_{load,store}ti patterns
In Armv8.4-a these patterns use the LDP/STP instructions that are guaranteed to
be single-copy atomic, ensure correct memory ordering semantics by using
the DMB instruction.
We put the use of these inline expansions behind a
On Thu, 2018-09-27 at 09:46 +0200, Martin Liška wrote:
> Hi.
>
> For some time we've been providing an intermediate format as
> output of GCOV tool. It's documented in our code that primary
> consumer of it is lcov. Apparently that's not true:
>
On Wed, Sep 26, 2018 at 11:10:29AM -0700, H.J. Lu wrote:
> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
> zero_caller_saved_regs("skip|used|all") function attribue:
Minor nit, but could this be named -mzero-call-clobbered-regs?
"Caller-saved" is a misnomer and inconsistent
Hello,
LSE instructions like casp require even-odd pairs of registers.
Other instructions that take a pair of registers don't have this restriction.
As mentioned in the internals documentation, a limitation of forcing a register
pair to start with an even register can't be enforced by defining
On 27/09/18 08:16, Richard Sandiford wrote:
On keeping the complexity down:
if (side_effects_p (x))
return NULL_RTX;
makes this quadratic for chains of unary operations. Is it really
needed? The code after it simply recurses on operands and doesn't
discard anything itself, so it
> >
> > The error you would get if you do this is very confusing so I thought
> > since it didn't matter much for the regexp only target triple tests
> > that just accepting this would be fine.
>
> Seems a good thing that that's a noisy failure; the function should
> make up its mind whether it
differen comment chars.
Tested on x86_64-unknown-linux-gnu, applied.
Richard.
2018-09-27 Richard Biener
PR testsuite/87451
* gcc.dg/debug/dwarf2/inline5.c: Deal with different comment characters.
Index: gcc/testsuite/gcc.dg/debug/dwarf2/inline5.c
On Thu, Sep 27, 2018 at 3:10 PM Martin Liška wrote:
>
> On 9/27/18 12:14 PM, Martin Liška wrote:
> > On 9/27/18 11:47 AM, Richard Biener wrote:
> >> On Mon, Sep 24, 2018 at 9:14 PM Indu Bhagat wrote:
> >>>
> >>> Done. Attached is updated patch.
> >>>
> >>> Patch is tested on x86_64
> >>
> >> You
On Thu, Sep 27, 2018 at 3:16 PM H.J. Lu wrote:
>
> On Thu, Sep 27, 2018 at 6:08 AM, Szabolcs Nagy wrote:
> > On 26/09/18 19:10, H.J. Lu wrote:
> >>
> >> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
> >> zero_caller_saved_regs("skip|used|all") function attribue:
> >>
> >>
> Am 27.09.2018 um 15:07 schrieb Ramana Radhakrishnan
> :
>
>> On 26/09/2018 06:03, rth7...@gmail.com wrote:
>> From: Richard Henderson
>> ARMv8.1 adds an (mandatory) Atomics extension, also known as the
>> Large System Extension. Deploying this extension at the OS level
>> has proved
I had a superfluous #include in the testcase and some
spelling mistakes in documentation -- corrected patch attached.
On 27/09/18 15:02, Matthew Malcomson wrote:
Hello,
LSE instructions like casp require even-odd pairs of registers.
Other instructions that take a pair of registers don't have
Tamar Christina writes:
>> >
>> > The error you would get if you do this is very confusing so I thought
>> > since it didn't matter much for the regexp only target triple tests
>> > that just accepting this would be fine.
>>
>> Seems a good thing that that's a noisy failure; the function should
Andrew Stubbs writes:
> On 27/09/18 08:16, Richard Sandiford wrote:
>> On keeping the complexity down:
>>
>>if (side_effects_p (x))
>> return NULL_RTX;
>>
>> makes this quadratic for chains of unary operations. Is it really
>> needed? The code after it simply recurses on operands and
> On Sep 27, 2018, at 2:45 AM, Richard Biener wrote:
>
> On Wed, 26 Sep 2018, Qing Zhao wrote:
>
>>
>>> On Sep 26, 2018, at 6:07 PM, Alexander Monakov wrote:
>>>
>>> On Wed, 26 Sep 2018, Qing Zhao wrote:
The request is for application developers who want to use gcc's online
> On Sep 27, 2018, at 3:58 AM, Jan Hubicka wrote:
>
>>
>> Okay, I see.
>>
>>>
>>> If you make this to be INTERPOSABLE (which means it can be replaced by
>>> different
>>> implementation by linker and that is probably what we want for live
>>> patching)
>>> then also inliner, ipa-sra and
On 9/27/18 6:04 AM, Matthew Malcomson wrote:
> Hi Richard,
>
>
> On 26/09/18 06:03, rth7...@gmail.com wrote:
>> From: Richard Henderson
>>
>> This pattern will only be used with the __sync functions, because
>> we do not yet have a bare TImode atomic load.
>>
>>
> I don't have any comment on
Thanks, Martin, for all these interesting information.
Looks like that a more general option to help live-patching is needed.
I will do a little more study on this direction.
Qing
> On Sep 27, 2018, at 7:19 AM, Martin Jambor wrote:
>
> Hi,
>
> (this message is a part of the thread
On 9/27/18 6:07 AM, Ramana Radhakrishnan wrote:
> I do have an additional concern that I forgot to mention in Vancouver -
>
> Thanks Wilco for reminding me that this now replaces a bunch of inline
> instructions with effectively a library call therefore clobbering a whole
> bunch
> of caller
On 27/09/18 17:32, Richard Henderson wrote:
On 9/27/18 6:04 AM, Matthew Malcomson wrote:
Hi Richard,
On 26/09/18 06:03, rth7...@gmail.com wrote:
From: Richard Henderson
This pattern will only be used with the __sync functions, because
we do not yet have a bare TImode atomic load.
I
The popcount expansion uses SIMD instructions acting on 64-bit values.
As a result a popcount of a 32-bit integer requires zero-extension before
moving the zero-extended value into an FP register. This patch adds
support for zero-extended int->FP moves to avoid the redundant uxtw.
Similarly, add
Hi!
I've committed following patch to add WIP task reduction support to GCC.
Right now it is only supported for task_reduction clauses on taskgroup
directive and matching in_reduction clauses on task directives.
When registering the reductions, the runtime allocates memory holding array
of
On 9/26/18 5:54 PM, Martin Sebor wrote:
> The attached patch adds attributes nonnull and pure to
> tree_to_shwi() and a small number of other heavily used functions
> that will benefit from both.
>
> First, I noticed that there are a bunch of functions in tree.c that
> deal gracefully with null
On Wed, 26 Sep 2018 at 17:26, Martin Jambor wrote:
>
> Hi,
>
> On Wed, Sep 26 2018, Christophe Lyon wrote:
> > On Tue, 25 Sep 2018 at 17:50, Martin Jambor wrote:
> >>
> >> Hi,
> >>
> >> On Mon, Sep 24 2018, Christophe Lyon wrote:
> >> > On Mon, 24 Sep 2018 at 20:46, Martin Jambor wrote:
> >> >>
Hi Joseph,
On Wed, 26 Sep 2018 at 23:15, Joseph Myers wrote:
>
> In C11, implicit conversions from integer to floating-point types
> produce results with the range and precision of the corresponding
> evaluation format rather than only those of the type implicitly
> converted to. This patch
* H. J. Lu:
> +@item zero_caller_saved_regs("@var{choice}")
> +@cindex @code{zero_caller_saved_regs} function attribute, x86
> +On x86 targets, the @code{zero_caller_saved_regs} attribute causes the
> +compiler to zero caller-saved integer registers at function return with
> +@var{choice}.
On Thu, 27 Sep 2018, Christophe Lyon wrote:
> After this patch I've noticed regressions on
> fp-int-convert-float16-timode.c
> gcc.dg/torture/fp-int-convert-float16.c
> on aarch64 and arm (at execution time)
Does this patch help?
Index: gcc/testsuite/gcc.dg/torture/fp-int-convert.h
On Thu, Sep 27, 2018 at 7:57 AM, Richard Biener
wrote:
> On Thu, Sep 27, 2018 at 3:16 PM H.J. Lu wrote:
>>
>> On Thu, Sep 27, 2018 at 6:08 AM, Szabolcs Nagy wrote:
>> > On 26/09/18 19:10, H.J. Lu wrote:
>> >>
>> >> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
>> >>
On Thu, Sep 27, 2018 at 07:38:20PM +0200, Jakub Jelinek wrote:
> task-reduction-5.C testcase still fails, need to fix up passing of the
> remapped original address properly even for C/C++ array reductions.
Fixed thusly, committed to gomp-5_0-branch.
2018-09-27 Jakub Jelinek
*
This deletes most HAVE_AS_* that determine if the assembler supports
some ISA level (and also HAVE_AS_MFPGPR and HAVE_AS_DFP).
These are not useful: we will only generate an instruction that requires
some newer ISA if the user specifically asked for it (with -mcpu=, say).
If the assembler cannot
On Thu, Sep 27, 2018 at 12:24 PM, Florian Weimer wrote:
> * H. J. Lu:
>
>> +@item zero_caller_saved_regs("@var{choice}")
>> +@cindex @code{zero_caller_saved_regs} function attribute, x86
>> +On x86 targets, the @code{zero_caller_saved_regs} attribute causes the
>> +compiler to zero caller-saved
On Thu, Sep 27, 2018 at 7:01 AM, Rich Felker wrote:
> On Wed, Sep 26, 2018 at 11:10:29AM -0700, H.J. Lu wrote:
>> Add -mzero-caller-saved-regs=[skip|used|all] command-line option and
>> zero_caller_saved_regs("skip|used|all") function attribue:
>
> Minor nit, but could this be named
This is actually an unused register, there is no point to define it.
2018-09-27 Uros Bizjak
* config/i386/i386.md (FPCR_REG): Remove.
(x86_fnstcw_1): Use (const_int 0) instead of FPCR_REG.
(x86_fldcw_1): Remove insn pattern.
(fnstenv): Do not clobber FPCR_REG.
(fldenv):
On Wed, Sep 26, 2018 at 5:18 PM, Ian Lance Taylor wrote:
> On Wed, Sep 26, 2018 at 12:57 AM, Uros Bizjak wrote:
>>> I've committed a patch to update libgo to the 1.11 release. As usual
>>> for these updates, the patch is too large to attach to this e-mail
>>> message. I've attached some of the
On Sep 26, 2018, Pierre-Marie de Rodat wrote:
> This will allow us to remove the import of flag_compare_debug in
> lib-writ.adb in a second stage.
And here's the second stage. Tested on x86_64-linux-gnu. Ok to install?
[Ada] use -gnatd_A to disable .ali on -fcompare-debug recompile
From:
On 27/09/18 17:19, Richard Sandiford wrote:
But we wouldn't recurse for PRE_INC, MEM or ASM_OPERANDS, since they
have the wrong rtx class. AFAICT no current unary, binary or ternary
operator has that level of side-effect (and that's a good thing).
OK, in that case I'll remove it and we can
On 17/09/18 10:18, Richard Sandiford wrote:
The idea looks good to me FWIW, but you can't use curr_static_id for
the state, since that's a static description of the .md pattern rather
than data about this particular instance.
I clearly misunderstood what that was for.
This patch does the same
This fixed the one remaining case where the stricter vec_splat checking
complains in the testsuite.
Committing.
2018-09-27 Segher Boessenkool
gcc/testsuite/
* g++.dg/ext/altivec-6.C: Change the vec_splat second argument to a
valid value, in the "vector bool int" case.
---
On 09/27/2018 12:25 PM, Jeff Law wrote:
On 9/26/18 5:54 PM, Martin Sebor wrote:
The attached patch adds attributes nonnull and pure to
tree_to_shwi() and a small number of other heavily used functions
that will benefit from both.
First, I noticed that there are a bunch of functions in tree.c
On Thu, Sep 27, 2018 at 01:15:46AM -0400, Jason Merrill wrote:
> On Thu, Sep 20, 2018 at 5:20 AM, Jakub Jelinek wrote:
> > On Thu, Sep 20, 2018 at 09:12:53AM +0200, Andreas Schwab wrote:
> >> On Sep 19 2018, Jason Merrill wrote:
> >>
> >> > Andreas, do the new testcases pass? That would
Segher:
I have addressed the various formatting and other minor issues.
I checked to see if the builtins worked with -msoft-float, which they
didn't. I added checks for the -msoft-float into the functions:
rs6000_expand_set_fpscr_rn_builtin(),
rs6000_expand_set_fpscr_drn_builtin(),
Hi!
On Thu, Sep 27, 2018 at 04:17:57PM -0700, Carl Love wrote:
> + if (icode == CODE_FOR_rs6000_mffsl
> + && rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT)
> +fatal_error (input_location,
> + "__builtin_mffsl() not supported with -msoft-float");
Please use plain
On Thu, Sep 27, 2018, 7:08 PM Marek Polacek wrote:
> On Thu, Sep 27, 2018 at 01:15:46AM -0400, Jason Merrill wrote:
> > On Thu, Sep 20, 2018 at 5:20 AM, Jakub Jelinek wrote:
> > > On Thu, Sep 20, 2018 at 09:12:53AM +0200, Andreas Schwab wrote:
> > >> On Sep 19 2018, Jason Merrill wrote:
> > >>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87449
Bug ID: 87449
Summary: -Wunused-variable and associate
Product: gcc
Version: 8.2.1
Status: UNCONFIRMED
Keywords: diagnostic
Severity: normal
Priority: P3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87444
--- Comment #6 from George ---
Thanks!
Tamar Christina writes:
> Hi All,
>
> Currently some target supports checks such as vect_int cache their
> results in a manner that would cause them not to be rechecked when
> running the same tests against a different variant in a multi variant
> run. This causes tests to be skipped or run when
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85908
--- Comment #1 from Paolo Carlini ---
I can't reproduce the issue with the released 8.1.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86269
Paolo Carlini changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86000
Paolo Carlini changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
On Wed, Sep 26, 2018 at 7:46 PM Aldy Hernandez wrote:
>
> As I've said in the PR...
>
> For a 1-bit signed field we are trying to subtract the following ranges:
>
> [0, 0] - VR_VARYING
>
> Mathematically these are:
>
> [MAX, MAX] - [MIN, MAX]
> [0, 0] - [MIN, MAX]
> => [0, 0] - [-1,
Hi.
For some time we've been providing an intermediate format as
output of GCOV tool. It's documented in our code that primary
consumer of it is lcov. Apparently that's not true:
https://github.com/linux-test-project/lcov/issues/38#issuecomment-371203750
So that I decided to come up with
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81797
--- Comment #66 from Jonathan Wakely ---
Yes, I was afraid the RTEMS failures might be a different problem.
Are the symptoms the same? i.e. missing C++ standard library headers?
Comment 17 suggests you're seeing missing libgcc headers, which
On Wed, 26 Sep 2018, Qing Zhao wrote:
>
> > On Sep 26, 2018, at 6:07 PM, Alexander Monakov wrote:
> >
> > On Wed, 26 Sep 2018, Qing Zhao wrote:
> >> The request is for application developers who want to use gcc's online
> >> patching feature.
> >>
> >> Today, developers can turn off
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87448
janus at gcc dot gnu.org changed:
What|Removed |Added
Keywords||ice-on-valid-code
>
> Okay, I see.
>
> >
> > If you make this to be INTERPOSABLE (which means it can be replaced by
> > different
> > implementation by linker and that is probably what we want for live
> > patching)
> > then also inliner, ipa-sra and other optimization will give up on these.
>
> do you
On Mon, Sep 24, 2018 at 9:14 PM Indu Bhagat wrote:
>
> Done. Attached is updated patch.
>
> Patch is tested on x86_64
You obviously did _not_ properly test the patch since it causes a
bunch of new testsuite
failures:
FAIL: g++.dg/pr60518.C -std=gnu++11 (test for excess errors)
FAIL:
On 27/09/2018 09:26, Kyrill Tkachov wrote:
Hi Thomas,
On 26/09/18 18:39, Thomas Preudhomme wrote:
Hi,
GCC ICEs under -mslow-flash-data and -mword-relocations because there
is no way to load an address, both literal pools and MOVW/MOVT being
forbidden. This patch gives an error message when
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82089
--- Comment #7 from Andrew Stubbs ---
Author: ams
Date: Thu Sep 27 11:15:48 2018
New Revision: 264666
URL: https://gcc.gnu.org/viewcvs?rev=264666=gcc=rev
Log:
[pr82089] Don't sign-extend SFV 1 in BImode
This is an update of the patch posted to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82089
Andrew Stubbs changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81797
--- Comment #69 from Chris Johns ---
(In reply to Jonathan Wakely from comment #68)
> (In reply to Chris Johns from comment #67)
> > (In reply to Jonathan Wakely from comment #66)
> > > Yes, I was afraid the RTEMS failures might be a different
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81797
--- Comment #70 from Jonathan Wakely ---
Drat, that is one of the symlinked files.
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