Re: RFC: Update ISL under gcc/infrastructure/ ? // Remove CLooG?

On 06.11.2014 07:04, Roman Gareev wrote: CLooG is not necessarily needed. You can run graphite just with ISL. The main reason that ISL code generation is not enabled by default is that we did not yet get extensive testing and it was unclear who will have the time to fix possible bugs. Could you

Re: RFC: Update ISL under gcc/infrastructure/ ? // Remove CLooG?

> CLooG is not necessarily needed. You can run graphite just with ISL. The > main reason that ISL code generation is not enabled by default is that we > did not yet get extensive testing and it was unclear who will have the time > to fix possible bugs. Could you please advise me which test suites

Re: RFC: Update ISL under gcc/infrastructure/ ? // Remove CLooG?

On 04.11.2014 16:17, Tobias Burnus wrote: Hi all, currently, contrib/download_prerequisites downloads isl-0.12.2 from ftp://gcc.gnu.org/pub/gcc/infrastructure/$ISL.tar.bz2 However, that version has a bug which causes an ICE (PR 62289). End of October, ISL 0.14 was released, which should contain

gcc-4.9-20141105 is now available

Snapshot gcc-4.9-20141105 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/4.9-20141105/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 4.9 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches

Match-and-simplify and COND_EXPR

Hi, I was trying to hook up tree-ssa-phiopt to match-and-simplify using either gimple_build (or rather using gimple_simplify depending on if we want to produce cond_expr for conditional move). I ran into a problem. With the pattern below: /* a ? 0 : 1 -> a if 0 and 1 are integral types. */ (simp

Re: how to keep a hard register across multiple instrutions?

Thank you very much. It turns out that the FPU register is renamed. After configuring HARD_REGNO_RENAME_OK, now one FPU register is used for those three instructions. David - Original Message - > From: "Joern Rennecke" > To: "David Kang" > Cc: "Jeff Law" , "GCC" > Sent: Monday, Nov

Re: libgcc - SJLJ probe failing on head on h8300 & m32c

On 11/5/2014 11:10 AM, DJ Delorie wrote: > Last time you mentioned this, I asked what the contents of that > config.log were... I thought I posted it. Anyway, here is the m32c-rtems and h8300-rtems libgcc config.logs. It looks more obvious now. Both targets have an ICE compiling the autoconf pro

Re: [Aarch64] LRA

On 05/11/14 17:14, Evandro Menezes wrote: > It doesn't seem that the option -mno-lra does what it implies. If so, what > does it do, for the it does result in differences. It causes the compiler to use 'reload' rather than LRA for handling part of the register allocation process. R.

Re: GCC 5.0 Status Report (2014-11-03), Stage 1 ends Nov 15th

Hello Jakub, On Nov 3, 2014, at 10:18 , Jakub Jelinek wrote: > The trunk is scheduled to transition from Stage 1 to Stage 3 at the end > of Saturday, November 15th (use your timezone to your advantage) ... > What larger merges are still planned for GCC 5? > What else have been people working > o

[Aarch64] LRA

It doesn't seem that the option -mno-lra does what it implies. If so, what does it do, for the it does result in differences. TIA Evandro Menezes Austin, TX e.mene...@samsung.com +1-512-425-3365

Re: libgcc - SJLJ probe failing on head on h8300 & m32c

Last time you mentioned this, I asked what the contents of that config.log were...

libgcc - SJLJ probe failing on head on h8300 & m32c

Hi h8300-rtems and m32c-rtems both fail in libgcc during the configure probes of make. configure: WARNING: decimal float is not supported for this target, ignored checking whether fixed-point is supported... no checking whether to use setjmp/longjmp exceptions... unknown configure: error: unable