[Bug target/111428] RISC-V vector: Flaky segfault in {min|max}val_char_{1|2}.f90

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111428 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |WORKSFORME Status|NEW

[Bug target/120741] [16 Regression] ICE on mingw-w64-12.0.0: during RTL pass: pro_and_epilogue ICE in ix86_expand_prologue, at config/i386/i386.cc:9446

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120741 H.J. Lu changed: What|Removed |Added CC||hjl.tools at gmail dot com --- Comment #3 fro

[Bug rtl-optimization/110423] Redundant constants not getting eliminated on RISCV.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110423 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/110478] RISC-V multilib gcc zicsr in the -march causing incorrect libgcc to be used

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110478 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug go/94633] golang 1.14.2 fails to bootstrap using GCC 10 on riscv64-linux-gnu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94633 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug modula2/120731] Possible error in Strings.Pos causing sigsegv

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120731 Gaius Mulley changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug fortran/120743] ice in verify_gimple_in_seq

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120743 Jerry DeLisle changed: What|Removed |Added CC||jvdelisle at gcc dot gnu.org

[Bug target/117877] [14/15/16 Regression] internal compiler error: Floating point exception

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117877 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/120741] [16 Regression] ICE on mingw-w64-12.0.0: during RTL pass: pro_and_epilogue ICE in ix86_expand_prologue, at config/i386/i386.cc:9446

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120741 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug modula2/120731] Possible error in Strings.Pos causing sigsegv

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120731 --- Comment #2 from Gaius Mulley --- Created attachment 61679 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61679&action=edit Proposed patch for Strings.Pos Here is a proposed patch (currently being bootstrap tested). An internal Slice i

[Bug rtl-optimization/119275] ICE: in gen_lowpart_general, at rtlhooks.cc:57 with -O2 -march=rv64gv -mrvv-vector-bits=zvl

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119275 Jeffrey A. Law changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug tree-optimization/120752] 5% slowdown of 525.x264_r since r16-1346-gb0d50cbb42ab2c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120752 --- Comment #1 from Jan Hubicka --- if you happen to have binaries, it would be useful to know perf report with and without the hcange. The improvement after release branch was due to fixing ipa-cp cloning heuristics tonot reqire edges being hot

[Bug target/116904] [14/15/16 Regression] RISC-V: address calculation not hoisted from loop

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116904 Jeffrey A. Law changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED

[Bug tree-optimization/120735] -Warray-bounds error via std::vector::data after unsigned int overflow potential

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120735 Andrew Pinski changed: What|Removed |Added Keywords||diagnostic Blocks|

[Bug c++/120754] New: Segfault when trying to print error about catching function type

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120754 Bug ID: 120754 Summary: Segfault when trying to print error about catching function type Product: gcc Version: 15.1.0 Status: UNCONFIRMED Severity: normal

[Bug c++/120755] New: Catching reference to array also catches thrown pointers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120755 Bug ID: 120755 Summary: Catching reference to array also catches thrown pointers Product: gcc Version: 15.1.0 Status: UNCONFIRMED Severity: normal Pr

[Bug target/55212] [SH] Switch to LRA

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #450 from John Paul Adrian Glaubitz --- (In reply to John Paul Adrian Glaubitz from comment #449) > I am cherry-picking the patches from [1] now, add the patch 59550 and let > Debian's GCC maintainer integrate this patch set for the g

[Bug tree-optimization/120747] [16 Regression] 435.gromacs miscompares since r16-1550-g9244ea4bf55638

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120747 --- Comment #2 from Andrew Macleod --- Does it still fail with the fix for PR 120701? Although it was a compile time failure, there are potentially casees we could end up with an incorrect range if circumstances were correct. Andrew

[Bug target/86792] microblaze port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86792 --- Comment #2 from Michael Eager --- Fixed in trunk, gcc-14, gcc-15.

[Bug target/120753] is_device_ptr does not compile with pointers in struct elements..

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120753 --- Comment #1 from Benjamin Schulz --- the context of this is of course that this causes problems if one wants to create an object or a struct entirely on gpu, say for temporary computations... A replacement that works is: #include struct a

[Bug tree-optimization/120752] New: 5% slowdown of 525.x264_r since r16-1346-gb0d50cbb42ab2c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120752 Bug ID: 120752 Summary: 5% slowdown of 525.x264_r since r16-1346-gb0d50cbb42ab2c Product: gcc Version: 16.0 Status: UNCONFIRMED Keywords: missed-optimization

[Bug target/112433] RISC-V GCC-15 feature: Split register allocation into RVV and non-RVV, and make vsetvl PASS run between them

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112433 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |INVALID Status|UNCONFIRMED

[Bug target/120753] New: is_device_ptr does not compile with pointers in struct elements..

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120753 Bug ID: 120753 Summary: is_device_ptr does not compile with pointers in struct elements.. Product: gcc Version: 15.1.1 Status: UNCONFIRMED Severity: normal

[Bug target/114180] RISC-V: missing vsetvl changes tail policy and causes wrong codegen

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114180 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/111565] ICE: in riscv_expand_strcmp_scalar, at config/riscv/riscv-string.cc:382 with -mcpu=thead-c906 -minline-strncmp

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111565 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/114887] RISC-V: expect M8 but M4 generated with dynamic LMUL for TSVC s319

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114887 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/112092] RISC-V: Suboptimal RVV code produced for vsetvl-11.c and vsetvlmax-8.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112092 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/115980] RISC-V: RVV dynamic-lmul test fail

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115980 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug tree-optimization/116773] [meta-bug] TSVC missed optimizations

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116773 Bug 116773 depends on bug 114887, which changed state. Bug 114887 Summary: RISC-V: expect M8 but M4 generated with dynamic LMUL for TSVC s319 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114887 What|Removed |A

[Bug tree-optimization/120752] 5% slowdown of 525.x264_r since r16-1346-gb0d50cbb42ab2c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120752 Filip Kastl changed: What|Removed |Added Target Milestone|--- |16.0

[Bug target/111320] RISC-V: Failed combine extend + reduce sum to widen reduce sum

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111320 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug tree-optimization/53947] [meta-bug] vectorizer missed-optimizations

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53947 Bug 53947 depends on bug 111381, which changed state. Bug 111381 Summary: RISC-V: missed autovec MULH for signed * unsigned https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111381 What|Removed |Added ---

[Bug target/111381] RISC-V: missed autovec MULH for signed * unsigned

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111381 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/111973] [RISC-V] attribute interrupt yields unaligned stack access

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111973 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |WORKSFORME Status|UNCONFIR

[Bug target/111470] RISC-V: autovec fma generate redundant vmerge instruction

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111470 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug tree-optimization/120751] New: [16 Regression] 10-15% slowdown of 454.calculix on Zen4 and Zen5 since r16-1001-g0291f53f8d2343

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120751 Bug ID: 120751 Summary: [16 Regression] 10-15% slowdown of 454.calculix on Zen4 and Zen5 since r16-1001-g0291f53f8d2343 Product: gcc Version: 16.0 Status: UNCONFIRMED

[Bug testsuite/111298] time-profiler-2.c flaky on glibc RISC-V with qemu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111298 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/111311] RISC-V regression testsuite errors with --param=riscv-autovec-preference=scalable

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111311 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |WONTFIX Status|UNCONFIRMED

[Bug tree-optimization/120727] Bogus -Warray-bounds on std::vector::push_back() with -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120727 --- Comment #3 from Andrew Pinski --- (In reply to Andrew Pinski from comment #2) > I am sure this is a false positive since there is no such thing as unsigned > overflow. It is always wrapping. Whoops that was for a different bug report

[Bug target/106543] [12/13 Regression] *sge_ uses operand 2 but there is no operand 2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106543 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug rtl-optimization/111558] RISCV: shrink-wrapper optimization question

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111558 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/107341] RISCV User Stack Frame error with -fno-omit-frame-pointer on GCC 10.2.0

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107341 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/120748] New: New crash with lambda code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120748 Bug ID: 120748 Summary: New crash with lambda code Product: gcc Version: 16.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++ Assigne

[Bug target/112648] RISC-V Vector parameter riscv-autovec-lmul value is ineffective

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112648 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/97481] GCC ice when build with RISCV on msys2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97481 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |INVALID Status|UNCONFIRMED

[Bug target/112431] RISC-V GCC-15 feature: Support register overlap on widen RVV instructions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112431 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug rtl-optimization/120750] New: SEGV in remove_use, at rtl-ssa/accesses.cc:1276

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120750 Bug ID: 120750 Summary: SEGV in remove_use, at rtl-ssa/accesses.cc:1276 Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component:

[Bug tree-optimization/120751] [16 Regression] 10-15% slowdown of 454.calculix on Zen4 and Zen5 since r16-1001-g0291f53f8d2343

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120751 Filip Kastl changed: What|Removed |Added Target Milestone|--- |16.0

[Bug tree-optimization/120727] Bogus -Warray-bounds on std::vector::push_back() with -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120727 --- Comment #2 from Andrew Pinski --- I am sure this is a false positive since there is no such thing as unsigned overflow. It is always wrapping.

[Bug target/113249] RISC-V: regression testsuite errors -mtune=generic-ooo

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113249 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |WONTFIX Status|UNCONFIRMED

[Bug target/86802] riscv port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86802 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |INVALID Status|NEW

[Bug bootstrap/109461] build gcc for riscv target failed with `execvp: /bin/sh: Argument list too long error when using with --with-multilib-generator`

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109461 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug tree-optimization/120747] New: [16 Regression] 435.gromacs miscompares since r16-1550-g9244ea4bf55638

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120747 Bug ID: 120747 Summary: [16 Regression] 435.gromacs miscompares since r16-1550-g9244ea4bf55638 Product: gcc Version: 16.0 Status: UNCONFIRMED Keywords: wrong-c

[Bug target/110146] ICE in riscv_vector::function_builder::add_unique_function()

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110146 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/55212] [SH] Switch to LRA

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #449 from John Paul Adrian Glaubitz --- (In reply to John Paul Adrian Glaubitz from comment #447) > Oleg's GCC tree contains a working LRA conversion, see: > > https://github.com/olegendo/gcc/tree/devel/sh-lra > > This tree with the

[Bug target/109100] Possible typo CRS

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109100 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/86772] [meta-bug] tracking port status for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86772 Bug 86772 depends on bug 86802, which changed state. Bug 86802 Summary: riscv port needs updating for CVE-2017-5753 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86802 What|Removed |Added

[Bug tree-optimization/120747] [16 Regression] 435.gromacs miscompares since r16-1550-g9244ea4bf55638

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120747 Sam James changed: What|Removed |Added CC||sjames at gcc dot gnu.org --- Comment #1 fr

[Bug tree-optimization/111624] compile-time and memory-hog compiling RISC-V insn-emit.cc

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111624 Sam James changed: What|Removed |Added Target Milestone|--- |15.0

[Bug target/120737] #pragma omp atomic fails on nvptx

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120737 Tobias Burnus changed: What|Removed |Added CC||burnus at gcc dot gnu.org --- Comment #

[Bug target/98981] gcc-10.2 for RISC-V has extraneous register moves

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98981 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2025-06-21 Status|UNCONFIRM

[Bug bootstrap/109562] Failed to build native GCC 12.2.0 on RISC-V64 linux machine

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109562 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug bootstrap/84402] [meta] GCC build system: parallelism bottleneck

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84402 Bug 84402 depends on bug 111600, which changed state. Bug 111600 Summary: [14/15/16 Regression] RISC-V bootstrap time regression https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111600 What|Removed |Added --

[Bug target/111600] [14/15/16 Regression] RISC-V bootstrap time regression

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111600 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/111624] compile-time and memory-hog compiling RISC-V insn-emit.cc

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111624 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/111600] [14/15/16 Regression] RISC-V bootstrap time regression

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111600 Sam James changed: What|Removed |Added Target Milestone|14.4|15.0

[Bug target/120737] #pragma omp atomic fails on nvptx

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120737 Sam James changed: What|Removed |Added Resolution|FIXED |INVALID

[Bug tree-optimization/120749] New: [16 Regression] 5% slowdown of 548.exchange2_r on Aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120749 Bug ID: 120749 Summary: [16 Regression] 5% slowdown of 548.exchange2_r on Aarch64 Product: gcc Version: 16.0 Status: UNCONFIRMED Keywords: missed-optimization,

[Bug tree-optimization/120749] [16 Regression] 5% slowdown of 548.exchange2_r on Aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120749 Filip Kastl changed: What|Removed |Added Target Milestone|--- |16.0

[Bug target/120737] #pragma omp atomic fails on nvptx

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120737 Benjamin Schulz changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug middle-end/120746] [16 Regression] Compilation fails in gcc/value-range.cc due to undeclared 'uint'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120746 Jakub Jelinek changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug c++/120686] ICE on a lambda that uses parameter pack capture and parameter pack indexing in decltype return type

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120686 Alex changed: What|Removed |Added See Also||https://github.com/itanium- |

[Bug tree-optimization/120747] [16 Regression] 435.gromacs miscompares since r16-1550-g9244ea4bf55638

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120747 Filip Kastl changed: What|Removed |Added Target Milestone|--- |16.0

[Bug target/120741] [16 Regression] ICE on mingw-w64-12.0.0: during RTL pass: pro_and_epilogue ICE in ix86_expand_prologue, at config/i386/i386.cc:9446

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120741 --- Comment #1 from cuilili --- Created attachment 61678 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61678&action=edit Fix-shrink-wrap-separate-ICE-for-mingw Hi Sergei, Thanks for reporting this issue and providing a small testcase. I

[Bug target/118241] RISC-V ICE: internal compiler error: in int_mode_for_mode, at stor-layout.cc:407 caused by prefetch instructions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118241 --- Comment #9 from GCC Commits --- The master branch has been updated by Jeff Law : https://gcc.gnu.org/g:49199bb29628365fc6c60bd185808a1bad65086d commit r16-1601-g49199bb29628365fc6c60bd185808a1bad65086d Author: Jeff Law Date: Sat Jun 21

[Bug middle-end/120746] [16 Regression] Compilation fails in gcc/value-range.cc due to undeclared 'uint'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120746 --- Comment #1 from GCC Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:b76779c7cd6b92f167a80f16f11f599eea4dfc67 commit r16-1600-gb76779c7cd6b92f167a80f16f11f599eea4dfc67 Author: Jakub Jelinek Date: S

[Bug target/120356] [15/16 Regression] RISC-V: Miscompile at -O[23] since r15-6881-g7b815107f40

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120356 Jeffrey A. Law changed: What|Removed |Added Status|WAITING |NEW --- Comment #2 from Jeffrey A. Law

[Bug middle-end/120746] [16 Regression] Compilation fails in gcc/value-range.cc due to undeclared 'uint'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120746 Jakub Jelinek changed: What|Removed |Added Summary|Compilation fails in|[16 Regression] Compilation

[Bug target/120733] [16 Regression][aarch64] ICE in gen_highpart, at lra.cc:1484 since r16-1565-g2dcc6dbd8a00ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120733 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug c++/120686] ICE on a lambda that uses parameter pack capture and parameter pack indexing in decltype return type

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120686 Sam James changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug target/117722] RISC-V: Failed to vectorize x264_pixel_sad_4x4

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117722 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug tree-optimization/53947] [meta-bug] vectorizer missed-optimizations

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53947 Bug 53947 depends on bug 117722, which changed state. Bug 117722 Summary: RISC-V: Failed to vectorize x264_pixel_sad_4x4 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117722 What|Removed |Added --

[Bug target/120733] [16 Regression][aarch64] ICE in gen_highpart, at lra.cc:1484 since r16-1565-g2dcc6dbd8a00ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120733 Sam James changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org Target Milest

[Bug middle-end/26163] [meta-bug] missed optimization in SPEC (2k17, 2k and 2k6 and 95)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163 Bug 26163 depends on bug 117722, which changed state. Bug 117722 Summary: RISC-V: Failed to vectorize x264_pixel_sad_4x4 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117722 What|Removed |Added --

[Bug c++/120686] ICE on a lambda that uses parameter pack capture and parameter pack indexing in decltype return type

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120686 Alex changed: What|Removed |Added CC||waffl3x at gcc dot gnu.org Keywords|

[Bug target/120733] [16 Regression][aarch64] ICE in gen_highpart, at lra.cc:1484 since r16-1565-g2dcc6dbd8a00ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120733 --- Comment #2 from Filip Kastl --- Btw, 500.perlbench and 435.gromacs SPEC CPU benchmarks currently cannot be built because of this (at least for some combinations of compiler flags).

[Bug target/119267] RISC-V: gcc generates vsetivli with wrong LMUL with extended assembly

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119267 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |SUSPENDED Last reconfirmed|

[Bug c/120744] New diagnostic: -Wrealloc-zero-bytes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120744 --- Comment #3 from Alejandro Colomar --- Here's at least one such case: And indeed, it can be trivially replaced by the equivalent code calling free(3) and

[Bug other/120746] New: Compilation fails in gcc/value-range.cc due to undeclared 'uint'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120746 Bug ID: 120746 Summary: Compilation fails in gcc/value-range.cc due to undeclared 'uint' Product: gcc Version: 16.0 Status: UNCONFIRMED Severity: normal

[Bug rtl-optimization/120745] New: SEGV in process_uses_of_deleted_def, at rtl-ssa/changes.cc:271

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120745 Bug ID: 120745 Summary: SEGV in process_uses_of_deleted_def, at rtl-ssa/changes.cc:271 Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal

[Bug c/120744] New diagnostic: -Wrealloc-zero-bytes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120744 --- Comment #1 from Alejandro Colomar --- I think the existing -Wunused-result might not be enough because sonmeone could write

[Bug c/120744] New: New diagnostic: -Wrealloc-zero-bytes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120744 Bug ID: 120744 Summary: New diagnostic: -Wrealloc-zero-bytes Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c

[Bug c/120744] New diagnostic: -Wrealloc-zero-bytes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120744 --- Comment #2 from Alejandro Colomar --- (In reply to Alejandro Colomar from comment #1) > I think the existing -Wunused-result might not be enough because sonmeone > could write Oops, hit send by accident. I'll continue the message. ...some

[Bug fortran/120743] ice in verify_gimple_in_seq

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120743 --- Comment #1 from David Binderman --- Created attachment 61677 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61677&action=edit Some file that the Fortran code needs

[Bug fortran/120743] ice in verify_gimple_in_seq

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120743 --- Comment #2 from David Binderman --- trunk $ git log b25ec038dcaf7e48..a31e76a264355370 | grep -c "^commit" 36 trunk $

คุณเดือดร้อน เราช่วยคุณได้ ไม่มีโอนก่อนไม่มีมัดจำ

[Bug fortran/120743] New: ice in verify_gimple_in_seq

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120743 Bug ID: 120743 Summary: ice in verify_gimple_in_seq Product: gcc Version: 16.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: fortran As

[Bug target/120054] [16 regression] RISC-V: gcc.target/riscv/predef-19.c failing since r16-299-ga992164c289

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120054 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/120652] [16 Regression] RISC-V: ICE in require, at machmode.h:323 with rv64gcv_zvl256b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120652 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/118890] ubsan bootstrap failure for powerpc64le-unknown-linux-gnu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118890 --- Comment #3 from Kishan Parmar --- I'm able to resolve nearly all the errors, except for the poly-int one. Thomas Koenig, could you please share the log showing how you're encountering that error?

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