https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
--- Comment #12 from Lehua Ding ---
(In reply to Andrew Pinski from comment #7)
> Works for me with r14-8399-ge6fbc3cc786a74.
>
> My -march=native expands to: `-march=skylake-avx512 -mmmx -mpopcnt -msse
> -msse2 -msse3 -mssse3 -msse4.1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
--- Comment #11 from Lehua Ding ---
(In reply to Andrew Pinski from comment #10)
> Finally able to reproduce it using -fno-use-linker-plugin .
I compile GCC with this commit e0701f8f7b6dcddb299eb5345e510cf9ea419150, but
the as and ld are
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
--- Comment #6 from Lehua Ding ---
(In reply to Lehua Ding from comment #5)
> Created attachment 57287 [details]
> All source file
Decompress the attachment and cd to it, then you can reproduce by these
command:
g++ -std=c++03 -m64 -c -o
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
--- Comment #5 from Lehua Ding ---
Created attachment 57287
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=57287=edit
All source file
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
--- Comment #3 from Lehua Ding ---
(In reply to Andrew Pinski from comment #2)
> (In reply to Lehua Ding from comment #1)
> > Reproduce steps:
> > 1. download these object files(bugzilla has size limit):
> >
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
--- Comment #1 from Lehua Ding ---
Reproduce steps:
1. download these object files(bugzilla has size limit):
https://github.com/lhtin/temp/raw/main/objects.zip
2. cd the object files dir and run the command: /path/to/your/g++ -std=c++03
-m64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113712
Bug ID: 113712
Summary: lto crash: when building 641.leela_s peek with
Example-gcc-linux-x86.cfg (SPEC2017 1.1.9)
Product: gcc
Version: 14.0
Status: UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113608
--- Comment #1 from Lehua Ding ---
(In reply to JuzheZhong from comment #0)
> https://godbolt.org/z/srdd4qhdc
>
> #include "riscv_vector.h"
>
> vint32m8_t
> foo (int32_t *__restrict a, int32_t *__restrict b, int32_t *__restrict c,
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113240
--- Comment #4 from Lehua Ding ---
(In reply to Andrew Pinski from comment #3)
> (In reply to Lehua Ding from comment #2)
> > (In reply to Andrew Pinski from comment #1)
> > > There needs to be a -Wabi warning for this too for the change
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113240
--- Comment #2 from Lehua Ding ---
(In reply to Andrew Pinski from comment #1)
> There needs to be a -Wabi warning for this too for the change between
> versions.
I'm more inclined to think of it as a bug, since the vector ABI specification
is
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113240
Bug ID: 113240
Summary: Use wrong rule to pass fixed-length(size<=2*XLEN)
vector argument
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112366
Bug ID: 112366
Summary: ICE in vectorizable_live_operation, at
tree-vect-loop.cc:10798
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111318
Lehua Ding changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665
Lehua Ding changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111725
Lehua Ding changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111725
--- Comment #2 from Lehua Ding ---
Confirmed fix.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111926
--- Comment #3 from Lehua Ding ---
(In reply to Kito Cheng from comment #1)
> Plz leave an option to let user has choice, performance things is hard to
> saw which is absolutely better for all uarch, my thought is leaving an
> option and let
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111926
Bug ID: 111926
Summary: RISC-V: Use vsetvl insn replace csrr vlenb insn
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111545
--- Comment #5 from Lehua Ding ---
Hi Edwin,
I fixed by the commit id (29331e72d0ce9fe8aabdeb8c320b99943b9e067a) on trunk,
can you help confirm this fixed?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111725
Bug ID: 111725
Summary: Missed one vsetvl
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111473
Bug ID: 111473
Summary: Missed COND_SQRT and COND_LEN_SQRT internal fn
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111470
--- Comment #1 from Lehua Ding ---
produce on compiler explorer: https://godbolt.org/z/dvfTbcPsf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111470
Bug ID: 111470
Summary: RISC-V: autovec fma generate redundant vmerge
instruction
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111255
Lehua Ding changed:
What|Removed |Added
Resolution|--- |FIXED
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665
--- Comment #3 from Lehua Ding ---
Fixed by the commit
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=fdd59c0f73e9e681cd5f4d0eee2dd58d60d8dbe1
with compiler option --param=riscv-vector-abi.
Confirmed after support riscv-vector-abi in default.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111381
Bug ID: 111381
Summary: RISC-V: missed autovec MULH for signed * unsigned
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111320
Bug ID: 111320
Summary: RISC-V: Failed combine extend + vfwredosum
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111318
Bug ID: 111318
Summary: RISC-V: Redundant vsetvl instructions
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111232
--- Comment #1 from Lehua Ding ---
reproduce on compiler explorer: https://godbolt.org/z/Mq3bzajn6
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111255
Bug ID: 111255
Summary: RISC-V: Miss combine two vsetvl insns
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111234
--- Comment #1 from Lehua Ding ---
Same on GCC 13: https://godbolt.org/z/xxfaP5oj3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111234
Bug ID: 111234
Summary: RISC-V: ICE in vsetvl pass
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110943
Lehua Ding changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111211
--- Comment #3 from Lehua Ding ---
(In reply to Richard Biener from comment #2)
> We diagnose this after unrolling, so the difference is whether we unroll or
> not.
But based on the assembly code it looks like both are unrolled.
foo:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111211
--- Comment #1 from Lehua Ding ---
Reproduce:
Compile Command: gcc -O3 -Wall -Wextra
C Code:
```
#include
int foo (uint64_t ddr0_addr_access)
{
uint64_t check[1] = {0};
for (int k = 0; k < 7; k += 1)
{
asm volatile
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111211
Bug ID: 111211
Summary: No warning for iterator going out of scope
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14
--- Comment #6 from Lehua Ding ---
(In reply to Andrew Pinski from comment #5)
> (In reply to Lehua Ding from comment #4)
> > Just to double check, are you saying something like the bellow? But I don't
> > feel like the purpose is quite the
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14
--- Comment #4 from Lehua Ding ---
(In reply to Andrew Pinski from comment #3)
> (In reply to Lehua Ding from comment #2)
> > (In reply to Andrew Pinski from comment #1)
> > > There is a match pattern which handles the case where the convert
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14
--- Comment #2 from Lehua Ding ---
(In reply to Andrew Pinski from comment #1)
> There is a match pattern which handles the case where the convert (cast)
> will fold both sides of the vec_cond now (since r14-3337-g70c50c87273d94).
>
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=14
Bug ID: 14
Summary: RISC-V: False combine extend + vcond_mask when modify
by vect_recog_over_widening_pattern
Product: gcc
Version: 14.0
Status: UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=12
Bug ID: 12
Summary: RISC-V: Resulting more vsetvl instructions of vwadd +
vadd but not vwadd + vwadd
Product: gcc
Version: 14.0
Status: UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111098
Bug ID: 111098
Summary: Missed combine .FMA + .COND_NEG
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110943
Bug ID: 110943
Summary: RISC-V: vmv.v.x and vmv.s.x pattern combine error
Product: gcc
Version: 13.2.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110695
Bug ID: 110695
Summary: RISC-V: compile gcc.dg/torture/pr105132.c crash
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665
--- Comment #2 from Lehua Ding ---
I just found the relevant specification and the specification seems to require
that the vector registers used be saved.
> The interrupt attribute specifies that a function is an interrupt handler.
> The
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665
--- Comment #1 from Lehua Ding ---
If it's a problem, I'm willing to fix it.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110665
Bug ID: 110665
Summary: RISC-V do not preserve vector registers in interrupt
handler
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108999
Lehua Ding changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108999
Bug ID: 108999
Summary: Maybe LRA produce inaccurate hardware register
occupancy information for subreg operand
Product: gcc
Version: 13.0
Status: UNCONFIRMED
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