[Bug target/59833] ARM soft-float extendsfdf2 fails to quiet signaling NaN

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59833 --- Comment #11 from Ramana Radhakrishnan --- Author: ramana Date: Thu Jul 21 08:27:47 2016 New Revision: 238584 URL: https://gcc.gnu.org/viewcvs?rev=238584=gcc=rev Log: [ARM] Fix PR target/59833 For Aurelien Jarno On

[Bug target/59833] ARM soft-float extendsfdf2 fails to quiet signaling NaN

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59833 --- Comment #12 from Ramana Radhakrishnan --- Fixed on trunk so far.

[Bug preprocessor/68854] isystem and ansi cause assembly preprocessing problem

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68854 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/59833] ARM soft-float extendsfdf2 fails to quiet signaling NaN

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59833 --- Comment #6 from Ramana Radhakrishnan --- (In reply to Aurelien Jarno from comment #5) > (In reply to Ramana Radhakrishnan from comment #4) > > Need to apply Aurelien's patch - looks like that's slipped through the > > cracks. > > What was

[Bug target/63874] vtable address generation goes through memory

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63874 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |7.0

[Bug target/63874] vtable address generation goes through memory

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63874 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/63874] vtable address generation goes through memory

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63874 --- Comment #3 from Ramana Radhakrishnan --- Author: ramana Date: Mon Jul 4 09:06:02 2016 New Revision: 237957 URL: https://gcc.gnu.org/viewcvs?rev=237957=gcc=rev Log: [AArch64] Fix PR target/63874 In this PR we have a situation where we

[Bug target/71191] aarch64 and others: __atomic_load;arithmetic;__atomic_compare_exchange loops should be able to generate better code with LL/SC-type constructs than a CAS loop

||ramana at gcc dot gnu.org --- Comment #4 from Ramana Radhakrishnan --- (In reply to dhowe...@redhat.com from comment #0) > In the kernel, we have various bits of code that boil down to: > > int cur = __atomic_load_n(>counter, __ATOMIC_RELAXED); >

[Bug rtl-optimization/70978] [5 Regression] internal compiler error: in assign_by_spills, at lra-assigns.c:1428 on arm

||2016-05-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Confirmed.

[Bug target/53440] [arm] generic thunk code fails for method which uses '...'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53440 --- Comment #8 from Ramana Radhakrishnan --- Author: ramana Date: Fri May 13 09:32:29 2016 New Revision: 236198 URL: https://gcc.gnu.org/viewcvs?rev=236198=gcc=rev Log: Fix PR target/53440 - handle generic thunks better for TARGET_32BIT. This

[Bug target/69979] ARM naked function attribute not handling structs bigger than 32 bits correctly

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69979 Ramana Radhakrishnan changed: What|Removed |Added Status|RESOLVED|REOPENED Last reconfirmed|

[Bug bootstrap/70896] gcc4 ABI compatible bootstrap fails

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70896 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug rtl-optimization/70825] x86_64: __atomic_compare_exchange_n() accesses stack unnecessarily

CC||ramana at gcc dot gnu.org Component|target |rtl-optimization --- Comment #1 from Ramana Radhakrishnan --- There is an unnecessary store to the stack regardless of the architecture. I suspect that's just because of the a combination

[Bug rtl-optimization/70825] x86_64: __atomic_compare_exchange_n() accesses stack unnecessarily

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70825 Ramana Radhakrishnan changed: What|Removed |Added Keywords||missed-optimization

[Bug tree-optimization/70804] Missed tail-call

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70804 Ramana Radhakrishnan changed: What|Removed |Added Target||aarch64 --- Comment #1 from

[Bug tree-optimization/70804] New: Missed tail-call

Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- Given. struct E { virtual ~E() { destroy(); } virtual E *clone() = 0; void destroy(); }; struct B: public E { virtual ~B() {} virtual B *clone() { return 0; } virtual void bar

[Bug rtl-optimization/70751] [7 Regression] FAIL: gcc.target/arm/eliminate.c scan-assembler-times r0,[\\t ]*sp 3 since r235184

||2016-04-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- Confirmed.

[Bug target/69143] PowerPC64: aggregate results are badly handled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69143 --- Comment #4 from Ramana Radhakrishnan --- (In reply to H.J. Lu from comment #3) > Similar to PR 28831, PR 23782? Indeed, though looks more like a base case for PR28831 than PR23782 at first glance. Ramana

[Bug target/69143] PowerPC64: aggregate results are badly handled

, ||aarch64-none-linux-gnu CC||ramana at gcc dot gnu.org --- Comment #2 from Ramana Radhakrishnan --- I'm not sure if this is target specific or not but on aarch64 and on armhf as well the code is badly optimized

[Bug target/70711] GCC ARM big-endian ARMv8.1 code fails.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70711 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |6.0 --- Comment #2 from Ramana

[Bug testsuite/70553] pr70496.c should exclude Thumb only targets

||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |6.0 --- Comment #2 from Ramana Radhakrishnan --- Fixed then ?

[Bug target/70711] GCC ARM big-endian ARMv8.1 code fails.

||arm Status|UNCONFIRMED |NEW Last reconfirmed||2016-04-18 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana

[Bug target/64971] [5/6 Regression] gcc.c-torture/compile/pr37433.c ICEs with -mabi=ilp32

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64971 --- Comment #11 from Ramana Radhakrishnan --- (In reply to Jeffrey A. Law from comment #10) > Ramana, do you want to give this to someone on your team to wrap up? Kyrill, do you mind picking this up ? (In reply to Jeffrey A. Law from comment

[Bug target/62254] [4.9/5/6 Regression] gcc-4.9 ICEs on linux kernel zlib for armv3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62254 --- Comment #21 from Ramana Radhakrishnan --- (In reply to Nick Clifton from comment #19) > (In reply to Julien Margetts from comment #17) > > The following test case still fails with the patch applied (originally bug > > 70362) > > > >

[Bug target/53440] [arm] generic thunk code fails for method which uses '...'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53440 --- Comment #7 from Ramana Radhakrishnan --- A patch to fix this for TARGET_32BIT is here. https://gcc.gnu.org/ml/gcc-patches/2016-04/msg00060.html

[Bug target/70496] [6 regression] inadvertent change to ASM_APP_OFF for .arm / .thumb directives.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70496 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/70496] [6 regression] inadvertent change to ASM_APP_OFF for .arm / .thumb directives.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70496 --- Comment #3 from Ramana Radhakrishnan --- Author: ramana Date: Fri Apr 1 14:58:53 2016 New Revision: 234675 URL: https://gcc.gnu.org/viewcvs?rev=234675=gcc=rev Log: Fix PR target/70496 While doing the unified asm rewrite - I inadvertently

[Bug target/48863] A Bug When Assembler Instructions with C Expression Operands in arm-elf-gcc 4.5

|UNCONFIRMED |NEW Last reconfirmed||2016-04-01 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #5 from Ramana Radhakrishnan --- Well confirmed.

[Bug target/70496] [6 regression] inadvertent change to ASM_APP_OFF for .arm / .thumb directives.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70496 --- Comment #2 from Ramana Radhakrishnan --- Created attachment 38152 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=38152=edit Patch. Patch I'm testing.

[Bug target/70496] [6 regression] inadvertent change to ASM_APP_OFF for .arm / .thumb directives.

||2016-04-01 Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- mine.

[Bug target/70496] New: [6 regression] inadvertent change to ASM_APP_OFF for .arm / .thumb directives.

: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- int i; void main (void) { __asm__ volatile (".arm"); i = 0; __asm__ volatile ("\n cbz r0, 2f\n

[Bug target/70362] Segmentation fault compiling scalar-by-value-4_x.c for ARM arch < 4

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70362 --- Comment #6 from Ramana Radhakrishnan --- Fails at O0 in this case, I cannot type. I still think this is a tail from PR62254 and that should just be reopened.

[Bug target/70362] Segmentation fault compiling scalar-by-value-4_x.c for ARM arch < 4

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70362 --- Comment #4 from Ramana Radhakrishnan --- (In reply to Julien Margetts from comment #3) > Are you suggesting you confirmed the patch associated with bug 62254 fixes > this issue? > > As far as I can tell, in isolation at least, it does not >

[Bug target/62254] [4.9/5/6 Regression] gcc-4.9 ICEs on linux kernel zlib for armv3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62254 --- Comment #16 from Ramana Radhakrishnan --- (In reply to Nick Clifton from comment #13) > Patch applied. https://gcc.gnu.org/ml/gcc-cvs/2016-03/msg00740.html - just in case someone wants a link to it.

[Bug inline-asm/70184] Explicit register variables holding function arguments overwritten by conversion libcall

||2016-03-31 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #6 from Ramana Radhakrishnan --- Confirmed - but not sure if this is a dup of PR48863

[Bug target/62254] [4.9/5/6 Regression] gcc-4.9 ICEs on linux kernel zlib for armv3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62254 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|4.9.4 |6.0 --- Comment #15 from Ramana

[Bug target/62254] [4.9/5/6 Regression] gcc-4.9 ICEs on linux kernel zlib for armv3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62254 Ramana Radhakrishnan changed: What|Removed |Added CC||jmargetts at ocz dot com ---

[Bug target/70362] Segmentation fault compiling scalar-by-value-4_x.c for ARM arch < 4

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70362 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/63874] vtable address generation goes through memory

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63874 --- Comment #2 from Ramana Radhakrishnan --- (In reply to Richard Earnshaw from comment #1) > Sounds like this might be confusion between weak definitions and weak > references. If we have a weak reference to the object, we cannot convert it >

[Bug target/70362] Segmentation fault compiling scalar-by-value-4_x.c for ARM arch < 4

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70362 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug ipa/70366] [6 Regression] chromium fails to build with LTO due to segfault in ipa-inline-transform.c:inline_call

||ramana at gcc dot gnu.org Resolution|--- |FIXED --- Comment #7 from Ramana Radhakrishnan --- Fixed then

[Bug target/62254] [4.9/5/6 Regression] gcc-4.9 ICEs on linux kernel zlib for armv3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62254 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug tree-optimization/70341] [4.9/5/6 Regression] Code size increase due to earlier switch case lowering.

||2016-03-23 CC||ramana at gcc dot gnu.org Component|target |tree-optimization Summary|Code size increase on ARM |[4.9/5/6 Regression] Code |cortex-m3 for switch

[Bug target/70359] [6 Regression] Code size increase for ARM compared to gcc-5.3.0

, ||arm-none-linux-gnueabi Status|UNCONFIRMED |NEW Last reconfirmed||2016-03-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug target/69331] [6 regression] FAIL: 20_util/shared_ptr/thread/default_weaktoshared.cc execution test

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69331 Ramana Radhakrishnan changed: What|Removed |Added Target|hppa-unknown-linux-gnu |hppa-unknown-linux-gnu,

[Bug target/69331] [6 regression] FAIL: 20_util/shared_ptr/thread/default_weaktoshared.cc execution test

||2016-03-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #5 from Ramana Radhakrishnan --- Confirmed.

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #40 from Ramana Radhakrishnan --- (In reply to Fredrik Hederstierna from comment #38) > I guess this 'meta-bugreport' have become lightly fuzzy with all kinds of > CSiBE code size increase issues, > so maybe better to identify these

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #37 from Ramana Radhakrishnan --- I've completely lost track of this bug - is this still open on gcc 4.9 / 5 and 6 or just relevant to 4.9 ?

[Bug rtl-optimization/68536] LRA ICEs with new arm pattern

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68536 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug fortran/69368] [6 Regression] spec2006 test case 416.gamess fails with the g++ 6.0 compiler starting with r232508

||ramana at gcc dot gnu.org Resolution|--- |FIXED --- Comment #90 from Ramana Radhakrishnan --- Fixed then.

[Bug rtl-optimization/70030] [LRA]ICE when reload insn with output scratch operand

||2016-03-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Waiting.

[Bug target/70008] [ARM] Reverse subtract with carry can be generated in thumb2 mode

||ramana at gcc dot gnu.org Resolution|--- |INVALID --- Comment #3 from Ramana Radhakrishnan --- Invalid.

[Bug target/70232] [6 regression] excessive stack usage with -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70232 Ramana Radhakrishnan changed: What|Removed |Added CC||law at redhat dot com,

[Bug tree-optimization/70291] New: muldc3 code generation could be smarter

-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- __complex double x; __complex double y; __complex double z; double a, b, c, d; int main (void) { x = y * z; return 0; } Could well be implemented as: int main

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |6.0 --- Comment #9 from Ramana

[Bug rtl-optimization/64713] Missed ccmp optimization

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64713 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug rtl-optimization/69710] performance issue with SP Linpack with Autovectorization

||2016-03-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #16 from Ramana Radhakrishnan --- Confirmed then.

[Bug rtl-optimization/70223] [ARM] Optimization level -O2 results in wrong code

||2016-03-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug rtl-optimization/70030] [LRA]ICE when reload insn with output scratch operand

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70030 --- Comment #4 from Ramana Radhakrishnan --- (In reply to Vladimir Makarov from comment #3) > (In reply to Ramana Radhakrishnan from comment #2) > > Waiting. > > Actually, I have a candidate patch to deal with scratches created during > LRA.

[Bug testsuite/70227] pr69589 does not check for -rdynamic availability

||2016-03-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- confirmed.

[Bug rtl-optimization/70278] [6 regression] LRA ICE on trunk for ARM Thumb1 with Os

Status|UNCONFIRMED |NEW Last reconfirmed||2016-03-17 CC||ramana at gcc dot gnu.org Summary|LRA ICE on trunk for ARM|[6 regression] LRA ICE on |Thumb1 with Os

[Bug rtl-optimization/69047] memcpy of 64-bit integer to 32-bit integer causes pointless stack operations on ARM

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69047 --- Comment #2 from Ramana Radhakrishnan --- Might be related to PR36409 and PR49157

[Bug rtl-optimization/69047] memcpy of 64-bit integer to 32-bit integer causes pointless stack operations on ARM

Target|arm |arm, aarch64 Status|UNCONFIRMED |NEW Last reconfirmed||2016-03-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment

[Bug target/70113] [AArch64] -mpc-relative-literal-loads conflicts with fix-cortex-a53-843419

||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |6.0 --- Comment #4 from Ramana Radhakrishnan --- Fixed on trunk.

[Bug target/67896] Inconsistent behaviour between C and C++ for types poly8x8_t and poly16x8_t

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67896 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug rtl-optimization/69557] [ARM] revsh instruction not being conditionalised for Thumb2

||2016-03-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- Confirmed.

[Bug target/70014] [ARM] Predicate does not match constraint (*subsi3_carryin_const)

||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |6.0 --- Comment #3 from Ramana Radhakrishnan --- Fixed then.

[Bug target/70232] [6 regression] excessive stack usage with -O2

||2016-03-16 CC||ramana at gcc dot gnu.org Summary|excessive stack usage with |[6 regression] excessive |-O2 |stack usage with -O2 Ever confirmed|0 |1

[Bug target/69979] ARM naked function attribute not handling structs bigger than 32 bits correctly

|UNCONFIRMED |RESOLVED CC||ramana at gcc dot gnu.org Resolution|--- |INVALID --- Comment #2 from Ramana Radhakrishnan --- The documentation says : This attribute allows the compiler to construct the requisite

[Bug rtl-optimization/70223] [ARM] Optimization level -O2 results in wrong code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70223 --- Comment #2 from Ramana Radhakrishnan --- The ARM port does not use frame pointers unless specified on the command line or an actual need in the program (read alloca). With 4.8.5 I get with the command line options suggested *and*

[Bug bootstrap/60743] build/genautomata uses 700 MB memory for ARM

||ramana at gcc dot gnu.org Resolution|--- |FIXED --- Comment #17 from Ramana Radhakrishnan --- (In reply to Tyrel Haveman from comment #16) > Certainly that is an option in many cases. In my particular case this is > building on an Ope

[Bug c++/63433] init_priority not working on ARM target

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63433 Ramana Radhakrishnan changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug target/51980] ARM - Neon code polluted by useless stores to the stack with vuzpq / vzipq / vtrnq

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51980 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/47562] [meta-bug] keep track of Neon Intrinsics enhancements

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47562 Bug 47562 depends on bug 51980, which changed state. Bug 51980 Summary: ARM - Neon code polluted by useless stores to the stack with vuzpq / vzipq / vtrnq https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51980 What|Removed

[Bug target/51996] ICE in extract_insn gcc.dg/pr48335-5.c

||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |4.9.0 --- Comment #3 from Ramana Radhakrishnan --- Fixed presumably in 4.9.0 The 4.8 branch is closed, I'm not sure if the commit ever went there.

[Bug target/69663] [ARM] Implement overflow arithmetic standard names {u,}{add,sub,mul}v4

||2016-02-18 CC||ramana at gcc dot gnu.org Target Milestone|--- |7.0 Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- confirmed.

[Bug tree-optimization/69848] poor vectorization of a loop from SPEC2006 464.h264ref

||2016-02-18 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #4 from Ramana Radhakrishnan --- Confirmed.

[Bug target/63304] Aarch64 pc-relative load offset out of range

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 --- Comment #49 from Ramana Radhakrishnan --- (In reply to ard.biesheuvel from comment #48) > (In reply to Richard Earnshaw from comment #47) > > (In reply to ard.biesheuvel from comment #46) > > > One issue that this causes, which I did not see

[Bug middle-end/67295] [ARM][6 Regression] FAIL: gcc.target/arm/builtin-bswap-1.c scan-assembler-times revshne\\t 1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295 --- Comment #10 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #7) > At the RTL level, it would be nice if REE optimized away at least the > redundant zero extension, thus change: > cmp r1, #0 > rev16ne

[Bug target/63304] Aarch64 pc-relative load offset out of range

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 --- Comment #44 from Ramana Radhakrishnan --- (In reply to Christophe Lyon from comment #39) > We have backported r227748, 229160 and 229161 to our linaro-gcc-5 branch, > and we got a bug report from the kernel team. Sorry about the breakage.

[Bug rtl-optimization/65932] [5 Regression] Linux-3.10.75 on arm926ej-s does not boot due to wrong code generation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932 --- Comment #24 from Ramana Radhakrishnan --- *** Bug 67295 has been marked as a duplicate of this bug. ***

[Bug rtl-optimization/64164] [4.9/5/6 Regression] one more stack slot used due to one less inlining level

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64164 Bug 64164 depends on bug 67295, which changed state. Bug 67295 Summary: [ARM][6 Regression] FAIL: gcc.target/arm/builtin-bswap-1.c scan-assembler-times revshne\\t 1 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295 What|Removed

[Bug middle-end/67295] [ARM][6 Regression] FAIL: gcc.target/arm/builtin-bswap-1.c scan-assembler-times revshne\\t 1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/63304] Aarch64 pc-relative load offset out of range

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/68256] Defining TARGET_USE_CONSTANT_BLOCKS_P causes go bootstrap failure on aarch64.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|6.0 |7.0 Summary|[6

[Bug target/64783] -march=armv8.1-a should be supported

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64783 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |6.0 --- Comment #5 from Ramana

[Bug target/60949] Thumb2 LRA ICE for case pr34856.c

|ramana at gcc dot gnu.org |unassigned at gcc dot gnu.org --- Comment #5 from Ramana Radhakrishnan --- I can no longer reproduce this on the head of the GCC 5 tree.

[Bug target/63870] [Aarch64] [ARM] Errors in use of NEON intrinsics are reported incorrectly

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63870 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |6.0 --- Comment #16 from Ramana

[Bug rtl-optimization/67477] [6 Regression] ICE in cselib_record_set, at cselib.c:2388

||2015-11-27 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Cannot reproduce on trunk any more. Not sure where it got fixed though.

[Bug target/68494] [ARM] Use vector multiply by lane

||2015-11-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- NTAPS is undefined. What's the current output and what output do you expect ?

[Bug rtl-optimization/67954] [5 / 6 Regression] internal compiler error: in patch_jump_insn, at cfgrtl.c:1303

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67954 --- Comment #3 from Ramana Radhakrishnan --- Created attachment 36771 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36771=edit reduced testcase reduced testcase

[Bug rtl-optimization/67954] [5 / 6 Regression] internal compiler error: in patch_jump_insn, at cfgrtl.c:1303

Status|UNCONFIRMED |NEW Last reconfirmed||2015-11-19 CC||ramana at gcc dot gnu.org Summary|[5 Regression] internal |[5 / 6 Regression] internal |compiler error

[Bug other/67868] ICE in handling VTV sections for targets with section anchors.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67868 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf

, ||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- Add author to CC.

[Bug target/68256] [6 regression] switching constant pools to rodata sections causes go bootstrap failure.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256 --- Comment #2 from Ramana Radhakrishnan --- Author: ramana Date: Tue Nov 10 08:35:21 2015 New Revision: 230085 URL: https://gcc.gnu.org/viewcvs?rev=230085=gcc=rev Log: Workaround PR68256 on AArch64 > This is causing a bootstrap comparison

[Bug other/58133] GCC should emit arm assembly following the unified syntax

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58133 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/68223] [6 regression] arm_[su]min_cmp pattern fails

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68223 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/68256] New: [6 regression] switching constant pools to rodata sections causes go bootstrap failure.

Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- https://gcc.gnu.org/ml/gcc-patches/2015-11/msg00839.html

[Bug target/68256] [6 regression] switching constant pools to rodata sections causes go bootstrap failure.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

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