[Bug c++/87373] Packed structs are not handled properly on ARM architecture even with misaligned access is enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87373 --- Comment #17 from Richard Earnshaw --- (In reply to Murat Ursavaş from comment #16) > OK I understand conservative action and not wait for word by word access. > But the resulting value is not 0x401 on the test case, but it should be. Is not

[Bug c++/87373] Packed structs are not handled properly on ARM architecture even with misaligned access is enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87373 --- Comment #15 from Richard Earnshaw --- (In reply to Murat Ursavaş from comment #12) > Richard, > > Ok I remembered things with reading the old posts on launchpad. The compiler > was generating normal code if I use the struct variable directly

[Bug c++/87373] Packed structs are not handled properly on ARM architecture even with misaligned access is enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87373 --- Comment #14 from Richard Earnshaw --- (In reply to Murat Ursavaş from comment #13) > Richard, > > Also as far as I remember GNU manual was indeed saying something on this > case. It was saying that "if the struct is not packed, it would acce

[Bug c++/87373] Packed structs are not handled properly on ARM architecture even with misaligned access is enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87373 --- Comment #7 from Richard Earnshaw --- (In reply to Murat Ursavaş from comment #6) > Hi Jonathan, > > I just wanted a dramatic entrance :) (There was a discussion about GCC > bugzilla on reddit recently) Of course it hasn't took that long. But

[Bug c++/87373] Packed structs are not handled properly on ARM architecture even with misaligned access is enabled

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87373 --- Comment #5 from Richard Earnshaw --- It's not clear what behaviour you think is 'proper' for a packed struct with a volatile member. Since packed is a GNU extension, there's nothing in the C (or C++) standards that you can call upon to reach

[Bug target/87302] -mfpu=auto -march=armv8-a does not work

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87302 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/66203] aarch64-none-elf does not automatically find librdimon

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66203 --- Comment #4 from Richard Earnshaw --- The Arm builds that do not need anything from libgloss (and thus do not need a specs file) while linking come from a configuration that hard codes the underlying runtime monitor (usually the arm semihostin

[Bug middle-end/82853] Optimize x % 3 == 0 without modulo

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82853 --- Comment #27 from Richard Earnshaw --- (In reply to Jakub Jelinek from comment #26) > A test generator for x % c1 == c2 expansion for unsigned, int, unsigned long > long, long long, unsigned int128 and int128 types (assuming ilp32 or lp64) >

[Bug target/86951] arm speculation barrier incompatible with ARMv6 or earlier

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86951 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/86772] [meta-bug] tracking port status for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86772 Bug 86772 depends on bug 86951, which changed state. Bug 86951 Summary: arm speculation barrier incompatible with ARMv6 or earlier https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86951 What|Removed |Added -

[Bug target/86951] arm speculation barrier incompatible with ARMv6 or earlier

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86951 --- Comment #1 from Richard Earnshaw --- Author: rearnsha Date: Thu Aug 23 09:47:34 2018 New Revision: 263806 URL: https://gcc.gnu.org/viewcvs?rev=263806&root=gcc&view=rev Log: PR target/86951 arm - Handle speculation barriers on pre-armv7 CPUs

[Bug middle-end/87049] __clear_cache() prototype confusion

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87049 --- Comment #2 from Richard Earnshaw --- But won't that give problems for C++ because now you'll need to cast the pointers?

[Bug target/86777] Bfin port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86777 --- Comment #2 from Richard Earnshaw --- I don't think you could do that through the API provided by this patch set; but it's not really appropriate for this case. I'm not familiar with the bfin architecture so cannot comment on what the best ap

[Bug target/86951] arm speculation barrier incompatible with ARMv6 or earlier

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86951 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/86951] New: arm speculation barrier incompatible with ARMv6 or earlier

Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: arm The speculation_barrier_insn pattern uses DSB and ISB

[Bug target/86799] nios2 port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86799 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/86772] [meta-bug] tracking port status for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86772 Bug 86772 depends on bug 86799, which changed state. Bug 86799 Summary: nios2 port needs updating for CVE-2017-5753 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86799 What|Removed |Added

[Bug target/86799] nios2 port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86799 --- Comment #1 from Richard Earnshaw --- I nearly missed this patch for my accumulated back-porting list since it didn't have the PR number in it. Just adding it so that I can track things properly. The original commit landed as r263301.

[Bug target/86887] [9 Regression] aarch64: adcs accepts only register arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86887 Richard Earnshaw changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/86887] [9 Regression] aarch64: adcs accepts only register arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86887 --- Comment #2 from Richard Earnshaw --- Author: rearnsha Date: Thu Aug 9 13:39:17 2018 New Revision: 263446 URL: https://gcc.gnu.org/viewcvs?rev=263446&root=gcc&view=rev Log: aarch64 - PR target/86887 Fix missing register constraints in carryi

[Bug target/86887] [9 Regression] aarch64: adcs accepts only register arguments

|unassigned at gcc dot gnu.org |rearnsha at gcc dot gnu.org

[Bug target/86887] [9 Regression] aarch64: adcs accepts only register arguments

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86887 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/86785] hppa port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86785 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/86772] [meta-bug] tracking port status for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86772 Bug 86772 depends on bug 86785, which changed state. Bug 86785 Summary: hppa port needs updating for CVE-2017-5753 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86785 What|Removed |Added -

[Bug target/86807] spu port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86807 --- Comment #4 from Richard Earnshaw --- Author: rearnsha Date: Tue Aug 7 14:33:09 2018 New Revision: 263358 URL: https://gcc.gnu.org/viewcvs?rev=263358&root=gcc&view=rev Log: Fix PR number for HPPA speculation patch: PR target/86807 -> PR tar

[Bug target/86785] hppa port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86785 --- Comment #1 from Richard Earnshaw --- Author: rearnsha Date: Tue Aug 7 14:33:09 2018 New Revision: 263358 URL: https://gcc.gnu.org/viewcvs?rev=263358&root=gcc&view=rev Log: Fix PR number for HPPA speculation patch: PR target/86807 -> PR tar

[Bug libgcc/86512] Incorrect sub result for float subnormal inputs in armv7(with -msoft-float).

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86512 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |9.0

[Bug libgcc/86512] Incorrect sub result for float subnormal inputs in armv7(with -msoft-float).

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86512 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug libgcc/86512] Incorrect sub result for float subnormal inputs in armv7(with -msoft-float).

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86512 --- Comment #1 from Richard Earnshaw --- Author: rearnsha Date: Thu Aug 2 16:50:07 2018 New Revision: 263267 URL: https://gcc.gnu.org/viewcvs?rev=263267&root=gcc&view=rev Log: arm - correctly handle denormal results during softfp subtraction 2

[Bug target/86802] riscv port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86802 --- Comment #2 from Richard Earnshaw --- I think the best thing to do in that case is to leave the port unfixed until such time as you know what mitigation is appropriate. That way the compiler will not define __HAVE_SPECULATION_SAFE_VALUE and u

[Bug target/86800] nvptx port needs updating for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86800 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/86772] [meta-bug] tracking port status for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86772 Bug 86772 depends on bug 86800, which changed state. Bug 86800 Summary: nvptx port needs updating for CVE-2017-5753 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86800 What|Removed |Added

[Bug target/86814] New: xtensa port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: sterling_augustine at tensilica dot com Blocks: 86772 Target Milestone: --- Target: xtensa The xtensa port needs updating for this CVE. See the linked

[Bug target/86813] New: xstormy16 port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: xstormy16 The xstormy16 port needs updating for this CVE. See the linked meta

[Bug target/86812] New: visium port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: ebotcazou at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: visium The visium port needs updating for this CVE. See the linked meta bug for

[Bug target/86811] New: Vax port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: m...@3am-software.com Blocks: 86772 Target Milestone: --- Target: vax The Vax port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86810] New: v850 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: v850 The v850 port needs updating for this CVE. See the linked meta bug for details

[Bug target/86809] New: tilepro port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: walt at tilera dot com Blocks: 86772 Target Milestone: --- Target: tilepro The tilepro port needs updating for this CVE. See the linked meta bug for

[Bug target/86808] New: tilegx port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: walt at tilera dot com Blocks: 86772 Target Milestone: --- Target: tilegx The tilegx port needs updating for this CVE. See the linked meta bug for

[Bug target/86807] New: spu port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: dje at gcc dot gnu.org, tsmigiel at gcc dot gnu.org, uweigand at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: spu The spu

[Bug target/86806] New: sparc port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: davem at redhat dot com, ebotcazou at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: sparc The sparc port needs updating for this CVE. See

[Bug target/86805] New: sh port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: aoliva at gcc dot gnu.org, olegendo at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: sh The sh port needs updating for this CVE. See the

[Bug target/86804] New: s390 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: hpenner at de dot ibm.bom, krebbel at gcc dot gnu.org, uweigand at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: s390 The

[Bug target/86803] New: rx port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: rx The rx port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86802] New: riscv port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: andrew at sifive dot com, kito.cheng at gmail dot com, palmer at dabbelt dot com, wilson at gcc dot gnu.org Blocks: 86772 Target Milestone

[Bug target/86801] New: Powerpcspe port (may) need updating for CVE-2017-5753

Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: andrewjenner at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: powerpcspe The powerpcspe port may need updating for this CVE. See

[Bug target/86800] New: nvptx port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: vries at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: nvptx The nvptx port needs updating for this CVE. See the linked meta bug for

[Bug target/86799] New: nios2 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: chunglin.tang at gmail dot com, sandra at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: nios2 The nios2 port needs updating for this CVE

[Bug target/86798] New: nds32 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: jasonwucj at gcc dot gnu.org, shiva0217 at gmail dot com Blocks: 86772 Target Milestone: --- Target: nds32 The nds32 port needs updating for this CVE

[Bug target/86797] New: msp430 port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: msp430 The msp430 port needs updating for this CVE. See the linked meta bug for

[Bug target/86796] New: Moxie port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: green at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: moxie The Moxie port needs updating for this CVE. See the linked meta bug for

[Bug target/86795] New: mn10300 port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: aoliva at gcc dot gnu.org, law at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: mn10300 The mn10300 port needs updating for this CVE. See

[Bug target/86794] New: mmix port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: hp at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: mmix The mmix port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86793] New: mips port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: mfortune at gmail dot com Blocks: 86772 Target Milestone: --- Target: mips The MIPS port needs updating for this CVE. See the linked meta bug for details

[Bug target/86792] New: microblaze port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: eager at eagercon dot com Blocks: 86772 Target Milestone: --- Target: microblaze The microblaze port needs updating for this CVE. See the linked

[Bug target/86791] New: mcore port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: mcore The mcore port needs updating for this CVE. See the linked meta bug for

[Bug target/86790] New: m68k port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: law at gcc dot gnu.org, schwab at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: m68k The m68k port needs updating for this CVE. See the

[Bug target/86789] New: m32r port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: m32r The m32r port needs updating for this CVE. See the linked meta bug for details

[Bug target/86788] New: lm32 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: lekernel at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: lm32 The lm32 port needs updating for this CVE. See the linked meta bug for

[Bug target/86787] New: iq2000 port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: iq2000 The iq2000 port needs updating for this CVE. See the linked meta bug for

[Bug target/86786] New: ia64 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: wilson at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: ia64 The ia64 port needs updating for this CVE. See the linked meta bug for details

[Bug target/86785] New: hppa port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: dave.anglin at bell dot net, law at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: hppa The hppa port needs updating for this CVE. See the

[Bug target/86784] New: H8 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: law at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: h8 The H8 port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86783] New: ft32 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: ft32 The ft32 port needs updating for this CVE. See the linked meta bug for details of possible actions required. Referenced

[Bug target/86782] New: frv port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: aoliva at gcc dot gnu.org, nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: frv The frv port needs updating for this CVE. See the

[Bug target/86781] New: fr30 port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: nickc at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: fr30 The fr30 port needs updating for this CVE. See the linked meta bug for details

[Bug target/86779] New: Cris port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: hp at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: cris The Cris port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86780] New: epiphany port needs updating for CVE-2017-5753

: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: amylaar at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: epiphany The Epiphany port needs updating for this CVE. See the linked meta bug

[Bug target/86778] New: c6x port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: bernds at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: c6x The C6X port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86777] New: Bfin port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: jiez at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: bfin The bfin port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86776] New: Avr port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: chertykov at gmail dot com Blocks: 86772 Target Milestone: --- Target: avr The Avr port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86775] New: Arc port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: amylaar at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: arc The Arc port needs updating for this CVE. See the linked meta bug for details of

[Bug target/86774] New: Alpha port needs updating for CVE-2017-5753

Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: rth at gcc dot gnu.org Blocks: 86772 Target Milestone: --- Target: alpha The alpha port needs updating for this CVE. See the linked meta-bug for

[Bug target/86772] [meta-bug] tracking port status for CVE-2017-5753

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86772 --- Comment #1 from Richard Earnshaw --- Original patch series and discussion can be found here: https://gcc.gnu.org/ml/gcc-patches/2018-07/msg01700.html

[Bug target/86772] New: [meta-bug] tracking port status for CVE-2017-5753

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org Target Milestone: --- This is a meta bug to track the port status of all ports that have not yet been updated to handle CVE-2017-5753 (Spectre variant 1). If your

[Bug middle-end/86698] New: Misleading dump-file contents

Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org Target Milestone: --- Use of the comma operator in source code can lead to misleading information in the initial dump file when trying to understand the result of the initial

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 Richard Earnshaw changed: What|Removed |Added Resolution|FIXED |WONTFIX

[Bug tree-optimization/86520] AArch64: Two 8-bit accesses coalesced into a single 16-bit access

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86520 --- Comment #7 from Richard Earnshaw --- (In reply to Stephen Warren from comment #6) > > Note that library code also assumes that misaligned accesses are safe: > > that is the default for AArch64. > > I assume you're talking about gcc's default

[Bug tree-optimization/86520] AArch64: Two 8-bit accesses coalesced into a single 16-bit access

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86520 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/86383] [9 Regression] arm-netbsdelf cross compiler fails in selftests

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86383 --- Comment #6 from Richard Earnshaw --- (In reply to coypu from comment #5) > (In reply to Richard Earnshaw from comment #2) > > I'm not sure how relevant the netbsd-elf port is these days. I believe > > they've now moved onto an EABI based ABI

[Bug target/86383] [9 Regression] arm-netbsdelf cross compiler fails in selftests

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86383 --- Comment #2 from Richard Earnshaw --- I'm not sure how relevant the netbsd-elf port is these days. I believe they've now moved onto an EABI based ABI. But no GCC port of that has been contributed.

[Bug target/86209] Peephole does not happen because the type of zero/sign extended operands is not the same.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86209 --- Comment #11 from Richard Earnshaw --- (In reply to sameerad from comment #10) > > subus: > >ldr w0, [w0] > >add w0, w0, w0, lsr #16 > >uxth w0, w0 > >ret > > This is interesting way in which load store combining can be

[Bug target/86209] Peephole does not happen because the type of zero/sign extended operands is not the same.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86209 --- Comment #9 from Richard Earnshaw --- (In reply to ktkachov from comment #7) > The other thing to consider with merging loads is how the result is used. > In your example if you merge the 16-bit loads into a single 32-bit register > load you'l

[Bug target/86003] [8/9 Regression] GCC fails to build when configured --with-cpu=xscale

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86003 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/86003] [8/9 Regression] GCC fails to build when configured --with-cpu=xscale

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86003 --- Comment #3 from Richard Earnshaw --- Author: rearnsha Date: Mon Jun 4 08:46:04 2018 New Revision: 261141 URL: https://gcc.gnu.org/viewcvs?rev=261141&root=gcc&view=rev Log: [arm] PR target/86003 build failures with --with-cpu=xscale The XSc

[Bug target/86003] [8/9 Regression] GCC fails to build when configured --with-cpu=xscale

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86003 --- Comment #2 from Richard Earnshaw --- Author: rearnsha Date: Mon Jun 4 08:41:45 2018 New Revision: 261140 URL: https://gcc.gnu.org/viewcvs?rev=261140&root=gcc&view=rev Log: [arm] PR target/86003 build failures with --with-cpu=xscale The XSc

[Bug target/86003] [8/9 Regression] GCC fails to build when configured --with-cpu=xscale

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86003 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug lto/85801] LTO linking fails to reconcile symbol from common an data sections (-fPIE -Wl,--as-needed -flto): unresolvable R_ARM_REL32 relocation against symbol `progname'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85801 --- Comment #9 from Richard Earnshaw --- (In reply to rguent...@suse.de from comment #8) > > Sure. So I'd say common symbols that are exported may not be in an anchor > group? In the shared library this isn't a common symbol: it has an initia

[Bug lto/85801] LTO linking fails to reconcile symbol from common an data sections (-fPIE -Wl,--as-needed -flto): unresolvable R_ARM_REL32 relocation against symbol `progname'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85801 --- Comment #7 from Richard Earnshaw --- (In reply to rguent...@suse.de from comment #6) > Can't we decide that per symbol? Or somehow force the dynamic linker to use > the program symbol? At what point? We've no idea during compilation which

[Bug lto/85801] LTO linking fails to reconcile symbol from common an data sections (-fPIE -Wl,--as-needed -flto): unresolvable R_ARM_REL32 relocation against symbol `progname'

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85801 --- Comment #5 from Richard Earnshaw --- > ld: relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `progname' which may > bind externally can not be used when making a shared object; recompile with > -fPIC So this is the start of the problem.

[Bug target/85733] [8,9 regression] ARM -mbe8 behaviour doesn't match documentation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85733 Richard Earnshaw changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/85733] [8,9 regression] ARM -mbe8 behaviour doesn't match documentation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85733 --- Comment #4 from Richard Earnshaw --- Author: rearnsha Date: Fri May 11 13:30:55 2018 New Revision: 260163 URL: https://gcc.gnu.org/viewcvs?rev=260163&root=gcc&view=rev Log: [arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and

[Bug target/85733] [8,9 regression] ARM -mbe8 behaviour doesn't match documentation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85733 --- Comment #3 from Richard Earnshaw --- Author: rearnsha Date: Fri May 11 13:29:41 2018 New Revision: 260162 URL: https://gcc.gnu.org/viewcvs?rev=260162&root=gcc&view=rev Log: [arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and

[Bug target/85733] [8,9 regression] ARM -mbe8 behaviour doesn't match documentation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85733 Richard Earnshaw changed: What|Removed |Added Keywords|documentation | --- Comment #2 from Richard Earnshaw

[Bug target/85606] [8,9 regression] Assembly file generated for ARM Cortex-M0 should not specify `.arch armv6-m` at all or use `.arch armv6s-m`

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85606 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/85606] [8 regression] Assembly file generated for ARM Cortex-M0 should not specify `.arch armv6-m` at all or use `.arch armv6s-m`

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85606 --- Comment #3 from Richard Earnshaw --- Author: rearnsha Date: Fri May 11 09:30:49 2018 New Revision: 260158 URL: https://gcc.gnu.org/viewcvs?rev=260158&root=gcc&view=rev Log: [arm] PR target/85606 prefer armv6s-m for armv6-m parts When Arm in

[Bug target/85606] [8 regression] Assembly file generated for ARM Cortex-M0 should not specify `.arch armv6-m` at all or use `.arch armv6s-m`

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85606 --- Comment #2 from Richard Earnshaw --- Author: rearnsha Date: Fri May 11 09:28:10 2018 New Revision: 260157 URL: https://gcc.gnu.org/viewcvs?rev=260157&root=gcc&view=rev Log: [arm] PR target/85606 prefer armv6s-m for armv6-m parts When Arm in

[Bug target/85606] [8 regression] Assembly file generated for ARM Cortex-M0 should not specify `.arch armv6-m` at all or use `.arch armv6s-m`

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85606 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/85616] ARM target using -O2 may cause unaligned access

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85616 Richard Earnshaw changed: What|Removed |Added Resolution|FIXED |INVALID --- Comment #7 from Richard E

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