[Bug target/83507] [8 Regression] ICE in internal_dfa_insn_code_* for powerpc targets

2019-04-16 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83507 Roman Zhuykov changed: What|Removed |Added CC||zhroma at ispras dot ru --- Comment #12

[Bug testsuite/90113] New: Useless torture mode for gfortran.dg tests

2019-04-16 Thread zhroma at ispras dot ru
: testsuite Assignee: unassigned at gcc dot gnu.org Reporter: zhroma at ispras dot ru Target Milestone: --- I’ve recently found that tests, which are placed in gcc/testsuite/gfortran.dg folder are running in “torture” mode with different optimization options. While working

[Bug rtl-optimization/90001] Compile-time hog in swing modulo scheduler

2019-04-16 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90001 --- Comment #5 from Roman Zhuykov --- Retested patch separately, everything works. Have found 2 more slow Fortran examples on (obsolete) spu platform and with additional options like -O1/O2 -fomit-frame-pointer -funroll-loops -fpeel-loops

[Bug rtl-optimization/90040] New: [meta-bug] modulo-scheduler and partitioning issues

2019-04-10 Thread zhroma at ispras dot ru
Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: zhroma at ispras dot ru Target Milestone: --- Here I want to discuss the situation with modulo scheduler pass when -freorder-blocks-and-partition is also enabled. TL;DR Kindly ask RTL folks to fix ICE

[Bug target/84369] test case gcc.dg/sms-10.c fails on power9

2019-04-10 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84369 Roman Zhuykov changed: What|Removed |Added CC||zhroma at ispras dot ru --- Comment #3

[Bug target/87979] ICE in compute_split_row at modulo-sched.c:2393

2019-04-10 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87979 --- Comment #2 from Roman Zhuykov --- Situation is same in the following tests on ia64 platform with -fmodulo-sched enabled (with any of O1, O2, Os): gcc.dg/torture/pr82762.c gcc.c-torture/execute/20170419-1.c We divide by zero when we try to

[Bug target/87979] ICE in compute_split_row at modulo-sched.c:2393

2019-04-10 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87979 Roman Zhuykov changed: What|Removed |Added CC||zhroma at ispras dot ru --- Comment #1

[Bug rtl-optimization/84032] ICE in optimize_sc, at modulo-sched.c:1064

2019-04-10 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84032 --- Comment #4 from Roman Zhuykov --- There is the following mistake in logic behind the code. We want to schedule the branch instructions only as a last instruction in a row. But when branch was scheduled and we add other instructions into

[Bug rtl-optimization/84032] ICE in optimize_sc, at modulo-sched.c:1064

2019-04-10 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84032 Roman Zhuykov changed: What|Removed |Added CC||zhroma at ispras dot ru --- Comment #3

[Bug rtl-optimization/90001] Compile-time hog in swing modulo scheduler

2019-04-08 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90001 --- Comment #4 from Roman Zhuykov --- Thanks for testcase. 2-3 weeks ago I already caught and fixed this on my local branch, see some info in the bottom. Current algorithm which finds recurrence_length for all DDG strongly connected components

[Bug rtl-optimization/90001] Compile-time hog in swing modulo scheduler

2019-04-08 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90001 Roman Zhuykov changed: What|Removed |Added CC||zhroma at ispras dot ru --- Comment #3

[Bug rtl-optimization/80112] [5/6 Regression] ICE in doloop_condition_get at loop-doloop.c:158

2017-03-24 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80112 Roman Zhuykov changed: What|Removed |Added CC||zhroma at ispras dot ru --- Comment #5

[Bug target/69252] [4.9/5/6 Regression] gcc.dg/vect/vect-iv-9.c FAILs with -Os -fmodulo-sched -fmodulo-sched-allow-regmoves -fsched-pressure

2016-01-18 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69252 --- Comment #13 from Roman Zhuykov --- (In reply to Jakub Jelinek from comment #12) > Thus, Roman, can you please post your patch to gcc-patches? Ok, in addition to comment 3 link, reposted it right now

[Bug target/69252] [4.9/5/6 Regression] gcc.dg/vect/vect-iv-9.c FAILs with -Os -fmodulo-sched -fmodulo-sched-allow-regmoves -fsched-pressure

2016-01-14 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69252 --- Comment #7 from Roman Zhuykov --- (In reply to Jakub Jelinek from comment #5) > insufficient SMS testsuite coverage. Not sure it's helpful, but 3 weeks ago I succesfully reg-strapped some bunch of my SMS patches including this fix on x86-64

[Bug target/69252] [4.9/5/6 Regression] gcc.dg/vect/vect-iv-9.c FAILs with -Os -fmodulo-sched -fmodulo-sched-allow-regmoves -fsched-pressure

2016-01-13 Thread zhroma at ispras dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69252 --- Comment #3 from Roman Zhuykov --- I'll try to help. While working with expanding SMS functionality 4-5 years ago (https://gcc.gnu.org/ml/gcc-patches/2011-07/msg01807.html), I create several fixes not connected to my main non-doloop-support

[Bug rtl-optimization/57372] New: [4.9 Regression] Miscompiled tailcall on ARM

2013-05-22 Thread zhroma at ispras dot ru
-optimization Assignee: unassigned at gcc dot gnu.org Reporter: zhroma at ispras dot ru Created attachment 30164 -- http://gcc.gnu.org/bugzilla/attachment.cgi?id=30164action=edit Preprocessed minimized testcase On ARM, gcc 4.9 revision 198928 and later sometimes creates wrong

[Bug c++/55081] New: [4.8 regression?] Non-optimized static array elements initialization

2012-10-26 Thread zhroma at ispras dot ru
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55081 Bug #: 55081 Summary: [4.8 regression?] Non-optimized static array elements initialization Classification: Unclassified Product: gcc Version: 4.8.0 Status: