--- Comment #5 from jakub at gcc dot gnu dot org 2008-05-07 07:28 ---
Subject: Bug 36106
Author: jakub
Date: Wed May 7 07:28:14 2008
New Revision: 135027
URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=135027
Log:
PR middle-end/36106
* omp-low.c
--- Comment #6 from jakub at gcc dot gnu dot org 2008-05-07 07:56 ---
Subject: Bug 36106
Author: jakub
Date: Wed May 7 07:55:21 2008
New Revision: 135030
URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=135030
Log:
PR middle-end/36106
* omp-low.c
--- Comment #7 from jakub at gcc dot gnu dot org 2008-05-07 08:05 ---
Fixed.
--
jakub at gcc dot gnu dot org changed:
What|Removed |Added
Status|ASSIGNED
--
jakub at gcc dot gnu dot org changed:
What|Removed |Added
AssignedTo|unassigned at gcc dot gnu |jakub at gcc dot gnu dot org
|dot org
--- Comment #2 from jakub at gcc dot gnu dot org 2008-05-05 10:39 ---
This is nothing target specific though, on many targets reading a float or
double sNaN into a FPU register and storing back somewhere else leads to qNaN
being stored.
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jakub at gcc dot gnu dot org changed:
--- Comment #4 from jakub at gcc dot gnu dot org 2008-05-05 15:47 ---
Not really, as IEEE754 mandates turning sNaN into qNaN after raising the
exception. I have a fix in the works in omp-low.c (so far works for non-SSA
and not yet for -ftree-parallelize-loops) and that's middle-end.
--- Comment #1 from jakub at gcc dot gnu dot org 2008-05-02 11:40 ---
Created an attachment (id=15562)
-- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=15562action=view)
gcc44-pr36106-test.patch
Testcases.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36106
