--- Additional Comments From cvs-commit at gcc dot gnu dot org 2004-11-25
23:10 ---
Subject: Bug 18463
CVSROOT:/cvs/gcc
Module name:gcc
Changes by: [EMAIL PROTECTED] 2004-11-25 23:10:27
Modified files:
gcc: ChangeLog cse.c
Log message:
--- Additional Comments From pinskia at gcc dot gnu dot org 2004-11-13
18:46 ---
This is a RTL problem as it works correctly on ARM which has it ...
I should note that arm's instruction has nothing special in its .md file:
(define_insn *arm_movsf_soft_insn
[(set (match_operand:SF 0
--- Additional Comments From steven at gcc dot gnu dot org 2004-11-13
19:34 ---
CSE is trying to reconstruct the addressing mode, but it has
(plus:SI (ashift:SI (reg/v:SI 61 [ n ]) (const_int 2 [0x2]))
(reg/v/f:SI 59 [ a ]))
According to hp, the canonical form would be
