[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #10 from Mikael Pettersson mikpe at it dot uu.se 2011-08-16 07:24:48 UTC --- (In reply to comment #9) Regarding the spinlock_unlock in linux, the regular arch_spin_unlock is implemented with a single inline assembly. That will

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #9 from Eric Botcazou ebotcazou at gcc dot gnu.org 2011-08-15 08:47:08 UTC --- Regarding the spinlock_unlock in linux, the regular arch_spin_unlock is implemented with a single inline assembly. That will prevent the memory

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #5 from Mikael Pettersson mikpe at it dot uu.se 2011-08-14 09:24:31 UTC --- You need a _compiler_ barrier before the store in _unlock().

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #6 from Eric Botcazou ebotcazou at gcc dot gnu.org 2011-08-14 12:42:47 UTC --- The code is equivalent to volatile unsigned char lock; int remap_barrier; while (atomic_test_and_set(lock)) { while (lock) { ; } }

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #7 from Eric Botcazou ebotcazou at gcc dot gnu.org 2011-08-14 13:00:06 UTC --- I don't think this is an valid optimization. There are only two memory models in SPARC32, TSO and PSO (not RMO in the 64-bit v9). Both don't allow

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #8 from Zhangxi Tan tanzhangxi at gmail dot com 2011-08-14 21:00:40 UTC --- Thanks for the clear explanation. I agree that a memory barrier would solve this issue. Regarding the spinlock_unlock in linux, the regular arch_spin_unlock

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 Eric Botcazou ebotcazou at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #3 from Zhangxi Tan tanzhangxi at gmail dot com 2011-08-14 00:57:07 UTC --- The code is equivalent to volatile unsigned char lock; int remap_barrier; while (atomic_test_and_set(lock)) { while (lock) { ; } }

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #4 from Zhangxi Tan tanzhangxi at gmail dot com 2011-08-14 01:30:33 UTC --- I don't think this is an valid optimization. There are only two memory models in SPARC32, TSO and PSO (not RMO in the 64-bit v9). Both don't allow relaxing

[Bug rtl-optimization/50065] -Os, -O2, -O3 optimization breaks LD/ST ordering on 32-bit SPARC

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50065 --- Comment #1 from Andrew Pinski pinskia at gcc dot gnu.org 2011-08-13 02:21:05 UTC --- I fixed a volatile bug dealing with inlining and ipa-sra. Maybe this was fixed by that too.